PCI/AER: Configure ECRC only if AER is native
authorVidya Sagar <vidyas@nvidia.com>
Thu, 12 Jan 2023 07:21:11 +0000 (12:51 +0530)
committerBjorn Helgaas <bhelgaas@google.com>
Thu, 12 Jan 2023 18:24:37 +0000 (12:24 -0600)
As the ECRC configuration bits are part of AER registers, configure ECRC
only if AER is natively owned by the kernel.

Link: https://lore.kernel.org/r/20230112072111.20063-1-vidyas@nvidia.com
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Documentation/admin-guide/kernel-parameters.txt
drivers/pci/pcie/aer.c

index 6cfa6e3..ecdb953 100644 (file)
                                specified, e.g., 12@pci:8086:9c22:103c:198f
                                for 4096-byte alignment.
                ecrc=           Enable/disable PCIe ECRC (transaction layer
-                               end-to-end CRC checking).
+                               end-to-end CRC checking). Only effective if
+                               OS has native AER control (either granted by
+                               ACPI _OSC or forced via "pcie_ports=native")
                                bios: Use BIOS/firmware settings. This is the
                                the default.
                                off: Turn ECRC off
index 625f7b2..d7ee79d 100644 (file)
@@ -184,6 +184,9 @@ static int disable_ecrc_checking(struct pci_dev *dev)
  */
 void pcie_set_ecrc_checking(struct pci_dev *dev)
 {
+       if (!pcie_aer_is_native(dev))
+               return;
+
        switch (ecrc_policy) {
        case ECRC_POLICY_DEFAULT:
                return;