include/

	* opcode/tic6x-control-registers.h (tscl): Now read_write.

gas/testsuite/
	* gas/tic6x/insns-bad-1.s: Remove test for readonly tscl.
	* gas/tic6x/insns-bad-1.l: Likewise.
	* gas/tic6x/insns-c674x.d: Add test for writeable tscl.
	* gas/tic6x/insns-c674x.s: Likewise.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 62a974b..bafa80f 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2010-09-29  Bernd Schmidt  <bernds@codesourcery.com>
+
+       * gas/tic6x/insns-bad-1.s: Remove test for readonly tscl.
+       * gas/tic6x/insns-bad-1.l: Likewise.
+       * gas/tic6x/insns-c674x.d: Add test for writeable tscl.
+       * gas/tic6x/insns-c674x.s: Likewise.
+
 2010-09-29  Alan Modra  <amodra@gmail.com>
 
        * expr.c (expr): Correct returned segment value.

diff --git a/gas/testsuite/gas/tic6x/insns-bad-1.l b/gas/testsuite/gas/tic6x/insns-bad-1.l
index 3fca851..95f3f9b 100644 (file)
--- a/gas/testsuite/gas/tic6x/insns-bad-1.l
+++ b/gas/testsuite/gas/tic6x/insns-bad-1.l
@@ -867,7 +867,6 @@
 [^:]*:854: Error: operand 1 of 'mvc' is write-only
 [^:]*:855: Error: operand 2 of 'mvc' is read-only
 [^:]*:856: Error: operand 2 of 'mvc' is read-only
-[^:]*:857: Error: operand 2 of 'mvc' is read-only
 [^:]*:858: Error: 'mv' instruction not supported on this functional unit
 [^:]*:859: Error: too many operands to 'mv'
 [^:]*:860: Error: operand 2 of 'mv' on wrong side

diff --git a/gas/testsuite/gas/tic6x/insns-bad-1.s b/gas/testsuite/gas/tic6x/insns-bad-1.s
index 12c20cc..e2e7996 100644 (file)
--- a/gas/testsuite/gas/tic6x/insns-bad-1.s
+++ b/gas/testsuite/gas/tic6x/insns-bad-1.s
@@ -854,7 +854,7 @@ f:
        mvc .S2 isr,b0
        mvc .S2 b0,pce1
        mvc .S2 b0,tsch
-       mvc .S2 b0,tscl
+
        mv .M1 a1,a2
        mv .L1 a1,a2,a3
        mv .L1 a1,b2

diff --git a/gas/testsuite/gas/tic6x/insns-c674x.d b/gas/testsuite/gas/tic6x/insns-c674x.d
index 9100a71..236086c 100644 (file)
--- a/gas/testsuite/gas/tic6x/insns-c674x.d
+++ b/gas/testsuite/gas/tic6x/insns-c674x.d
@@ -902,8 +902,9 @@ Disassembly of section \.text:
 [0-9a-f]+[048c] <[^>]*> 0ac403a2[ \t]+mvc \.S2 b17,ssr
 [0-9a-f]+[048c] <[^>]*> 092c03e2[ \t]+mvc \.S2 tsch,b18
 [0-9a-f]+[048c] <[^>]*> 09a803e2[ \t]+mvc \.S2 tscl,b19
-[0-9a-f]+[048c] <[^>]*> 0a6803e2[ \t]+mvc \.S2 tsr,b20
-[0-9a-f]+[048c] <[^>]*> 0d5403a2[ \t]+mvc \.S2 b21,tsr
+[0-9a-f]+[048c] <[^>]*> 055003a2[ \t]+mvc \.S2 b20,tscl
+[0-9a-f]+[048c] <[^>]*> 0ae803e2[ \t]+mvc \.S2 tsr,b21
+[0-9a-f]+[048c] <[^>]*> 0d5803a2[ \t]+mvc \.S2 b22,tsr
 [0-9a-f]+[048c] <[^>]*> 0001e3e2[ \t]+mvc \.S2 amr,b0
 [0-9a-f]+[048c] <[^>]*> 0005e3e2[ \t]+mvc \.S2 csr,b0
 [0-9a-f]+[048c] <[^>]*> 0181e3a2[ \t]+mvc \.S2 b0,icr
@@ -1566,3 +1567,4 @@ Disassembly of section \.text:
 [0-9a-f]+[048c] <[^>]*> 74800042[ \t]+\[!b2\] mvk \.D2 0,b9
 [0-9a-f]+[048c] <[^>]*> c5000028[ \t]+\[a0\] mvk \.S1 0,a10
 [0-9a-f]+[048c] <[^>]*> 0580002a[ \t]+mvk \.S2 0,b11
+[ \t]*\.\.\.

diff --git a/gas/testsuite/gas/tic6x/insns-c674x.s b/gas/testsuite/gas/tic6x/insns-c674x.s
index 90a2b6d..1d02e7e 100644 (file)
--- a/gas/testsuite/gas/tic6x/insns-c674x.s
+++ b/gas/testsuite/gas/tic6x/insns-c674x.s
@@ -899,8 +899,9 @@ f:
        mvc .S2 b17,ssr
        mvc .S2 tsch,b18
        mvc .S2 tscl,b19
-       mvc .S2 tsr,b20
-       mvc .S2 b21,tsr
+       mvc .S2 b20,tscl
+       mvc .S2 tsr,b21
+       mvc .S2 b22,tsr
        .word 0x0001e3e2
        .word 0x0005e3e2
        .word 0x0181e3a2

diff --git a/include/ChangeLog b/include/ChangeLog
index 97f3d44..f94becd 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2010-09-29  Bernd Schmidt  <bernds@codesourcery.com>
+
+       * opcode/tic6x-control-registers.h (tscl): Now read_write.
+
 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 
        * opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.

diff --git a/include/opcode/tic6x-control-registers.h b/include/opcode/tic6x-control-registers.h
index e237f06..b438777 100644 (file)
--- a/include/opcode/tic6x-control-registers.h
+++ b/include/opcode/tic6x-control-registers.h
@@ -50,5 +50,7 @@ CTRL(rep, C64XP, read_write, 0xf, 0x1f)
 CTRL(rilc, C64XP, read_write, 0xe, 0x1f)
 CTRL(ssr, C64XP, read_write, 0x15, 0x1f)
 CTRL(tsch, C64XP, read, 0xb, 0x1f)
-CTRL(tscl, C64XP, read, 0xa, 0x1f)
+/* Contrary to Table 3-26 in SPRUFE8, this register is read-write, as
+   documented in section 2.9.13.  */
+CTRL(tscl, C64XP, read_write, 0xa, 0x1f)
 CTRL(tsr, C64XP, read_write, 0x1a, 0x1f)