radeon: set the address to access the aperture on the CPU side correctly
authorDave Airlie <airlied@clockmaker.usersys.redhat.com>
Fri, 2 Nov 2007 14:39:44 +0000 (00:39 +1000)
committerDave Airlie <airlied@clockmaker.usersys.redhat.com>
Fri, 2 Nov 2007 14:39:44 +0000 (00:39 +1000)
This code relied on the CPU and GPU address for the aperture being the same,
On some r5xx hardware I was playing with I noticed that this isn't always true.
I wonder if this will fix some of those r4xx DRI issues we've seen in the past.

shared-core/radeon_cp.c
shared-core/radeon_drv.h

index 0686138..c4e13bb 100644 (file)
@@ -1694,7 +1694,7 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
                        dev_priv->gart_info.bus_addr =
                            dev_priv->pcigart_offset + dev_priv->fb_location;
                        dev_priv->gart_info.mapping.offset =
-                           dev_priv->gart_info.bus_addr;
+                           dev_priv->pcigart_offset + dev_priv->fb_aper_offset;
                        dev_priv->gart_info.mapping.size =
                            dev_priv->gart_info.table_size;
 
@@ -2295,7 +2295,8 @@ int radeon_driver_firstopen(struct drm_device *dev)
        if (ret != 0)
                return ret;
 
-       ret = drm_addmap(dev, drm_get_resource_start(dev, 0),
+       dev_priv->fb_aper_offset = drm_get_resource_start(dev, 0);
+       ret = drm_addmap(dev, dev_priv->fb_aper_offset,
                         drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER,
                         _DRM_WRITE_COMBINING, &map);
        if (ret != 0)
index 006559d..e7264a8 100644 (file)
@@ -301,6 +301,7 @@ typedef struct drm_radeon_private {
 
        /* starting from here on, data is preserved accross an open */
        uint32_t flags;         /* see radeon_chip_flags */
+       unsigned long fb_aper_offset;
 
 } drm_radeon_private_t;