* Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o.
(SIM_EXTRA_DEPS): Add include/opcode/cgen.h.
(INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h.
(mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu.
(stamp-decode): Delete, build decode files with other cpu files.
* arch.c,arch.h,cpuall.h: Regenerate.
* cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (M32R_MISC_PROFILE): New members load_regs,
load_regs_pending.
* m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register.
(m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set,
m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get,
m32rbf_h_accum_set): Likewise.
(m32r_model_{init,update}_insn_cycles): Delete.
(m32rbf_model_insn_{before,after}): New fns.
(m32r_model_record_cti,m32r_model_record_cycles): Delete.
(m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete.
(m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete.
(check_load_stall): New fn.
(m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns.
(m32rbf_model_test_u_exec): New fn.
* mloop.in: Rewrite, use pbb support.
* sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete.
(sim_fetch_register,sim_store_register): Delete.
* sim-main.h (CIA_GET,CIA_SET): Fix.
(SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete.
* tconfig.in (WITH_SCACHE_PBB): Define.
(WITH_SCACHE_PBB_M32RBF): Define.
* traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_....
(m32r_trap): Pass pc to sim_engine_halt.
* configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384.
* configure: Regenerate.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o.
(mloopx.c): Build pseudo-basic-block version. Depend on stamp-xcpu.
(semx.o): Delete.
(extractx.o): Add.
(stamp-xdecode): Delete, build decode files with other cpu files.
* cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate.
* readx.c: Delete.
* semx.c: Delete.
* extractx.c: New file.
* semx-switch.c: New file.
* m32r-sim.h (BRANCH_NEW_PC): Delete.
(SEM_SKIP_INSN): New macro.
* m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register.
(m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set,
m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get,
m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise.
(m32rxf_model_insn_{before,after}): New fns.
(m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete.
(m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete.
(check_load_stall): New fn.
(m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns.
* mloopx.in: Rewrite, use pbb support.
* tconfig.in (WITH_SCACHE_PBB_M32RXF): Define.
(WITH_SEM_SWITCH_FULL): Change from 0 to 1.
end-sanitize-m32rx
Do-first:
-m32rx_files="cpux.c cpux.h decodex.c decodex.h m32rx.c mloopx.in modelx.c readx.c semx.c"
+m32rx_files="cpux.c cpux.h decodex.c decodex.h extractx.c m32rx.c mloopx.in modelx.c semx-switch.c"
if ( echo $* | grep keep\-m32rx > /dev/null ) ; then
keep_these_too="${m32rx_files} ${keep_these_too}"
else
+Fri Oct 9 16:11:58 1998 Doug Evans <devans@seba.cygnus.com>
+
+ Add pseudo-basic-block execution support.
+ * Makefile.in (SIM_OBJS): Add sim-reg.o, cgen-run.o, sim-stop.o.
+ (SIM_EXTRA_DEPS): Add include/opcode/cgen.h.
+ (INCLUDE_DEPS): Delete cpu-sim.h, include/opcode/cgen.h.
+ (mloop.c): Build pseudo-basic-block version. Depend on stamp-cpu.
+ (stamp-decode): Delete, build decode files with other cpu files.
+ * arch.c,arch.h,cpuall.h: Regenerate.
+ * cpu.c,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
+ * sem-switch.c,sem.c: Regenerate.
+ * m32r-sim.h (M32R_MISC_PROFILE): New members load_regs,
+ load_regs_pending.
+ * m32r.c (m32rbf_fetch_register): Renamed from m32rb_fetch_register.
+ (m32rbf_store_register,m32rbf_h_cr_get,m32rbf_h_cr_set,
+ m32rbf_h_psw_get,m32rbf_h_psw_set,m32rbf_h_accum_get,
+ m32rbf_h_accum_set): Likewise.
+ (m32r_model_{init,update}_insn_cycles): Delete.
+ (m32rbf_model_insn_{before,after}): New fns.
+ (m32r_model_record_cti,m32r_model_record_cycles): Delete.
+ (m32rb_model_mark_get_h_gr,m32rb_model_mark_set_h_gr): Delete.
+ (m32rb_model_mark_busy_reg,m32rb_model_mark_unbusy_reg): Delete.
+ (check_load_stall): New fn.
+ (m32rbf_model_m32r_d_u_{exec,cmp,mac,cti,load,store}): New fns.
+ (m32rbf_model_test_u_exec): New fn.
+ * mloop.in: Rewrite, use pbb support.
+ * sim-if.c (sim_stop,sim_sync_stop,sim_resume): Delete.
+ (sim_fetch_register,sim_store_register): Delete.
+ * sim-main.h (CIA_GET,CIA_SET): Fix.
+ (SIM_ENGINE_HALT_HOOK,SIM_ENGINE_RESTART_HOOK): Delete.
+ * tconfig.in (WITH_SCACHE_PBB): Define.
+ (WITH_SCACHE_PBB_M32RBF): Define.
+ * traps.c (sim_engine_invalid_insn): Renamed from ..._illegal_....
+ (m32r_trap): Pass pc to sim_engine_halt.
+ * configure.in (SIM_AC_OPTION_SCACHE): Change 1024 to 16384.
+ * configure: Regenerate.
+start-sanitize-m32rx
+ * Makefile.in (M32RX_OBJS): Delete semx.o, add extract.o.
+ (mloopx.c): Build pseudo-basic-block version. Depend on stamp-xcpu.
+ (semx.o): Delete.
+ (extractx.o): Add.
+ (stamp-xdecode): Delete, build decode files with other cpu files.
+ * cpux.c,cpux.h,decodex.c,decodex.h,modelx.c: Regenerate.
+ * readx.c: Delete.
+ * semx.c: Delete.
+ * extractx.c: New file.
+ * semx-switch.c: New file.
+ * m32r-sim.h (BRANCH_NEW_PC): Delete.
+ (SEM_SKIP_INSN): New macro.
+ * m32rx.c (m32rxf_fetch_register): Renamed from m32rx_fetch_register.
+ (m32rxf_store_register,m32rxf_h_cr_get,m32rxf_h_cr_set,
+ m32rxf_h_psw_get,m32rxf_h_psw_set,m32rxf_h_accum_get,
+ m32rxf_h_accum_set,m32rxf_h_accums_get,m32rxf_h_accums_set): Likewise.
+ (m32rxf_model_insn_{before,after}): New fns.
+ (m32rx_model_mark_get_h_gr,m32rx_model_mark_set_h_gr): Delete.
+ (m32rx_model_mark_busy_reg,m32rx_model_mark_unbusy_reg): Delete.
+ (check_load_stall): New fn.
+ (m32rxf_model_m32rx_u_{exec,cmp,mac,cti,load,store}): New fns.
+ * mloopx.in: Rewrite, use pbb support.
+ * tconfig.in (WITH_SCACHE_PBB_M32RXF): Define.
+ (WITH_SEM_SWITCH_FULL): Change from 0 to 1.
+end-sanitize-m32rx
+
+Wed Sep 16 18:22:27 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-sim.h ({PSW,CBR,SPI,SPU,BPC,BBPSW,BBPC}_REGNUM): New macros.
+ ({ACC1L,ACC1H}_REGNUM): New macros.
+ (m32r_decode_gdb_ctrl_regnum): Add prototype.
+ * m32r.c (m32r_decode_gdb_ctrl_regnum): New function.
+ (m32r_fetch_register,m32r_store_register): Rewrite.
+start-sanitize-m32rx
+ * m32rx.c (m32rx_fetch_register,m32rx_store_register): Rewrite.
+end-sanitize-m32rx
+
+Tue Sep 15 15:01:14 1998 Doug Evans <devans@canuck.cygnus.com>
+
+ * m32r-sim.h (GET_H_SM): New macro.
+ (UART params): Update to msa2000.
+ * devices.c (device_io_read_buffer): Update to msa2000.
+ * m32r.c (m32rb_h_cr_get,m32rb_h_cr_set): Handle bbpc,bbpsw.
+ (m32rb_h_psw_get,m32rb_h_psw_set): New functions.
+ * arch.c,arch.h,cpu.c,cpu.h,sem-switch.c,sem.c: Regenerate.
+start-sanitize-m32rx
+ * m32rx.c (m32rx_h_cr_get,m32rx_h_cr_set): Handle bbpc,bbpsw.
+ (m32rx_h_psw_get,m32rx_h_psw_set): New functions.
+ * cpux.c,cpux.h,readx.c,semx.c: Regenerate.
+end-sanitize-m32rx
+
Wed Sep 9 15:29:36 1998 Doug Evans <devans@canuck.cygnus.com>
* m32r-sim.h (m32r_trap): Update prototype.
M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o
# start-sanitize-m32rx
-M32RX_OBJS = m32rx.o cpux.o decodex.o semx.o modelx.o mloopx.o
+M32RX_OBJS = m32rx.o cpux.o decodex.o extractx.o modelx.o mloopx.o
# end-sanitize-m32rx
CONFIG_DEVICES = dv-sockser.o
SIM_OBJS = \
$(SIM_NEW_COMMON_OBJS) \
sim-cpu.o \
- sim-engine.o \
sim-hload.o \
sim-hrw.o \
sim-model.o \
- sim-reason.o \
+ sim-reg.o \
cgen-utils.o cgen-trace.o cgen-scache.o \
+ cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
sim-if.o arch.o \
$(M32R_OBJS) \
$(start-sanitize-m32rx) \
$(srcdir)/../common/cgen-types.h \
$(srcdir)/../common/cgen-sim.h \
$(srcdir)/../common/cgen-trace.h \
- arch.h cpuall.h m32r-sim.h cpu-opc.h
+ arch.h cpuall.h m32r-sim.h cpu-opc.h \
+ $(srcdir)/../../include/opcode/cgen.h
SIM_EXTRA_CFLAGS =
$(srcdir)/../common/sim-trace.h \
$(srcdir)/../common/sim-profile.h \
tconfig.h
-INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h \
- $(srcdir)/../../include/opcode/cgen.h
+INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS)
OPS_INCLUDE_DEPS = \
$(srcdir)/../common/cgen-mem.h \
$(srcdir)/../common/cgen-ops.h
mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile
rm -f mloop.c
$(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
- -mono -scache -fast m32r $(srcdir)/mloop.in \
- | sed -e 's/@cpu@/m32r/' -e 's/@CPU@/M32R/' >mloop.c
-mloop.o: mloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
+ -mono -fast -pbb -switch sem-switch.c \
+ m32rbf $(srcdir)/mloop.in \
+ | sed -e 's/@cpu@/m32rbf/' -e 's/@CPU@/M32RBF/' >mloop.c
+mloop.o: mloop.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) stamp-cpu
cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
decode.o: decode.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
extract.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
- $(CC) -c $(srcdir)/extract.c $(ALL_CFLAGS) -DSCACHE_P
sem.o: sem.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h
- $(CC) -c $(srcdir)/sem.c $(ALL_CFLAGS) -DSCACHE_P
model.o: model.c $(INCLUDE_DEPS) cpu.h decode.h
-#sem-cache.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h
-# $(CC) -c $(srcdir)/sem.c -o sem-cache.o -DSCACHE_P $(ALL_CFLAGS)
-
# start-sanitize-m32rx
# M32RX objs
mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
rm -f mloopx.c
$(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \
- -mono -no-scache -no-fast -parallel \
- m32r $(srcdir)/mloopx.in \
- | sed -e 's/@cpu@/m32rx/' -e 's/@CPU@/M32RX/' >mloopx.c
-mloopx.o: mloopx.c readx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
+ -mono -no-fast -pbb -parallel -switch semx-switch.c \
+ m32rxf $(srcdir)/mloopx.in \
+ | sed -e 's/@cpu@/m32rxf/' -e 's/@CPU@/M32RXF/' >mloopx.c
+mloopx.o: mloopx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) stamp-xcpu
cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
decodex.o: decodex.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
-semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
+extractx.o: extractx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
+#semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h
modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h decodex.h
# end-sanitize-m32rx
m32r-clean:
- rm -f mloop.c stamp-arch stamp-cpu stamp-decode
+ rm -f mloop.c stamp-arch stamp-cpu
# start-sanitize-m32rx
- rm -f mloopx.c stamp-xcpu stamp-xdecode
+ rm -f mloopx.c stamp-xcpu
# end-sanitize-m32rx
rm -f tmp-*
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
@true
-stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
- $(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \
- cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
+stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
+ $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+ cpu=m32rbf mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
touch stamp-cpu
-cpu.h extract.c sem.c sem-switch.c model.c: $(CGEN_MAINT) stamp-cpu
- @true
-
-stamp-decode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
- $(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn"
- touch stamp-decode
-decode.h decode.c: $(CGEN_MAINT) stamp-decode
+cpu.h extract.c sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
@true
# end-sanitize-cygnus
# start-sanitize-m32rx
-stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu
- $(MAKE) cgen-cpu $(CGEN_FLAGS_TO_PASS) \
- cpu=m32rx mach=m32rx SUFFIX=x FLAGS="with-profile fn" EXTRAFILES="$(CGEN_CPU_READ) $(CGEN_CPU_SEM)"
+stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
+ $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
+ cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEMSW)"
touch stamp-xcpu
-cpux.h readx.c semx.c modelx.c: $(CGEN_MAINT) stamp-xcpu
- @true
-
-stamp-xdecode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu
- $(MAKE) cgen-decode $(CGEN_FLAGS_TO_PASS) \
- cpu=m32rx mach=m32rx SUFFIX=x
- touch stamp-xdecode
-decodex.h decodex.c: $(CGEN_MAINT) stamp-xdecode
+cpux.h extractx.c semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
@true
# end-sanitize-m32rx
SIM_AC_OPTION_ENDIAN(BIG_ENDIAN)
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
SIM_AC_OPTION_HOSTENDIAN
-SIM_AC_OPTION_SCACHE(1024)
+SIM_AC_OPTION_SCACHE(16384)
SIM_AC_OPTION_DEFAULT_MODEL(m32r/d)
SIM_AC_OPTION_ENVIRONMENT
*/
#define WANT_CPU
-#define WANT_CPU_M32RB
+#define WANT_CPU_M32RBF
#include "sim-main.h"
#include "cgen-ops.h"
#include "cpu-sim.h"
void
-EX_FN_NAME (m32rb,fmt_add) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_add) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_add.f
EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_add", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_dr) = f_r1;
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_add3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_add3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_add3.f
EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_add3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_and3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_and3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_and3.f
EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
FLD (f_uimm16) = f_uimm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_and3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_or3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_or3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_or3.f
EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
FLD (f_uimm16) = f_uimm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_or3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "ulo16 0x%x", 'x', f_uimm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_addi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_addi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_addi.f
EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
FLD (f_simm8) = f_simm8;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addi", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_dr) = f_r1;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_addv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_addv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_addv.f
EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_dr) = f_r1;
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_addv3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_addv3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_addv3.f
EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addv3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_addx) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_addx) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_addx.f
EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_dr) = f_r1;
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_bc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_bc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_bc8.f
+#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BC8_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp8) = f_disp8;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_bc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_bc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_bc24.f
+#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BC24_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp24) = f_disp24;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_beq) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_beq) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_beq.f
+#define FLD(f) abuf->fields.cti.fields.fmt_beq.f
EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQ_CODE
FLD (f_r1) = & CPU (h_gr)[f_r1];
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_disp16) = f_disp16;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_beq", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_beqz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_beqz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_beqz.f
+#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
EXTRACT_FMT_BEQZ_CODE
/* Record the fields for the semantic handler. */
FLD (f_r2) = & CPU (h_gr)[f_r2];
FLD (f_disp16) = f_disp16;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_beqz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_bl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_bl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_bl8.f
+#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BL8_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp8) = f_disp8;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << 14);
+ FLD (out_h_gr_14) = 14;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_bl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_bl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_bl24.f
+#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f
EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BL24_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp24) = f_disp24;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << 14);
+ FLD (out_h_gr_14) = 14;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_bra8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_bra8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_bra8.f
+#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
EXTRACT_FMT_BRA8_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp8) = f_disp8;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_bra24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_bra24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_bra24.f
+#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f
EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
EXTRACT_FMT_BRA24_CODE
/* Record the fields for the semantic handler. */
FLD (f_disp24) = f_disp24;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_cmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_cmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_cmp.f
EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_cmp", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_cmpi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_cmpi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_cmpi.f
EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_cmpi", "src2 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_div) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_div) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_div.f
EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (in_dr) = f_r1;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_jl) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_jl) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_jl.f
+#define FLD(f) abuf->fields.cti.fields.fmt_jl.f
EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_JL_CODE
/* Record the fields for the semantic handler. */
FLD (f_r2) = & CPU (h_gr)[f_r2];
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_jl", "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << 14);
+ FLD (in_sr) = f_r2;
+ FLD (out_h_gr_14) = 14;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_jmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_jmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_jmp.f
+#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_JMP_CODE
/* Record the fields for the semantic handler. */
FLD (f_r2) = & CPU (h_gr)[f_r2];
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_jmp", "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
+ FLD (in_sr) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ld) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ld) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ld.f
EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ld_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ld_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ld_d.f
EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ldb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ldb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ldb.f
EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldb", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ldb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ldb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ldb_d.f
EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldb_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ldh) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ldh) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ldh.f
EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldh", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ldh_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ldh_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ldh_d.f
EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldh_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ld_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ld_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ld_plus.f
EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld_plus", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1) | (1 << f_r2);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ FLD (out_sr) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ld24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ld24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ld24.f
EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
FLD (f_uimm24) = f_uimm24;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld24", "dr 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ldi8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ldi8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ldi8.f
EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
FLD (f_simm8) = f_simm8;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldi8", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_ldi16) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_ldi16) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_ldi16.f
EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldi16", "dr 0x%x", 'x', f_r1, "slo16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_lock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_lock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_lock.f
EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_lock", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_machi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_machi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_machi.f
EXTRACT_FMT_MACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_machi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_mulhi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_mulhi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_mulhi.f
EXTRACT_FMT_MULHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mulhi", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1) | (1 << f_r2);
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_mv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_mv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_mv.f
EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_mvfachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_mvfachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_mvfachi.f
EXTRACT_FMT_MVFACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r1) = & CPU (h_gr)[f_r1];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvfachi", "dr 0x%x", 'x', f_r1, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_mvfc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_mvfc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_mvfc.f
EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = f_r2;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvfc", "dr 0x%x", 'x', f_r1, "scr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_mvtachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_mvtachi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_mvtachi.f
EXTRACT_FMT_MVTACHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r1) = & CPU (h_gr)[f_r1];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvtachi", "src1 0x%x", 'x', f_r1, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1);
+ FLD (in_src1) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_mvtc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_mvtc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_mvtc.f
EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvtc", "dcr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
+ FLD (in_sr) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_nop) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_nop) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_nop.f
EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
/* Record the fields for the semantic handler. */
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_nop", (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_rac) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_rac) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_rac.f
EXTRACT_FMT_RAC_VARS /* f-op1 f-r1 f-op2 f-r2 */
/* Record the fields for the semantic handler. */
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_rac", (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_rte) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_rte) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_rte.f
+#define FLD(f) abuf->fields.cti.fields.fmt_rte.f
EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
EXTRACT_FMT_RTE_CODE
/* Record the fields for the semantic handler. */
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_rte", (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_seth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_seth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_seth.f
EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
FLD (f_hi16) = f_hi16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_seth", "dr 0x%x", 'x', f_r1, "hi16 0x%x", 'x', f_hi16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_sll3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_sll3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_sll3.f
EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sll3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_slli) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_slli) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_slli.f
EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
FLD (f_uimm5) = f_uimm5;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_slli", "dr 0x%x", 'x', f_r1, "uimm5 0x%x", 'x', f_uimm5, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r1);
- abuf->h_gr_set = 0 | (1 << f_r1);
+ FLD (in_dr) = f_r1;
+ FLD (out_dr) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_st) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_st) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_st.f
EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_st", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_st_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_st_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_st_d.f
EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_st_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_stb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_stb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_stb.f
EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_stb", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_stb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_stb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_stb_d.f
EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_stb_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_sth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_sth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_sth.f
EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sth", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_sth_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_sth_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_sth_d.f
EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
FLD (f_simm16) = f_simm16;
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sth_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_st_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_st_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_st_plus.f
EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_st_plus", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
- abuf->h_gr_set = 0 | (1 << f_r2);
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
+ FLD (out_src2) = f_r2;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_trap) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_trap) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
-#define FLD(f) abuf->fields.fmt_trap.f
+#define FLD(f) abuf->fields.cti.fields.fmt_trap.f
EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
EXTRACT_FMT_TRAP_CODE
/* Record the fields for the semantic handler. */
FLD (f_uimm4) = f_uimm4;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_trap", "uimm4 0x%x", 'x', f_uimm4, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,fmt_unlock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_unlock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
#define FLD(f) abuf->fields.fmt_unlock.f
EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
FLD (f_r2) = & CPU (h_gr)[f_r2];
TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_unlock", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
- abuf->length = length;
- abuf->addr = pc;
-
#if WITH_PROFILE_MODEL_P
/* Record the fields for profiling. */
if (PROFILE_MODEL_P (current_cpu))
{
- abuf->h_gr_get = 0 | (1 << f_r2) | (1 << f_r1);
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
}
#endif
#undef FLD
}
void
-EX_FN_NAME (m32rb,illegal) (SIM_CPU *cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+EX_FN_NAME (m32rbf,fmt_empty) (SIM_CPU *cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
{
- abuf->length = CGEN_BASE_INSN_SIZE;
- abuf->addr = pc;
- /* Leave signalling to semantic fn. */
+ /* Empty format handler for virtual insns. */
}
-
-#if 0 /*wip*/
-void
-EXC_FN_NAME (m32rb,illegal) (SIM_CPU *cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
-{
- abuf->length = CGEN_BASE_INSN_SIZE;
- abuf->addr = pc;
- /* Leave signalling to semantic fn. */
-}
-#endif
--- /dev/null
+/* Simulator instruction extractor for m32r.
+
+THIS FILE IS MACHINE GENERATED WITH CGEN.
+
+Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
+
+This file is part of the GNU Simulators.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License along
+with this program; if not, write to the Free Software Foundation, Inc.,
+59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+
+*/
+
+#define WANT_CPU
+#define WANT_CPU_M32RXF
+
+#include "sim-main.h"
+#include "cgen-ops.h"
+#include "cpu-sim.h"
+
+void
+EX_FN_NAME (m32rxf,fmt_add) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_add.f
+ EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_ADD_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_add", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_dr) = f_r1;
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_add3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_add3.f
+ EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_ADD3_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_add3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_and3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_and3.f
+ EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+
+ EXTRACT_FMT_AND3_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_and3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "uimm16 0x%x", 'x', f_uimm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_or3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_or3.f
+ EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+
+ EXTRACT_FMT_OR3_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_uimm16) = f_uimm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_or3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "ulo16 0x%x", 'x', f_uimm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_addi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_addi.f
+ EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
+
+ EXTRACT_FMT_ADDI_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_simm8) = f_simm8;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addi", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_dr) = f_r1;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_addv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_addv.f
+ EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_ADDV_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_dr) = f_r1;
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_addv3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_addv3.f
+ EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_ADDV3_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addv3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_addx) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_addx.f
+ EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_ADDX_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_addx", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_dr) = f_r1;
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_bc8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
+ EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
+
+ EXTRACT_FMT_BC8_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_disp8) = f_disp8;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_bc24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
+ EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
+
+ EXTRACT_FMT_BC24_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_disp24) = f_disp24;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_beq) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_beq.f
+ EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+
+ EXTRACT_FMT_BEQ_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_disp16) = f_disp16;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_beq", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_beqz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
+ EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
+
+ EXTRACT_FMT_BEQZ_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_disp16) = f_disp16;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_beqz", "src2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_bl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
+ EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
+
+ EXTRACT_FMT_BL8_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_disp8) = f_disp8;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_h_gr_14) = 14;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_bl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f
+ EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
+
+ EXTRACT_FMT_BL24_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_disp24) = f_disp24;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_h_gr_14) = 14;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_bcl8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
+ EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
+
+ EXTRACT_FMT_BCL8_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_disp8) = f_disp8;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bcl8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_h_gr_14) = 14;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_bcl24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
+ EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
+
+ EXTRACT_FMT_BCL24_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_disp24) = f_disp24;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bcl24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_h_gr_14) = 14;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_bra8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
+ EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
+
+ EXTRACT_FMT_BRA8_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_disp8) = f_disp8;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_bra24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f
+ EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
+
+ EXTRACT_FMT_BRA24_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_disp24) = f_disp24;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_cmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_cmp.f
+ EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_CMP_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_cmp", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_cmpi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_cmpi.f
+ EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_CMPI_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_cmpi", "src2 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_cmpz) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_cmpz.f
+ EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_CMPZ_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_cmpz", "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_div) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_div.f
+ EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_DIV_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_div", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (in_dr) = f_r1;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_jc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_jc.f
+ EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_JC_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_jc", "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_jl) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_jl.f
+ EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_JL_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_jl", "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_h_gr_14) = 14;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_jmp) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
+ EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_JMP_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_jmp", "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ld) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ld.f
+ EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_LD_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ld_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ld_d.f
+ EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_LD_D_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ldb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ldb.f
+ EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_LDB_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldb", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ldb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ldb_d.f
+ EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_LDB_D_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldb_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ldh) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ldh.f
+ EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_LDH_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldh", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ldh_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ldh_d.f
+ EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_LDH_D_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldh_d", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ld_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ld_plus.f
+ EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_LD_PLUS_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld_plus", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ FLD (out_sr) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ld24) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ld24.f
+ EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
+
+ EXTRACT_FMT_LD24_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_uimm24) = f_uimm24;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ld24", "dr 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ldi8) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ldi8.f
+ EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
+
+ EXTRACT_FMT_LDI8_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_simm8) = f_simm8;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldi8", "dr 0x%x", 'x', f_r1, "simm8 0x%x", 'x', f_simm8, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_ldi16) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_ldi16.f
+ EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_LDI16_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_ldi16", "dr 0x%x", 'x', f_r1, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_lock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_lock.f
+ EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_LOCK_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_lock", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_machi_a) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_machi_a.f
+ EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+
+ EXTRACT_FMT_MACHI_A_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_acc) = f_acc;
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_machi_a", "src1 0x%x", 'x', f_r1, "acc 0x%x", 'x', f_acc, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_mulhi_a) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_mulhi_a.f
+ EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+
+ EXTRACT_FMT_MULHI_A_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_acc) = f_acc;
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mulhi_a", "src1 0x%x", 'x', f_r1, "acc 0x%x", 'x', f_acc, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_mv) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_mv.f
+ EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_MV_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mv", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_mvfachi_a) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_mvfachi_a.f
+ EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+
+ EXTRACT_FMT_MVFACHI_A_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_accs) = f_accs;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvfachi_a", "dr 0x%x", 'x', f_r1, "accs 0x%x", 'x', f_accs, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_mvfc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_mvfc.f
+ EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_MVFC_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = f_r2;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvfc", "dr 0x%x", 'x', f_r1, "scr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_mvtachi_a) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_mvtachi_a.f
+ EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
+
+ EXTRACT_FMT_MVTACHI_A_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_accs) = f_accs;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvtachi_a", "src1 0x%x", 'x', f_r1, "accs 0x%x", 'x', f_accs, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src1) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_mvtc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_mvtc.f
+ EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_MVTC_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = f_r1;
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mvtc", "dcr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_nop) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_nop.f
+ EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_NOP_CODE
+
+ /* Record the fields for the semantic handler. */
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_nop", (char *) 0));
+
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_rac_dsi) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_rac_dsi.f
+ EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
+
+ EXTRACT_FMT_RAC_DSI_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_accd) = f_accd;
+ FLD (f_accs) = f_accs;
+ FLD (f_imm1) = f_imm1;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_rac_dsi", "accd 0x%x", 'x', f_accd, "accs 0x%x", 'x', f_accs, "imm1 0x%x", 'x', f_imm1, (char *) 0));
+
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_rte) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_rte.f
+ EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_RTE_CODE
+
+ /* Record the fields for the semantic handler. */
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_rte", (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_seth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_seth.f
+ EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
+
+ EXTRACT_FMT_SETH_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_hi16) = f_hi16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_seth", "dr 0x%x", 'x', f_r1, "hi16 0x%x", 'x', f_hi16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_sll3) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_sll3.f
+ EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_SLL3_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sll3", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "simm16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_slli) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_slli.f
+ EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
+
+ EXTRACT_FMT_SLLI_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_uimm5) = f_uimm5;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_slli", "dr 0x%x", 'x', f_r1, "uimm5 0x%x", 'x', f_uimm5, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_dr) = f_r1;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_st) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_st.f
+ EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_ST_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_st", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_st_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_st_d.f
+ EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_ST_D_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_st_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_stb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_stb.f
+ EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_STB_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_stb", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_stb_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_stb_d.f
+ EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_STB_D_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_stb_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_sth) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_sth.f
+ EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_STH_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sth", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_sth_d) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_sth_d.f
+ EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
+
+ EXTRACT_FMT_STH_D_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ FLD (f_simm16) = f_simm16;
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sth_d", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, "slo16 0x%x", 'x', f_simm16, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_st_plus) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_st_plus.f
+ EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_ST_PLUS_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_st_plus", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
+ FLD (out_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_trap) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.cti.fields.fmt_trap.f
+ EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
+
+ EXTRACT_FMT_TRAP_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_uimm4) = f_uimm4;
+ SEM_BRANCH_INIT_EXTRACT (abuf);
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_trap", "uimm4 0x%x", 'x', f_uimm4, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_unlock) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_unlock.f
+ EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_UNLOCK_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_unlock", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src2) = f_r2;
+ FLD (in_src1) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_satb) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_satb.f
+ EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+
+ EXTRACT_FMT_SATB_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_satb", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_sat) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_sat.f
+ EXTRACT_FMT_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
+
+ EXTRACT_FMT_SAT_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sat", "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_sr) = f_r2;
+ FLD (out_dr) = f_r1;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_sadd) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_sadd.f
+ EXTRACT_FMT_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_SADD_CODE
+
+ /* Record the fields for the semantic handler. */
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sadd", (char *) 0));
+
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_macwu1) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_macwu1.f
+ EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_MACWU1_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_macwu1", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_msblo) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_msblo.f
+ EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_MSBLO_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_msblo", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_mulwu1) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_mulwu1.f
+ EXTRACT_FMT_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_MULWU1_CODE
+
+ /* Record the fields for the semantic handler. */
+ FLD (f_r1) = & CPU (h_gr)[f_r1];
+ FLD (f_r2) = & CPU (h_gr)[f_r2];
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_mulwu1", "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0));
+
+#if WITH_PROFILE_MODEL_P
+ /* Record the fields for profiling. */
+ if (PROFILE_MODEL_P (current_cpu))
+ {
+ FLD (in_src1) = f_r1;
+ FLD (in_src2) = f_r2;
+ }
+#endif
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_sc) (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+#define FLD(f) abuf->fields.fmt_sc.f
+ EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
+
+ EXTRACT_FMT_SC_CODE
+
+ /* Record the fields for the semantic handler. */
+ TRACE_EXTRACT (current_cpu, (current_cpu, pc, "fmt_sc", (char *) 0));
+
+#undef FLD
+}
+
+void
+EX_FN_NAME (m32rxf,fmt_empty) (SIM_CPU *cpu, PCADDR pc, insn_t insn, ARGBUF *abuf)
+{
+ /* Empty format handler for virtual insns. */
+}
+++ /dev/null
-/* Simulator instruction operand reader for m32r.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#ifdef DEFINE_LABELS
-#undef DEFINE_LABELS
-
- /* The labels have the case they have because the enum of insn types
- is all uppercase and in the non-stdc case the fmt symbol is built
- into the enum name. */
-
- static struct {
- int index;
- void *label;
- } labels[] = {
- { M32RX_XINSN_ILLEGAL, && case_read_READ_ILLEGAL },
- { M32RX_XINSN_ADD, && case_read_READ_FMT_ADD },
- { M32RX_XINSN_ADD3, && case_read_READ_FMT_ADD3 },
- { M32RX_XINSN_AND, && case_read_READ_FMT_ADD },
- { M32RX_XINSN_AND3, && case_read_READ_FMT_AND3 },
- { M32RX_XINSN_OR, && case_read_READ_FMT_ADD },
- { M32RX_XINSN_OR3, && case_read_READ_FMT_OR3 },
- { M32RX_XINSN_XOR, && case_read_READ_FMT_ADD },
- { M32RX_XINSN_XOR3, && case_read_READ_FMT_AND3 },
- { M32RX_XINSN_ADDI, && case_read_READ_FMT_ADDI },
- { M32RX_XINSN_ADDV, && case_read_READ_FMT_ADDV },
- { M32RX_XINSN_ADDV3, && case_read_READ_FMT_ADDV3 },
- { M32RX_XINSN_ADDX, && case_read_READ_FMT_ADDX },
- { M32RX_XINSN_BC8, && case_read_READ_FMT_BC8 },
- { M32RX_XINSN_BC24, && case_read_READ_FMT_BC24 },
- { M32RX_XINSN_BEQ, && case_read_READ_FMT_BEQ },
- { M32RX_XINSN_BEQZ, && case_read_READ_FMT_BEQZ },
- { M32RX_XINSN_BGEZ, && case_read_READ_FMT_BEQZ },
- { M32RX_XINSN_BGTZ, && case_read_READ_FMT_BEQZ },
- { M32RX_XINSN_BLEZ, && case_read_READ_FMT_BEQZ },
- { M32RX_XINSN_BLTZ, && case_read_READ_FMT_BEQZ },
- { M32RX_XINSN_BNEZ, && case_read_READ_FMT_BEQZ },
- { M32RX_XINSN_BL8, && case_read_READ_FMT_BL8 },
- { M32RX_XINSN_BL24, && case_read_READ_FMT_BL24 },
- { M32RX_XINSN_BCL8, && case_read_READ_FMT_BCL8 },
- { M32RX_XINSN_BCL24, && case_read_READ_FMT_BCL24 },
- { M32RX_XINSN_BNC8, && case_read_READ_FMT_BC8 },
- { M32RX_XINSN_BNC24, && case_read_READ_FMT_BC24 },
- { M32RX_XINSN_BNE, && case_read_READ_FMT_BEQ },
- { M32RX_XINSN_BRA8, && case_read_READ_FMT_BRA8 },
- { M32RX_XINSN_BRA24, && case_read_READ_FMT_BRA24 },
- { M32RX_XINSN_BNCL8, && case_read_READ_FMT_BCL8 },
- { M32RX_XINSN_BNCL24, && case_read_READ_FMT_BCL24 },
- { M32RX_XINSN_CMP, && case_read_READ_FMT_CMP },
- { M32RX_XINSN_CMPI, && case_read_READ_FMT_CMPI },
- { M32RX_XINSN_CMPU, && case_read_READ_FMT_CMP },
- { M32RX_XINSN_CMPUI, && case_read_READ_FMT_CMPI },
- { M32RX_XINSN_CMPEQ, && case_read_READ_FMT_CMP },
- { M32RX_XINSN_CMPZ, && case_read_READ_FMT_CMPZ },
- { M32RX_XINSN_DIV, && case_read_READ_FMT_DIV },
- { M32RX_XINSN_DIVU, && case_read_READ_FMT_DIV },
- { M32RX_XINSN_REM, && case_read_READ_FMT_DIV },
- { M32RX_XINSN_REMU, && case_read_READ_FMT_DIV },
- { M32RX_XINSN_DIVH, && case_read_READ_FMT_DIV },
- { M32RX_XINSN_JC, && case_read_READ_FMT_JC },
- { M32RX_XINSN_JNC, && case_read_READ_FMT_JC },
- { M32RX_XINSN_JL, && case_read_READ_FMT_JL },
- { M32RX_XINSN_JMP, && case_read_READ_FMT_JMP },
- { M32RX_XINSN_LD, && case_read_READ_FMT_LD },
- { M32RX_XINSN_LD_D, && case_read_READ_FMT_LD_D },
- { M32RX_XINSN_LDB, && case_read_READ_FMT_LDB },
- { M32RX_XINSN_LDB_D, && case_read_READ_FMT_LDB_D },
- { M32RX_XINSN_LDH, && case_read_READ_FMT_LDH },
- { M32RX_XINSN_LDH_D, && case_read_READ_FMT_LDH_D },
- { M32RX_XINSN_LDUB, && case_read_READ_FMT_LDB },
- { M32RX_XINSN_LDUB_D, && case_read_READ_FMT_LDB_D },
- { M32RX_XINSN_LDUH, && case_read_READ_FMT_LDH },
- { M32RX_XINSN_LDUH_D, && case_read_READ_FMT_LDH_D },
- { M32RX_XINSN_LD_PLUS, && case_read_READ_FMT_LD_PLUS },
- { M32RX_XINSN_LD24, && case_read_READ_FMT_LD24 },
- { M32RX_XINSN_LDI8, && case_read_READ_FMT_LDI8 },
- { M32RX_XINSN_LDI16, && case_read_READ_FMT_LDI16 },
- { M32RX_XINSN_LOCK, && case_read_READ_FMT_LOCK },
- { M32RX_XINSN_MACHI_A, && case_read_READ_FMT_MACHI_A },
- { M32RX_XINSN_MACLO_A, && case_read_READ_FMT_MACHI_A },
- { M32RX_XINSN_MACWHI_A, && case_read_READ_FMT_MACHI_A },
- { M32RX_XINSN_MACWLO_A, && case_read_READ_FMT_MACHI_A },
- { M32RX_XINSN_MUL, && case_read_READ_FMT_ADD },
- { M32RX_XINSN_MULHI_A, && case_read_READ_FMT_MULHI_A },
- { M32RX_XINSN_MULLO_A, && case_read_READ_FMT_MULHI_A },
- { M32RX_XINSN_MULWHI_A, && case_read_READ_FMT_MULHI_A },
- { M32RX_XINSN_MULWLO_A, && case_read_READ_FMT_MULHI_A },
- { M32RX_XINSN_MV, && case_read_READ_FMT_MV },
- { M32RX_XINSN_MVFACHI_A, && case_read_READ_FMT_MVFACHI_A },
- { M32RX_XINSN_MVFACLO_A, && case_read_READ_FMT_MVFACHI_A },
- { M32RX_XINSN_MVFACMI_A, && case_read_READ_FMT_MVFACHI_A },
- { M32RX_XINSN_MVFC, && case_read_READ_FMT_MVFC },
- { M32RX_XINSN_MVTACHI_A, && case_read_READ_FMT_MVTACHI_A },
- { M32RX_XINSN_MVTACLO_A, && case_read_READ_FMT_MVTACHI_A },
- { M32RX_XINSN_MVTC, && case_read_READ_FMT_MVTC },
- { M32RX_XINSN_NEG, && case_read_READ_FMT_MV },
- { M32RX_XINSN_NOP, && case_read_READ_FMT_NOP },
- { M32RX_XINSN_NOT, && case_read_READ_FMT_MV },
- { M32RX_XINSN_RAC_DSI, && case_read_READ_FMT_RAC_DSI },
- { M32RX_XINSN_RACH_DSI, && case_read_READ_FMT_RAC_DSI },
- { M32RX_XINSN_RTE, && case_read_READ_FMT_RTE },
- { M32RX_XINSN_SETH, && case_read_READ_FMT_SETH },
- { M32RX_XINSN_SLL, && case_read_READ_FMT_ADD },
- { M32RX_XINSN_SLL3, && case_read_READ_FMT_SLL3 },
- { M32RX_XINSN_SLLI, && case_read_READ_FMT_SLLI },
- { M32RX_XINSN_SRA, && case_read_READ_FMT_ADD },
- { M32RX_XINSN_SRA3, && case_read_READ_FMT_SLL3 },
- { M32RX_XINSN_SRAI, && case_read_READ_FMT_SLLI },
- { M32RX_XINSN_SRL, && case_read_READ_FMT_ADD },
- { M32RX_XINSN_SRL3, && case_read_READ_FMT_SLL3 },
- { M32RX_XINSN_SRLI, && case_read_READ_FMT_SLLI },
- { M32RX_XINSN_ST, && case_read_READ_FMT_ST },
- { M32RX_XINSN_ST_D, && case_read_READ_FMT_ST_D },
- { M32RX_XINSN_STB, && case_read_READ_FMT_STB },
- { M32RX_XINSN_STB_D, && case_read_READ_FMT_STB_D },
- { M32RX_XINSN_STH, && case_read_READ_FMT_STH },
- { M32RX_XINSN_STH_D, && case_read_READ_FMT_STH_D },
- { M32RX_XINSN_ST_PLUS, && case_read_READ_FMT_ST_PLUS },
- { M32RX_XINSN_ST_MINUS, && case_read_READ_FMT_ST_PLUS },
- { M32RX_XINSN_SUB, && case_read_READ_FMT_ADD },
- { M32RX_XINSN_SUBV, && case_read_READ_FMT_ADDV },
- { M32RX_XINSN_SUBX, && case_read_READ_FMT_ADDX },
- { M32RX_XINSN_TRAP, && case_read_READ_FMT_TRAP },
- { M32RX_XINSN_UNLOCK, && case_read_READ_FMT_UNLOCK },
- { M32RX_XINSN_SATB, && case_read_READ_FMT_SATB },
- { M32RX_XINSN_SATH, && case_read_READ_FMT_SATB },
- { M32RX_XINSN_SAT, && case_read_READ_FMT_SAT },
- { M32RX_XINSN_PCMPBZ, && case_read_READ_FMT_CMPZ },
- { M32RX_XINSN_SADD, && case_read_READ_FMT_SADD },
- { M32RX_XINSN_MACWU1, && case_read_READ_FMT_MACWU1 },
- { M32RX_XINSN_MSBLO, && case_read_READ_FMT_MSBLO },
- { M32RX_XINSN_MULWU1, && case_read_READ_FMT_MULWU1 },
- { M32RX_XINSN_MACLH1, && case_read_READ_FMT_MACWU1 },
- { M32RX_XINSN_SC, && case_read_READ_FMT_SC },
- { M32RX_XINSN_SNC, && case_read_READ_FMT_SC },
- { 0, 0 }
- };
- int i;
-
- for (i = 0; labels[i].label != 0; ++i)
- CPU_IDESC (current_cpu) [labels[i].index].read = labels[i].label;
-
-#endif /* DEFINE_LABELS */
-
-#ifdef DEFINE_SWITCH
-#undef DEFINE_SWITCH
-
-{
- SWITCH (read, decode->read)
- {
-
- CASE (read, READ_ILLEGAL) :
- {
- sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/);
- }
- BREAK (read);
-
- CASE (read, READ_FMT_ADD) : /* e.g. add $dr,$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_add.f
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (dr) = CPU (h_gr[f_r1]);
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_ADD3) : /* e.g. add3 $dr,$sr,$hash$slo16 */
- {
-#define OPRND(f) par_exec->operands.fmt_add3.f
- EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_ADD3_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (sr) = CPU (h_gr[f_r2]);
- OPRND (slo16) = f_simm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_AND3) : /* e.g. and3 $dr,$sr,$uimm16 */
- {
-#define OPRND(f) par_exec->operands.fmt_and3.f
- EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_AND3_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (sr) = CPU (h_gr[f_r2]);
- OPRND (uimm16) = f_uimm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_OR3) : /* e.g. or3 $dr,$sr,$hash$ulo16 */
- {
-#define OPRND(f) par_exec->operands.fmt_or3.f
- EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_OR3_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (sr) = CPU (h_gr[f_r2]);
- OPRND (ulo16) = f_uimm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_ADDI) : /* e.g. addi $dr,$simm8 */
- {
-#define OPRND(f) par_exec->operands.fmt_addi.f
- EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
- EXTRACT_FMT_ADDI_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (dr) = CPU (h_gr[f_r1]);
- OPRND (simm8) = f_simm8;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_ADDV) : /* e.g. addv $dr,$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_addv.f
- EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADDV_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (dr) = CPU (h_gr[f_r1]);
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_ADDV3) : /* e.g. addv3 $dr,$sr,$simm16 */
- {
-#define OPRND(f) par_exec->operands.fmt_addv3.f
- EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_ADDV3_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (sr) = CPU (h_gr[f_r2]);
- OPRND (simm16) = f_simm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_ADDX) : /* e.g. addx $dr,$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_addx.f
- EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADDX_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (dr) = CPU (h_gr[f_r1]);
- OPRND (sr) = CPU (h_gr[f_r2]);
- OPRND (condbit) = CPU (h_cond);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BC8) : /* e.g. bc.s $disp8 */
- {
-#define OPRND(f) par_exec->operands.fmt_bc8.f
- EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BC8_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (condbit) = CPU (h_cond);
- OPRND (disp8) = f_disp8;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BC24) : /* e.g. bc.l $disp24 */
- {
-#define OPRND(f) par_exec->operands.fmt_bc24.f
- EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BC24_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (condbit) = CPU (h_cond);
- OPRND (disp24) = f_disp24;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BEQ) : /* e.g. beq $src1,$src2,$disp16 */
- {
-#define OPRND(f) par_exec->operands.fmt_beq.f
- EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQ_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (disp16) = f_disp16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BEQZ) : /* e.g. beqz $src2,$disp16 */
- {
-#define OPRND(f) par_exec->operands.fmt_beqz.f
- EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQZ_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (disp16) = f_disp16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BL8) : /* e.g. bl.s $disp8 */
- {
-#define OPRND(f) par_exec->operands.fmt_bl8.f
- EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BL8_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (pc) = CPU (h_pc);
- OPRND (disp8) = f_disp8;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BL24) : /* e.g. bl.l $disp24 */
- {
-#define OPRND(f) par_exec->operands.fmt_bl24.f
- EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BL24_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (pc) = CPU (h_pc);
- OPRND (disp24) = f_disp24;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BCL8) : /* e.g. bcl.s $disp8 */
- {
-#define OPRND(f) par_exec->operands.fmt_bcl8.f
- EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BCL8_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (condbit) = CPU (h_cond);
- OPRND (pc) = CPU (h_pc);
- OPRND (disp8) = f_disp8;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BCL24) : /* e.g. bcl.l $disp24 */
- {
-#define OPRND(f) par_exec->operands.fmt_bcl24.f
- EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BCL24_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (condbit) = CPU (h_cond);
- OPRND (pc) = CPU (h_pc);
- OPRND (disp24) = f_disp24;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BRA8) : /* e.g. bra.s $disp8 */
- {
-#define OPRND(f) par_exec->operands.fmt_bra8.f
- EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BRA8_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (disp8) = f_disp8;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_BRA24) : /* e.g. bra.l $disp24 */
- {
-#define OPRND(f) par_exec->operands.fmt_bra24.f
- EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BRA24_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (disp24) = f_disp24;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_CMP) : /* e.g. cmp $src1,$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_cmp.f
- EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_CMP_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_CMPI) : /* e.g. cmpi $src2,$simm16 */
- {
-#define OPRND(f) par_exec->operands.fmt_cmpi.f
- EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_CMPI_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (simm16) = f_simm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_CMPZ) : /* e.g. cmpz $src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_cmpz.f
- EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_CMPZ_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_DIV) : /* e.g. div $dr,$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_div.f
- EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_DIV_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (dr) = CPU (h_gr[f_r1]);
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_JC) : /* e.g. jc $sr */
- {
-#define OPRND(f) par_exec->operands.fmt_jc.f
- EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JC_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (condbit) = CPU (h_cond);
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_JL) : /* e.g. jl $sr */
- {
-#define OPRND(f) par_exec->operands.fmt_jl.f
- EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JL_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (pc) = CPU (h_pc);
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_JMP) : /* e.g. jmp $sr */
- {
-#define OPRND(f) par_exec->operands.fmt_jmp.f
- EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JMP_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LD) : /* e.g. ld $dr,@$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_ld.f
- EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LD_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2]));
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LD_D) : /* e.g. ld $dr,@($slo16,$sr) */
- {
-#define OPRND(f) par_exec->operands.fmt_ld_d.f
- EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LD_D_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_memory_add__VM_sr_slo16) = GETMEMSI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
- OPRND (sr) = CPU (h_gr[f_r2]);
- OPRND (slo16) = f_simm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LDB) : /* e.g. ldb $dr,@$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_ldb.f
- EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LDB_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_memory_sr) = GETMEMQI (current_cpu, CPU (h_gr[f_r2]));
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LDB_D) : /* e.g. ldb $dr,@($slo16,$sr) */
- {
-#define OPRND(f) par_exec->operands.fmt_ldb_d.f
- EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDB_D_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_memory_add__VM_sr_slo16) = GETMEMQI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
- OPRND (sr) = CPU (h_gr[f_r2]);
- OPRND (slo16) = f_simm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LDH) : /* e.g. ldh $dr,@$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_ldh.f
- EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LDH_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_memory_sr) = GETMEMHI (current_cpu, CPU (h_gr[f_r2]));
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LDH_D) : /* e.g. ldh $dr,@($slo16,$sr) */
- {
-#define OPRND(f) par_exec->operands.fmt_ldh_d.f
- EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDH_D_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_memory_add__VM_sr_slo16) = GETMEMHI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
- OPRND (sr) = CPU (h_gr[f_r2]);
- OPRND (slo16) = f_simm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LD_PLUS) : /* e.g. ld $dr,@$sr+ */
- {
-#define OPRND(f) par_exec->operands.fmt_ld_plus.f
- EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LD_PLUS_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2]));
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LD24) : /* e.g. ld24 $dr,$uimm24 */
- {
-#define OPRND(f) par_exec->operands.fmt_ld24.f
- EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
- EXTRACT_FMT_LD24_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (uimm24) = f_uimm24;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LDI8) : /* e.g. ldi8 $dr,$simm8 */
- {
-#define OPRND(f) par_exec->operands.fmt_ldi8.f
- EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
- EXTRACT_FMT_LDI8_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (simm8) = f_simm8;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LDI16) : /* e.g. ldi16 $dr,$hash$slo16 */
- {
-#define OPRND(f) par_exec->operands.fmt_ldi16.f
- EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDI16_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (slo16) = f_simm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_LOCK) : /* e.g. lock $dr,@$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_lock.f
- EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LOCK_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2]));
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MACHI_A) : /* e.g. machi $src1,$src2,$acc */
- {
-#define OPRND(f) par_exec->operands.fmt_machi_a.f
- EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MACHI_A_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (acc) = m32rx_h_accums_get (current_cpu, f_acc);
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
- {
-#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
- EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MULHI_A_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MV) : /* e.g. mv $dr,$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_mv.f
- EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MV_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MVFACHI_A) : /* e.g. mvfachi $dr,$accs */
- {
-#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
- EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_MVFACHI_A_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MVFC) : /* e.g. mvfc $dr,$scr */
- {
-#define OPRND(f) par_exec->operands.fmt_mvfc.f
- EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MVFC_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (scr) = m32rx_h_cr_get (current_cpu, f_r2);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MVTACHI_A) : /* e.g. mvtachi $src1,$accs */
- {
-#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
- EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_MVTACHI_A_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
- OPRND (src1) = CPU (h_gr[f_r1]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MVTC) : /* e.g. mvtc $sr,$dcr */
- {
-#define OPRND(f) par_exec->operands.fmt_mvtc.f
- EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MVTC_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_NOP) : /* e.g. nop */
- {
-#define OPRND(f) par_exec->operands.fmt_nop.f
- EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_NOP_CODE
- /* Fetch the input operands for the semantic handler. */
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_RAC_DSI) : /* e.g. rac $accd,$accs,$imm1 */
- {
-#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
- EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_RAC_DSI_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
- OPRND (imm1) = f_imm1;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_RTE) : /* e.g. rte */
- {
-#define OPRND(f) par_exec->operands.fmt_rte.f
- EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_RTE_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_cr_6) = m32rx_h_cr_get (current_cpu, ((HOSTUINT) 6));
- OPRND (h_cr_14) = m32rx_h_cr_get (current_cpu, ((HOSTUINT) 14));
- OPRND (h_bpsw_0) = CPU (h_bpsw);
- OPRND (h_bbpsw_0) = CPU (h_bbpsw);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_SETH) : /* e.g. seth $dr,$hash$hi16 */
- {
-#define OPRND(f) par_exec->operands.fmt_seth.f
- EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
- EXTRACT_FMT_SETH_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (hi16) = f_hi16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_SLL3) : /* e.g. sll3 $dr,$sr,$simm16 */
- {
-#define OPRND(f) par_exec->operands.fmt_sll3.f
- EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_SLL3_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (sr) = CPU (h_gr[f_r2]);
- OPRND (simm16) = f_simm16;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_SLLI) : /* e.g. slli $dr,$uimm5 */
- {
-#define OPRND(f) par_exec->operands.fmt_slli.f
- EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_SLLI_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (dr) = CPU (h_gr[f_r1]);
- OPRND (uimm5) = f_uimm5;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_ST) : /* e.g. st $src1,@$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_st.f
- EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ST_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (src1) = CPU (h_gr[f_r1]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_ST_D) : /* e.g. st $src1,@($slo16,$src2) */
- {
-#define OPRND(f) par_exec->operands.fmt_st_d.f
- EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_ST_D_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (slo16) = f_simm16;
- OPRND (src1) = CPU (h_gr[f_r1]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_STB) : /* e.g. stb $src1,@$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_stb.f
- EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_STB_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (src1) = CPU (h_gr[f_r1]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_STB_D) : /* e.g. stb $src1,@($slo16,$src2) */
- {
-#define OPRND(f) par_exec->operands.fmt_stb_d.f
- EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_STB_D_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (slo16) = f_simm16;
- OPRND (src1) = CPU (h_gr[f_r1]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_STH) : /* e.g. sth $src1,@$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_sth.f
- EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_STH_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (src1) = CPU (h_gr[f_r1]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_STH_D) : /* e.g. sth $src1,@($slo16,$src2) */
- {
-#define OPRND(f) par_exec->operands.fmt_sth_d.f
- EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_STH_D_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (slo16) = f_simm16;
- OPRND (src1) = CPU (h_gr[f_r1]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_ST_PLUS) : /* e.g. st $src1,@+$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_st_plus.f
- EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ST_PLUS_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (src1) = CPU (h_gr[f_r1]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_TRAP) : /* e.g. trap $uimm4 */
- {
-#define OPRND(f) par_exec->operands.fmt_trap.f
- EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
- EXTRACT_FMT_TRAP_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_cr_6) = m32rx_h_cr_get (current_cpu, ((HOSTUINT) 6));
- OPRND (h_bpsw_0) = CPU (h_bpsw);
- OPRND (h_psw_0) = m32rx_h_psw_get (current_cpu);
- OPRND (pc) = CPU (h_pc);
- OPRND (uimm4) = f_uimm4;
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_UNLOCK) : /* e.g. unlock $src1,@$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_unlock.f
- EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_UNLOCK_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_lock_0) = CPU (h_lock);
- OPRND (src2) = CPU (h_gr[f_r2]);
- OPRND (src1) = CPU (h_gr[f_r1]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_SATB) : /* e.g. satb $dr,$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_satb.f
- EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_SATB_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_SAT) : /* e.g. sat $dr,$sr */
- {
-#define OPRND(f) par_exec->operands.fmt_sat.f
- EXTRACT_FMT_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_SAT_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (condbit) = CPU (h_cond);
- OPRND (sr) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_SADD) : /* e.g. sadd */
- {
-#define OPRND(f) par_exec->operands.fmt_sadd.f
- EXTRACT_FMT_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_SADD_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, ((HOSTUINT) 1));
- OPRND (h_accums_0) = m32rx_h_accums_get (current_cpu, ((HOSTUINT) 0));
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MACWU1) : /* e.g. macwu1 $src1,$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_macwu1.f
- EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MACWU1_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, ((HOSTUINT) 1));
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MSBLO) : /* e.g. msblo $src1,$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_msblo.f
- EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MSBLO_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (accum) = m32rx_h_accum_get (current_cpu);
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_mulwu1.f
- EXTRACT_FMT_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MULWU1_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
- CASE (read, READ_FMT_SC) : /* e.g. sc */
- {
-#define OPRND(f) par_exec->operands.fmt_sc.f
- EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_SC_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (condbit) = CPU (h_cond);
-#undef OPRND
- }
- BREAK (read);
-
- }
- ENDSWITCH (read) /* End of read switch. */
-}
-
-#endif /* DEFINE_SWITCH */
+++ /dev/null
-/* Simulator instruction semantics for m32rx.
-
-THIS FILE IS MACHINE GENERATED WITH CGEN.
-
-Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
-
-This file is part of the GNU Simulators.
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2, or (at your option)
-any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
-
-*/
-
-#define WANT_CPU
-#define WANT_CPU_M32RX
-
-#include "sim-main.h"
-#include "cgen-mem.h"
-#include "cgen-ops.h"
-#include "cpu-sim.h"
-
-#if ! WITH_SCACHE
-
-#undef GET_ATTR
-#define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->idesc->opcode, CGEN_INSN_##attr)
-
-/* add: add $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
-
- {
- SI opval = ADDSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* add3: add3 $dr,$sr,$hash$slo16. */
-
-CIA
-SEM_FN_NAME (m32rx,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_ADD3_CODE
-
- {
- SI opval = ADDSI (OPRND (sr), OPRND (slo16));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* and: and $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
-
- {
- SI opval = ANDSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* and3: and3 $dr,$sr,$uimm16. */
-
-CIA
-SEM_FN_NAME (m32rx,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_and3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_AND3_CODE
-
- {
- SI opval = ANDSI (OPRND (sr), OPRND (uimm16));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* or: or $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
-
- {
- SI opval = ORSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* or3: or3 $dr,$sr,$hash$ulo16. */
-
-CIA
-SEM_FN_NAME (m32rx,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_or3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_OR3_CODE
-
- {
- SI opval = ORSI (OPRND (sr), OPRND (ulo16));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* xor: xor $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
-
- {
- SI opval = XORSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* xor3: xor3 $dr,$sr,$uimm16. */
-
-CIA
-SEM_FN_NAME (m32rx,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_and3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_AND3_CODE
-
- {
- SI opval = XORSI (OPRND (sr), OPRND (uimm16));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* addi: addi $dr,$simm8. */
-
-CIA
-SEM_FN_NAME (m32rx,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_addi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
- EXTRACT_FMT_ADDI_CODE
-
- {
- SI opval = ADDSI (OPRND (dr), OPRND (simm8));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* addv: addv $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_addv.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADDV_CODE
-
-do {
- UBI temp1;SI temp0;
- temp0 = ADDSI (OPRND (dr), OPRND (sr));
- temp1 = ADDOFSI (OPRND (dr), OPRND (sr), 0);
- {
- SI opval = temp0;
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
- {
- UBI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* addv3: addv3 $dr,$sr,$simm16. */
-
-CIA
-SEM_FN_NAME (m32rx,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_addv3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_ADDV3_CODE
-
-do {
- UBI temp1;SI temp0;
- temp0 = ADDSI (OPRND (sr), OPRND (simm16));
- temp1 = ADDOFSI (OPRND (sr), OPRND (simm16), 0);
- {
- SI opval = temp0;
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
- {
- UBI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* addx: addx $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_addx.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADDX_CODE
-
-do {
- UBI temp1;SI temp0;
- temp0 = ADDCSI (OPRND (dr), OPRND (sr), OPRND (condbit));
- temp1 = ADDCFSI (OPRND (dr), OPRND (sr), OPRND (condbit));
- {
- SI opval = temp0;
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
- {
- UBI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bc8: bc.s $disp8. */
-
-CIA
-SEM_FN_NAME (m32rx,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bc8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BC8_CODE
-
-if (OPRND (condbit)) {
- {
- USI opval = OPRND (disp8);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bc24: bc.l $disp24. */
-
-CIA
-SEM_FN_NAME (m32rx,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bc24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BC24_CODE
-
-if (OPRND (condbit)) {
- {
- USI opval = OPRND (disp24);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* beq: beq $src1,$src2,$disp16. */
-
-CIA
-SEM_FN_NAME (m32rx,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQ_CODE
-
-if (EQSI (OPRND (src1), OPRND (src2))) {
- {
- USI opval = OPRND (disp16);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* beqz: beqz $src2,$disp16. */
-
-CIA
-SEM_FN_NAME (m32rx,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_beqz.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQZ_CODE
-
-if (EQSI (OPRND (src2), 0)) {
- {
- USI opval = OPRND (disp16);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bgez: bgez $src2,$disp16. */
-
-CIA
-SEM_FN_NAME (m32rx,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_beqz.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQZ_CODE
-
-if (GESI (OPRND (src2), 0)) {
- {
- USI opval = OPRND (disp16);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bgtz: bgtz $src2,$disp16. */
-
-CIA
-SEM_FN_NAME (m32rx,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_beqz.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQZ_CODE
-
-if (GTSI (OPRND (src2), 0)) {
- {
- USI opval = OPRND (disp16);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* blez: blez $src2,$disp16. */
-
-CIA
-SEM_FN_NAME (m32rx,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_beqz.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQZ_CODE
-
-if (LESI (OPRND (src2), 0)) {
- {
- USI opval = OPRND (disp16);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bltz: bltz $src2,$disp16. */
-
-CIA
-SEM_FN_NAME (m32rx,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_beqz.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQZ_CODE
-
-if (LTSI (OPRND (src2), 0)) {
- {
- USI opval = OPRND (disp16);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bnez: bnez $src2,$disp16. */
-
-CIA
-SEM_FN_NAME (m32rx,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_beqz.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQZ_CODE
-
-if (NESI (OPRND (src2), 0)) {
- {
- USI opval = OPRND (disp16);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bl8: bl.s $disp8. */
-
-CIA
-SEM_FN_NAME (m32rx,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bl8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BL8_CODE
-
-do {
- {
- SI opval = ADDSI (ANDSI (OPRND (pc), -4), 4);
- CPU (h_gr[((HOSTUINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, "gr-14", 'x', opval);
- }
- {
- USI opval = OPRND (disp8);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bl24: bl.l $disp24. */
-
-CIA
-SEM_FN_NAME (m32rx,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bl24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BL24_CODE
-
-do {
- {
- SI opval = ADDSI (OPRND (pc), 4);
- CPU (h_gr[((HOSTUINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, "gr-14", 'x', opval);
- }
- {
- USI opval = OPRND (disp24);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bcl8: bcl.s $disp8. */
-
-CIA
-SEM_FN_NAME (m32rx,bcl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bcl8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BCL8_CODE
-
-if (OPRND (condbit)) {
-do {
- {
- SI opval = ADDSI (ANDSI (OPRND (pc), -4), 4);
- CPU (h_gr[((HOSTUINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, "gr-14", 'x', opval);
- }
- {
- USI opval = OPRND (disp8);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-} while (0);
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bcl24: bcl.l $disp24. */
-
-CIA
-SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bcl24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BCL24_CODE
-
-if (OPRND (condbit)) {
-do {
- {
- SI opval = ADDSI (OPRND (pc), 4);
- CPU (h_gr[((HOSTUINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, "gr-14", 'x', opval);
- }
- {
- USI opval = OPRND (disp24);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-} while (0);
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bnc8: bnc.s $disp8. */
-
-CIA
-SEM_FN_NAME (m32rx,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bc8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BC8_CODE
-
-if (NOTBI (OPRND (condbit))) {
- {
- USI opval = OPRND (disp8);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bnc24: bnc.l $disp24. */
-
-CIA
-SEM_FN_NAME (m32rx,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bc24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BC24_CODE
-
-if (NOTBI (OPRND (condbit))) {
- {
- USI opval = OPRND (disp24);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bne: bne $src1,$src2,$disp16. */
-
-CIA
-SEM_FN_NAME (m32rx,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_beq.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
- EXTRACT_FMT_BEQ_CODE
-
-if (NESI (OPRND (src1), OPRND (src2))) {
- {
- USI opval = OPRND (disp16);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bra8: bra.s $disp8. */
-
-CIA
-SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bra8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BRA8_CODE
-
- {
- USI opval = OPRND (disp8);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bra24: bra.l $disp24. */
-
-CIA
-SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bra24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BRA24_CODE
-
- {
- USI opval = OPRND (disp24);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bncl8: bncl.s $disp8. */
-
-CIA
-SEM_FN_NAME (m32rx,bncl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bcl8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
- EXTRACT_FMT_BCL8_CODE
-
-if (NOTBI (OPRND (condbit))) {
-do {
- {
- SI opval = ADDSI (ANDSI (OPRND (pc), -4), 4);
- CPU (h_gr[((HOSTUINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, "gr-14", 'x', opval);
- }
- {
- USI opval = OPRND (disp8);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-} while (0);
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* bncl24: bncl.l $disp24. */
-
-CIA
-SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_bcl24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
- EXTRACT_FMT_BCL24_CODE
-
-if (NOTBI (OPRND (condbit))) {
-do {
- {
- SI opval = ADDSI (OPRND (pc), 4);
- CPU (h_gr[((HOSTUINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, "gr-14", 'x', opval);
- }
- {
- USI opval = OPRND (disp24);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-} while (0);
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* cmp: cmp $src1,$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_cmp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_CMP_CODE
-
- {
- UBI opval = LTSI (OPRND (src1), OPRND (src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* cmpi: cmpi $src2,$simm16. */
-
-CIA
-SEM_FN_NAME (m32rx,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_cmpi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_CMPI_CODE
-
- {
- UBI opval = LTSI (OPRND (src2), OPRND (simm16));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* cmpu: cmpu $src1,$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_cmp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_CMP_CODE
-
- {
- UBI opval = LTUSI (OPRND (src1), OPRND (src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* cmpui: cmpui $src2,$simm16. */
-
-CIA
-SEM_FN_NAME (m32rx,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_cmpi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_CMPI_CODE
-
- {
- UBI opval = LTUSI (OPRND (src2), OPRND (simm16));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* cmpeq: cmpeq $src1,$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,cmpeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_cmp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_CMP_CODE
-
- {
- UBI opval = EQSI (OPRND (src1), OPRND (src2));
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* cmpz: cmpz $src2. */
-
-CIA
-SEM_FN_NAME (m32rx,cmpz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_cmpz.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_CMPZ_CODE
-
- {
- UBI opval = EQSI (OPRND (src2), 0);
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* div: div $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_div.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_DIV_CODE
-
-if (NESI (OPRND (sr), 0)) {
- {
- SI opval = DIVSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* divu: divu $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_div.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_DIV_CODE
-
-if (NESI (OPRND (sr), 0)) {
- {
- SI opval = UDIVSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* rem: rem $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_div.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_DIV_CODE
-
-if (NESI (OPRND (sr), 0)) {
- {
- SI opval = MODSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* remu: remu $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_div.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_DIV_CODE
-
-if (NESI (OPRND (sr), 0)) {
- {
- SI opval = UMODSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* divh: divh $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,divh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_div.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_DIV_CODE
-
-if (NESI (OPRND (sr), 0)) {
- {
- SI opval = DIVSI (EXTHISI (TRUNCSIHI (OPRND (dr))), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* jc: jc $sr. */
-
-CIA
-SEM_FN_NAME (m32rx,jc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_jc.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JC_CODE
-
-if (OPRND (condbit)) {
- {
- USI opval = ANDSI (OPRND (sr), -4);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* jnc: jnc $sr. */
-
-CIA
-SEM_FN_NAME (m32rx,jnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_jc.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JC_CODE
-
-if (NOTBI (OPRND (condbit))) {
- {
- USI opval = ANDSI (OPRND (sr), -4);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* jl: jl $sr. */
-
-CIA
-SEM_FN_NAME (m32rx,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_jl.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JL_CODE
-
-do {
- USI temp1;SI temp0;
- temp0 = ADDSI (ANDSI (OPRND (pc), -4), 4);
- temp1 = ANDSI (OPRND (sr), -4);
- {
- SI opval = temp0;
- CPU (h_gr[((HOSTUINT) 14)]) = opval;
- TRACE_RESULT (current_cpu, "gr-14", 'x', opval);
- }
- {
- USI opval = temp1;
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* jmp: jmp $sr. */
-
-CIA
-SEM_FN_NAME (m32rx,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_jmp.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_JMP_CODE
-
- {
- USI opval = ANDSI (OPRND (sr), -4);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ld: ld $dr,@$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ld.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LD_CODE
-
- {
- SI opval = OPRND (h_memory_sr);
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ld-d: ld $dr,@($slo16,$sr). */
-
-CIA
-SEM_FN_NAME (m32rx,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ld_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LD_D_CODE
-
- {
- SI opval = OPRND (h_memory_add__VM_sr_slo16);
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ldb: ldb $dr,@$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldb.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LDB_CODE
-
- {
- SI opval = EXTQISI (OPRND (h_memory_sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ldb-d: ldb $dr,@($slo16,$sr). */
-
-CIA
-SEM_FN_NAME (m32rx,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldb_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDB_D_CODE
-
- {
- SI opval = EXTQISI (OPRND (h_memory_add__VM_sr_slo16));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ldh: ldh $dr,@$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldh.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LDH_CODE
-
- {
- SI opval = EXTHISI (OPRND (h_memory_sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ldh-d: ldh $dr,@($slo16,$sr). */
-
-CIA
-SEM_FN_NAME (m32rx,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldh_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDH_D_CODE
-
- {
- SI opval = EXTHISI (OPRND (h_memory_add__VM_sr_slo16));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ldub: ldub $dr,@$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldb.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LDB_CODE
-
- {
- SI opval = ZEXTQISI (OPRND (h_memory_sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ldub-d: ldub $dr,@($slo16,$sr). */
-
-CIA
-SEM_FN_NAME (m32rx,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldb_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDB_D_CODE
-
- {
- SI opval = ZEXTQISI (OPRND (h_memory_add__VM_sr_slo16));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* lduh: lduh $dr,@$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldh.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LDH_CODE
-
- {
- SI opval = ZEXTHISI (OPRND (h_memory_sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* lduh-d: lduh $dr,@($slo16,$sr). */
-
-CIA
-SEM_FN_NAME (m32rx,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldh_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDH_D_CODE
-
- {
- SI opval = ZEXTHISI (OPRND (h_memory_add__VM_sr_slo16));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ld-plus: ld $dr,@$sr+. */
-
-CIA
-SEM_FN_NAME (m32rx,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ld_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LD_PLUS_CODE
-
-do {
- SI temp1;SI temp0;
- temp0 = OPRND (h_memory_sr);
- temp1 = ADDSI (OPRND (sr), 4);
- {
- SI opval = temp0;
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
- {
- SI opval = temp1;
- CPU (h_gr[f_r2]) = opval;
- TRACE_RESULT (current_cpu, "sr", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ld24: ld24 $dr,$uimm24. */
-
-CIA
-SEM_FN_NAME (m32rx,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ld24.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
- EXTRACT_FMT_LD24_CODE
-
- {
- SI opval = OPRND (uimm24);
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ldi8: ldi8 $dr,$simm8. */
-
-CIA
-SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldi8.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
- EXTRACT_FMT_LDI8_CODE
-
- {
- SI opval = OPRND (simm8);
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* ldi16: ldi16 $dr,$hash$slo16. */
-
-CIA
-SEM_FN_NAME (m32rx,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_ldi16.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_LDI16_CODE
-
- {
- SI opval = OPRND (slo16);
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* lock: lock $dr,@$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_lock.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_LOCK_CODE
-
-do {
- {
- UBI opval = 1;
- CPU (h_lock) = opval;
- TRACE_RESULT (current_cpu, "lock-0", 'x', opval);
- }
- {
- SI opval = OPRND (h_memory_sr);
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* machi-a: machi $src1,$src2,$acc. */
-
-CIA
-SEM_FN_NAME (m32rx,machi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_machi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MACHI_A_CODE
-
- {
- DI opval = SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8);
- m32rx_h_accums_set (current_cpu, f_acc, opval);
- TRACE_RESULT (current_cpu, "acc", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* maclo-a: maclo $src1,$src2,$acc. */
-
-CIA
-SEM_FN_NAME (m32rx,maclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_machi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MACHI_A_CODE
-
- {
- DI opval = SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8);
- m32rx_h_accums_set (current_cpu, f_acc, opval);
- TRACE_RESULT (current_cpu, "acc", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* macwhi-a: macwhi $src1,$src2,$acc. */
-
-CIA
-SEM_FN_NAME (m32rx,macwhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_machi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MACHI_A_CODE
-
- {
- DI opval = ADDDI (OPRND (acc), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))));
- m32rx_h_accums_set (current_cpu, f_acc, opval);
- TRACE_RESULT (current_cpu, "acc", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* macwlo-a: macwlo $src1,$src2,$acc. */
-
-CIA
-SEM_FN_NAME (m32rx,macwlo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_machi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MACHI_A_CODE
-
- {
- DI opval = ADDDI (OPRND (acc), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))));
- m32rx_h_accums_set (current_cpu, f_acc, opval);
- TRACE_RESULT (current_cpu, "acc", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mul: mul $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
-
- {
- SI opval = MULSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mulhi-a: mulhi $src1,$src2,$acc. */
-
-CIA
-SEM_FN_NAME (m32rx,mulhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MULHI_A_CODE
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 16), 16);
- m32rx_h_accums_set (current_cpu, f_acc, opval);
- TRACE_RESULT (current_cpu, "acc", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mullo-a: mullo $src1,$src2,$acc. */
-
-CIA
-SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MULHI_A_CODE
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 16), 16);
- m32rx_h_accums_set (current_cpu, f_acc, opval);
- TRACE_RESULT (current_cpu, "acc", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mulwhi-a: mulwhi $src1,$src2,$acc. */
-
-CIA
-SEM_FN_NAME (m32rx,mulwhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MULHI_A_CODE
-
- {
- DI opval = MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))));
- m32rx_h_accums_set (current_cpu, f_acc, opval);
- TRACE_RESULT (current_cpu, "acc", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mulwlo-a: mulwlo $src1,$src2,$acc. */
-
-CIA
-SEM_FN_NAME (m32rx,mulwlo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
- EXTRACT_FMT_MULHI_A_CODE
-
- {
- DI opval = MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))));
- m32rx_h_accums_set (current_cpu, f_acc, opval);
- TRACE_RESULT (current_cpu, "acc", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mv: mv $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mv.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MV_CODE
-
- {
- SI opval = OPRND (sr);
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mvfachi-a: mvfachi $dr,$accs. */
-
-CIA
-SEM_FN_NAME (m32rx,mvfachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_MVFACHI_A_CODE
-
- {
- SI opval = TRUNCDISI (SRADI (OPRND (accs), 32));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mvfaclo-a: mvfaclo $dr,$accs. */
-
-CIA
-SEM_FN_NAME (m32rx,mvfaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_MVFACHI_A_CODE
-
- {
- SI opval = TRUNCDISI (OPRND (accs));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mvfacmi-a: mvfacmi $dr,$accs. */
-
-CIA
-SEM_FN_NAME (m32rx,mvfacmi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_MVFACHI_A_CODE
-
- {
- SI opval = TRUNCDISI (SRADI (OPRND (accs), 16));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mvfc: mvfc $dr,$scr. */
-
-CIA
-SEM_FN_NAME (m32rx,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mvfc.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MVFC_CODE
-
- {
- SI opval = OPRND (scr);
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mvtachi-a: mvtachi $src1,$accs. */
-
-CIA
-SEM_FN_NAME (m32rx,mvtachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_MVTACHI_A_CODE
-
- {
- DI opval = ORDI (ANDDI (OPRND (accs), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (OPRND (src1)), 32));
- m32rx_h_accums_set (current_cpu, f_accs, opval);
- TRACE_RESULT (current_cpu, "accs", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mvtaclo-a: mvtaclo $src1,$accs. */
-
-CIA
-SEM_FN_NAME (m32rx,mvtaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
- EXTRACT_FMT_MVTACHI_A_CODE
-
- {
- DI opval = ORDI (ANDDI (OPRND (accs), MAKEDI (0xffffffff, 0)), ZEXTSIDI (OPRND (src1)));
- m32rx_h_accums_set (current_cpu, f_accs, opval);
- TRACE_RESULT (current_cpu, "accs", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mvtc: mvtc $sr,$dcr. */
-
-CIA
-SEM_FN_NAME (m32rx,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mvtc.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MVTC_CODE
-
- {
- USI opval = OPRND (sr);
- m32rx_h_cr_set (current_cpu, f_r1, opval);
- TRACE_RESULT (current_cpu, "dcr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* neg: neg $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mv.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MV_CODE
-
- {
- SI opval = NEGSI (OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* nop: nop. */
-
-CIA
-SEM_FN_NAME (m32rx,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_nop.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_NOP_CODE
-
-PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* not: not $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mv.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MV_CODE
-
- {
- SI opval = INVSI (OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* rac-dsi: rac $accd,$accs,$imm1. */
-
-CIA
-SEM_FN_NAME (m32rx,rac_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_RAC_DSI_CODE
-
-do {
- DI tmp_tmp1;
- tmp_tmp1 = SLLDI (OPRND (accs), OPRND (imm1));
- tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
- {
- DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
- m32rx_h_accums_set (current_cpu, f_accd, opval);
- TRACE_RESULT (current_cpu, "accd", 'D', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* rach-dsi: rach $accd,$accs,$imm1. */
-
-CIA
-SEM_FN_NAME (m32rx,rach_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_rac_dsi.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
- EXTRACT_FMT_RAC_DSI_CODE
-
-do {
- DI tmp_tmp1;
- tmp_tmp1 = SLLDI (OPRND (accs), OPRND (imm1));
- tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
- {
- DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
- m32rx_h_accums_set (current_cpu, f_accd, opval);
- TRACE_RESULT (current_cpu, "accd", 'D', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* rte: rte. */
-
-CIA
-SEM_FN_NAME (m32rx,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_rte.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_RTE_CODE
-
-do {
- {
- USI opval = ANDSI (OPRND (h_cr_6), -4);
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
- {
- USI opval = OPRND (h_cr_14);
- m32rx_h_cr_set (current_cpu, ((HOSTUINT) 6), opval);
- TRACE_RESULT (current_cpu, "cr-6", 'x', opval);
- }
- {
- UQI opval = OPRND (h_bpsw_0);
- m32rx_h_psw_set (current_cpu, opval);
- TRACE_RESULT (current_cpu, "psw-0", 'x', opval);
- }
- {
- UQI opval = OPRND (h_bbpsw_0);
- CPU (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, "bpsw-0", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* seth: seth $dr,$hash$hi16. */
-
-CIA
-SEM_FN_NAME (m32rx,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_seth.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
- EXTRACT_FMT_SETH_CODE
-
- {
- SI opval = SLLSI (OPRND (hi16), 16);
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sll: sll $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
-
- {
- SI opval = SLLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sll3: sll3 $dr,$sr,$simm16. */
-
-CIA
-SEM_FN_NAME (m32rx,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_sll3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_SLL3_CODE
-
- {
- SI opval = SLLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* slli: slli $dr,$uimm5. */
-
-CIA
-SEM_FN_NAME (m32rx,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_slli.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_SLLI_CODE
-
- {
- SI opval = SLLSI (OPRND (dr), OPRND (uimm5));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sra: sra $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
-
- {
- SI opval = SRASI (OPRND (dr), ANDSI (OPRND (sr), 31));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sra3: sra3 $dr,$sr,$simm16. */
-
-CIA
-SEM_FN_NAME (m32rx,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_sll3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_SLL3_CODE
-
- {
- SI opval = SRASI (OPRND (sr), ANDSI (OPRND (simm16), 31));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* srai: srai $dr,$uimm5. */
-
-CIA
-SEM_FN_NAME (m32rx,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_slli.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_SLLI_CODE
-
- {
- SI opval = SRASI (OPRND (dr), OPRND (uimm5));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* srl: srl $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
-
- {
- SI opval = SRLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* srl3: srl3 $dr,$sr,$simm16. */
-
-CIA
-SEM_FN_NAME (m32rx,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_sll3.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_SLL3_CODE
-
- {
- SI opval = SRLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* srli: srli $dr,$uimm5. */
-
-CIA
-SEM_FN_NAME (m32rx,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_slli.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
- EXTRACT_FMT_SLLI_CODE
-
- {
- SI opval = SRLSI (OPRND (dr), OPRND (uimm5));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* st: st $src1,@$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_st.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ST_CODE
-
- {
- SI opval = OPRND (src1);
- SETMEMSI (current_cpu, OPRND (src2), opval);
- TRACE_RESULT (current_cpu, "memory", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* st-d: st $src1,@($slo16,$src2). */
-
-CIA
-SEM_FN_NAME (m32rx,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_st_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_ST_D_CODE
-
- {
- SI opval = OPRND (src1);
- SETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), opval);
- TRACE_RESULT (current_cpu, "memory", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* stb: stb $src1,@$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_stb.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_STB_CODE
-
- {
- QI opval = OPRND (src1);
- SETMEMQI (current_cpu, OPRND (src2), opval);
- TRACE_RESULT (current_cpu, "memory", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* stb-d: stb $src1,@($slo16,$src2). */
-
-CIA
-SEM_FN_NAME (m32rx,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_stb_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_STB_D_CODE
-
- {
- QI opval = OPRND (src1);
- SETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), opval);
- TRACE_RESULT (current_cpu, "memory", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sth: sth $src1,@$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_sth.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_STH_CODE
-
- {
- HI opval = OPRND (src1);
- SETMEMHI (current_cpu, OPRND (src2), opval);
- TRACE_RESULT (current_cpu, "memory", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sth-d: sth $src1,@($slo16,$src2). */
-
-CIA
-SEM_FN_NAME (m32rx,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_sth_d.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
- EXTRACT_FMT_STH_D_CODE
-
- {
- HI opval = OPRND (src1);
- SETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), opval);
- TRACE_RESULT (current_cpu, "memory", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* st-plus: st $src1,@+$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ST_PLUS_CODE
-
-do {
- SI tmp_new_src2;
- tmp_new_src2 = ADDSI (OPRND (src2), 4);
- {
- SI opval = OPRND (src1);
- SETMEMSI (current_cpu, tmp_new_src2, opval);
- TRACE_RESULT (current_cpu, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- CPU (h_gr[f_r2]) = opval;
- TRACE_RESULT (current_cpu, "src2", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* st-minus: st $src1,@-$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_st_plus.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ST_PLUS_CODE
-
-do {
- SI tmp_new_src2;
- tmp_new_src2 = SUBSI (OPRND (src2), 4);
- {
- SI opval = OPRND (src1);
- SETMEMSI (current_cpu, tmp_new_src2, opval);
- TRACE_RESULT (current_cpu, "memory", 'x', opval);
- }
- {
- SI opval = tmp_new_src2;
- CPU (h_gr[f_r2]) = opval;
- TRACE_RESULT (current_cpu, "src2", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sub: sub $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_add.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADD_CODE
-
- {
- SI opval = SUBSI (OPRND (dr), OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* subv: subv $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_addv.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADDV_CODE
-
-do {
- UBI temp1;SI temp0;
- temp0 = SUBSI (OPRND (dr), OPRND (sr));
- temp1 = SUBOFSI (OPRND (dr), OPRND (sr), 0);
- {
- SI opval = temp0;
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
- {
- UBI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* subx: subx $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_addx.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_ADDX_CODE
-
-do {
- UBI temp1;SI temp0;
- temp0 = SUBCSI (OPRND (dr), OPRND (sr), OPRND (condbit));
- temp1 = SUBCFSI (OPRND (dr), OPRND (sr), OPRND (condbit));
- {
- SI opval = temp0;
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
- {
- UBI opval = temp1;
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* trap: trap $uimm4. */
-
-CIA
-SEM_FN_NAME (m32rx,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_trap.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- int taken_p = 0;
- CIA UNUSED pc = PC;
- EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
- EXTRACT_FMT_TRAP_CODE
-
-do {
- {
- USI opval = OPRND (h_cr_6);
- m32rx_h_cr_set (current_cpu, ((HOSTUINT) 14), opval);
- TRACE_RESULT (current_cpu, "cr-14", 'x', opval);
- }
- {
- USI opval = ADDSI (OPRND (pc), 4);
- m32rx_h_cr_set (current_cpu, ((HOSTUINT) 6), opval);
- TRACE_RESULT (current_cpu, "cr-6", 'x', opval);
- }
- {
- UQI opval = OPRND (h_bpsw_0);
- CPU (h_bbpsw) = opval;
- TRACE_RESULT (current_cpu, "bbpsw-0", 'x', opval);
- }
- {
- UQI opval = OPRND (h_psw_0);
- CPU (h_bpsw) = opval;
- TRACE_RESULT (current_cpu, "bpsw-0", 'x', opval);
- }
- {
- UQI opval = ANDQI (OPRND (h_psw_0), 128);
- m32rx_h_psw_set (current_cpu, opval);
- TRACE_RESULT (current_cpu, "psw-0", 'x', opval);
- }
- {
- SI opval = m32r_trap (current_cpu, OPRND (pc), OPRND (uimm4));
- BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, opval));
- taken_p = 1;
- TRACE_RESULT (current_cpu, "pc", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* unlock: unlock $src1,@$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_unlock.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_UNLOCK_CODE
-
-do {
-if (OPRND (h_lock_0)) {
- {
- SI opval = OPRND (src1);
- SETMEMSI (current_cpu, OPRND (src2), opval);
- TRACE_RESULT (current_cpu, "memory", 'x', opval);
- }
-}
- {
- UBI opval = 0;
- CPU (h_lock) = opval;
- TRACE_RESULT (current_cpu, "lock-0", 'x', opval);
- }
-} while (0);
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* satb: satb $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,satb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_satb.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_SATB_CODE
-
- {
- SI opval = (GESI (OPRND (sr), 127)) ? (127) : (LESI (OPRND (sr), -128)) ? (-128) : (OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sath: sath $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,sath) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_satb.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_SATB_CODE
-
- {
- SI opval = (GESI (OPRND (sr), 32767)) ? (32767) : (LESI (OPRND (sr), -32768)) ? (-32768) : (OPRND (sr));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sat: sat $dr,$sr. */
-
-CIA
-SEM_FN_NAME (m32rx,sat) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_sat.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
- EXTRACT_FMT_SAT_CODE
-
- {
- SI opval = ((OPRND (condbit)) ? (((LTSI (OPRND (sr), 0)) ? (2147483647) : (0x80000000))) : (OPRND (sr)));
- CPU (h_gr[f_r1]) = opval;
- TRACE_RESULT (current_cpu, "dr", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_mark_set_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* pcmpbz: pcmpbz $src2. */
-
-CIA
-SEM_FN_NAME (m32rx,pcmpbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_cmpz.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_CMPZ_CODE
-
- {
- UBI opval = (EQSI (ANDSI (OPRND (src2), 255), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 65280), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 0xff000000), 0)) ? (1) : (0);
- CPU (h_cond) = opval;
- TRACE_RESULT (current_cpu, "condbit", 'x', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sadd: sadd. */
-
-CIA
-SEM_FN_NAME (m32rx,sadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_sadd.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_SADD_CODE
-
- {
- DI opval = ADDDI (SRADI (OPRND (h_accums_1), 16), OPRND (h_accums_0));
- m32rx_h_accums_set (current_cpu, ((HOSTUINT) 0), opval);
- TRACE_RESULT (current_cpu, "accums-0", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* macwu1: macwu1 $src1,$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,macwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_macwu1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MACWU1_CODE
-
- {
- DI opval = SRADI (SLLDI (ADDDI (OPRND (h_accums_1), MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535)))), 8), 8);
- m32rx_h_accums_set (current_cpu, ((HOSTUINT) 1), opval);
- TRACE_RESULT (current_cpu, "accums-1", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* msblo: msblo $src1,$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_msblo.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MSBLO_CODE
-
- {
- DI opval = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);
- m32rx_h_accum_set (current_cpu, opval);
- TRACE_RESULT (current_cpu, "accum", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* mulwu1: mulwu1 $src1,$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,mulwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mulwu1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MULWU1_CODE
-
- {
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535))), 16), 16);
- m32rx_h_accums_set (current_cpu, ((HOSTUINT) 1), opval);
- TRACE_RESULT (current_cpu, "accums-1", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* maclh1: maclh1 $src1,$src2. */
-
-CIA
-SEM_FN_NAME (m32rx,maclh1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_macwu1.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MACWU1_CODE
-
- {
- DI opval = SRADI (SLLDI (ADDDI (OPRND (h_accums_1), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (OPRND (src1))), SRASI (OPRND (src2), 16))), 16)), 8), 8);
- m32rx_h_accums_set (current_cpu, ((HOSTUINT) 1), opval);
- TRACE_RESULT (current_cpu, "accums-1", 'D', opval);
- }
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_mark_get_h_gr (current_cpu, abuf);
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* sc: sc. */
-
-CIA
-SEM_FN_NAME (m32rx,sc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_sc.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_SC_CODE
-
-if (OPRND (condbit)) {
-BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-/* snc: snc. */
-
-CIA
-SEM_FN_NAME (m32rx,snc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_sc.f
- ARGBUF *abuf = SEM_ARGBUF (sem_arg);
- CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
- CIA UNUSED pc = PC;
- EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_SC_CODE
-
-if (NOTBI (OPRND (condbit))) {
-BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);
-}
-
- PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-
-#if WITH_PROFILE_MODEL_P
- if (PROFILE_MODEL_P (current_cpu))
- {
- m32rx_model_profile_insn (current_cpu, abuf);
- }
-#endif
-
- return new_pc;
-#undef OPRND
-}
-
-CIA
-SEM_FN_NAME (m32rx,illegal) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
-{
- sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/);
- return 0;
-}
-
-#endif /* WANT_CPU */
projects / platform / upstream / binutils.git / commitdiff