sunxi: clk: add MMC gates/resets

Add the MMC clock gates and reset bits for all the Allwinner SoCs.
This allows them to be used by the MMC driver.

We don't advertise the mod clock yet, as this is still handled by the
MMC driver.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: add V3S, A80 gates/resets]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>

diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index b00f51a..2aa41ef 100644 (file)
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -18,6 +18,10 @@ static struct ccu_clk_gate a10_gates[] = {
        [CLK_AHB_OHCI0]         = GATE(0x060, BIT(2)),
        [CLK_AHB_EHCI1]         = GATE(0x060, BIT(3)),
        [CLK_AHB_OHCI1]         = GATE(0x060, BIT(4)),
+       [CLK_AHB_MMC0]          = GATE(0x060, BIT(8)),
+       [CLK_AHB_MMC1]          = GATE(0x060, BIT(9)),
+       [CLK_AHB_MMC2]          = GATE(0x060, BIT(10)),
+       [CLK_AHB_MMC3]          = GATE(0x060, BIT(11)),
 
        [CLK_APB1_UART0]        = GATE(0x06c, BIT(16)),
        [CLK_APB1_UART1]        = GATE(0x06c, BIT(17)),

diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
index aa904ce..87b74e5 100644 (file)
--- a/drivers/clk/sunxi/clk_a10s.c
+++ b/drivers/clk/sunxi/clk_a10s.c
@@ -16,6 +16,9 @@ static struct ccu_clk_gate a10s_gates[] = {
        [CLK_AHB_OTG]           = GATE(0x060, BIT(0)),
        [CLK_AHB_EHCI]          = GATE(0x060, BIT(1)),
        [CLK_AHB_OHCI]          = GATE(0x060, BIT(2)),
+       [CLK_AHB_MMC0]          = GATE(0x060, BIT(8)),
+       [CLK_AHB_MMC1]          = GATE(0x060, BIT(9)),
+       [CLK_AHB_MMC2]          = GATE(0x060, BIT(10)),
 
        [CLK_APB1_UART0]        = GATE(0x06c, BIT(16)),
        [CLK_APB1_UART1]        = GATE(0x06c, BIT(17)),

diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
index 854259b..1ef2359 100644 (file)
--- a/drivers/clk/sunxi/clk_a23.c
+++ b/drivers/clk/sunxi/clk_a23.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
 
 static struct ccu_clk_gate a23_gates[] = {
+       [CLK_BUS_MMC0]          = GATE(0x060, BIT(8)),
+       [CLK_BUS_MMC1]          = GATE(0x060, BIT(9)),
+       [CLK_BUS_MMC2]          = GATE(0x060, BIT(10)),
        [CLK_BUS_OTG]           = GATE(0x060, BIT(24)),
        [CLK_BUS_EHCI]          = GATE(0x060, BIT(26)),
        [CLK_BUS_OHCI]          = GATE(0x060, BIT(29)),
@@ -35,6 +38,9 @@ static struct ccu_reset a23_resets[] = {
        [RST_USB_PHY1]          = RESET(0x0cc, BIT(1)),
        [RST_USB_HSIC]          = RESET(0x0cc, BIT(2)),
 
+       [RST_BUS_MMC0]          = RESET(0x2c0, BIT(8)),
+       [RST_BUS_MMC1]          = RESET(0x2c0, BIT(9)),
+       [RST_BUS_MMC2]          = RESET(0x2c0, BIT(10)),
        [RST_BUS_OTG]           = RESET(0x2c0, BIT(24)),
        [RST_BUS_EHCI]          = RESET(0x2c0, BIT(26)),
        [RST_BUS_OHCI]          = RESET(0x2c0, BIT(29)),

diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
index a38d76c..5bd8b7d 100644 (file)
--- a/drivers/clk/sunxi/clk_a31.c
+++ b/drivers/clk/sunxi/clk_a31.c
@@ -13,6 +13,10 @@
 #include <dt-bindings/reset/sun6i-a31-ccu.h>
 
 static struct ccu_clk_gate a31_gates[] = {
+       [CLK_AHB1_MMC0]         = GATE(0x060, BIT(8)),
+       [CLK_AHB1_MMC1]         = GATE(0x060, BIT(9)),
+       [CLK_AHB1_MMC2]         = GATE(0x060, BIT(10)),
+       [CLK_AHB1_MMC3]         = GATE(0x060, BIT(11)),
        [CLK_AHB1_OTG]          = GATE(0x060, BIT(24)),
        [CLK_AHB1_EHCI0]        = GATE(0x060, BIT(26)),
        [CLK_AHB1_EHCI1]        = GATE(0x060, BIT(27)),
@@ -40,6 +44,10 @@ static struct ccu_reset a31_resets[] = {
        [RST_USB_PHY1]          = RESET(0x0cc, BIT(1)),
        [RST_USB_PHY2]          = RESET(0x0cc, BIT(2)),
 
+       [RST_AHB1_MMC0]         = RESET(0x2c0, BIT(8)),
+       [RST_AHB1_MMC1]         = RESET(0x2c0, BIT(9)),
+       [RST_AHB1_MMC2]         = RESET(0x2c0, BIT(10)),
+       [RST_AHB1_MMC3]         = RESET(0x2c0, BIT(11)),
        [RST_AHB1_OTG]          = RESET(0x2c0, BIT(24)),
        [RST_AHB1_EHCI0]        = RESET(0x2c0, BIT(26)),
        [RST_AHB1_EHCI1]        = RESET(0x2c0, BIT(27)),

diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index a2ba6ee..910275f 100644 (file)
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun50i-a64-ccu.h>
 
 static const struct ccu_clk_gate a64_gates[] = {
+       [CLK_BUS_MMC0]          = GATE(0x060, BIT(8)),
+       [CLK_BUS_MMC1]          = GATE(0x060, BIT(9)),
+       [CLK_BUS_MMC2]          = GATE(0x060, BIT(10)),
        [CLK_BUS_OTG]           = GATE(0x060, BIT(23)),
        [CLK_BUS_EHCI0]         = GATE(0x060, BIT(24)),
        [CLK_BUS_EHCI1]         = GATE(0x060, BIT(25)),
@@ -38,6 +41,9 @@ static const struct ccu_reset a64_resets[] = {
        [RST_USB_PHY1]          = RESET(0x0cc, BIT(1)),
        [RST_USB_HSIC]          = RESET(0x0cc, BIT(2)),
 
+       [RST_BUS_MMC0]          = RESET(0x2c0, BIT(8)),
+       [RST_BUS_MMC1]          = RESET(0x2c0, BIT(9)),
+       [RST_BUS_MMC2]          = RESET(0x2c0, BIT(10)),
        [RST_BUS_OTG]           = RESET(0x2c0, BIT(23)),
        [RST_BUS_EHCI0]         = RESET(0x2c0, BIT(24)),
        [RST_BUS_EHCI1]         = RESET(0x2c0, BIT(25)),

diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c
index d6dd6a1..d4bfb0a 100644 (file)
--- a/drivers/clk/sunxi/clk_a80.c
+++ b/drivers/clk/sunxi/clk_a80.c
@@ -13,6 +13,8 @@
 #include <dt-bindings/reset/sun9i-a80-ccu.h>
 
 static const struct ccu_clk_gate a80_gates[] = {
+       [CLK_BUS_MMC]           = GATE(0x580, BIT(8)),
+
        [CLK_BUS_UART0]         = GATE(0x594, BIT(16)),
        [CLK_BUS_UART1]         = GATE(0x594, BIT(17)),
        [CLK_BUS_UART2]         = GATE(0x594, BIT(18)),
@@ -22,6 +24,8 @@ static const struct ccu_clk_gate a80_gates[] = {
 };
 
 static const struct ccu_reset a80_resets[] = {
+       [RST_BUS_MMC]           = RESET(0x5a0, BIT(8)),
+
        [RST_BUS_UART0]         = RESET(0x5b4, BIT(16)),
        [RST_BUS_UART1]         = RESET(0x5b4, BIT(17)),
        [RST_BUS_UART2]         = RESET(0x5b4, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c
index 1ef6ac5..b5a555d 100644 (file)
--- a/drivers/clk/sunxi/clk_a83t.c
+++ b/drivers/clk/sunxi/clk_a83t.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
 
 static struct ccu_clk_gate a83t_gates[] = {
+       [CLK_BUS_MMC0]          = GATE(0x060, BIT(8)),
+       [CLK_BUS_MMC1]          = GATE(0x060, BIT(9)),
+       [CLK_BUS_MMC2]          = GATE(0x060, BIT(10)),
        [CLK_BUS_OTG]           = GATE(0x060, BIT(24)),
        [CLK_BUS_EHCI0]         = GATE(0x060, BIT(26)),
        [CLK_BUS_EHCI1]         = GATE(0x060, BIT(27)),
@@ -36,6 +39,9 @@ static struct ccu_reset a83t_resets[] = {
        [RST_USB_PHY1]          = RESET(0x0cc, BIT(1)),
        [RST_USB_HSIC]          = RESET(0x0cc, BIT(2)),
 
+       [RST_BUS_MMC0]          = RESET(0x2c0, BIT(8)),
+       [RST_BUS_MMC1]          = RESET(0x2c0, BIT(9)),
+       [RST_BUS_MMC2]          = RESET(0x2c0, BIT(10)),
        [RST_BUS_OTG]           = RESET(0x2c0, BIT(24)),
        [RST_BUS_EHCI0]         = RESET(0x2c0, BIT(26)),
        [RST_BUS_EHCI1]         = RESET(0x2c0, BIT(27)),

diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c
index f82949b..416aec2 100644 (file)
--- a/drivers/clk/sunxi/clk_h3.c
+++ b/drivers/clk/sunxi/clk_h3.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun8i-h3-ccu.h>
 
 static struct ccu_clk_gate h3_gates[] = {
+       [CLK_BUS_MMC0]          = GATE(0x060, BIT(8)),
+       [CLK_BUS_MMC1]          = GATE(0x060, BIT(9)),
+       [CLK_BUS_MMC2]          = GATE(0x060, BIT(10)),
        [CLK_BUS_OTG]           = GATE(0x060, BIT(23)),
        [CLK_BUS_EHCI0]         = GATE(0x060, BIT(24)),
        [CLK_BUS_EHCI1]         = GATE(0x060, BIT(25)),
@@ -44,6 +47,9 @@ static struct ccu_reset h3_resets[] = {
        [RST_USB_PHY2]          = RESET(0x0cc, BIT(2)),
        [RST_USB_PHY3]          = RESET(0x0cc, BIT(3)),
 
+       [RST_BUS_MMC0]          = RESET(0x2c0, BIT(8)),
+       [RST_BUS_MMC1]          = RESET(0x2c0, BIT(9)),
+       [RST_BUS_MMC2]          = RESET(0x2c0, BIT(10)),
        [RST_BUS_OTG]           = RESET(0x2c0, BIT(23)),
        [RST_BUS_EHCI0]         = RESET(0x2c0, BIT(24)),
        [RST_BUS_EHCI1]         = RESET(0x2c0, BIT(25)),

diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index 0da3a40..902612d 100644 (file)
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun50i-h6-ccu.h>
 
 static struct ccu_clk_gate h6_gates[] = {
+       [CLK_BUS_MMC0]          = GATE(0x84c, BIT(0)),
+       [CLK_BUS_MMC1]          = GATE(0x84c, BIT(1)),
+       [CLK_BUS_MMC2]          = GATE(0x84c, BIT(2)),
        [CLK_BUS_UART0]         = GATE(0x90c, BIT(0)),
        [CLK_BUS_UART1]         = GATE(0x90c, BIT(1)),
        [CLK_BUS_UART2]         = GATE(0x90c, BIT(2)),
@@ -20,6 +23,9 @@ static struct ccu_clk_gate h6_gates[] = {
 };
 
 static struct ccu_reset h6_resets[] = {
+       [RST_BUS_MMC0]          = RESET(0x84c, BIT(16)),
+       [RST_BUS_MMC1]          = RESET(0x84c, BIT(17)),
+       [RST_BUS_MMC2]          = RESET(0x84c, BIT(18)),
        [RST_BUS_UART0]         = RESET(0x90c, BIT(16)),
        [RST_BUS_UART1]         = RESET(0x90c, BIT(17)),
        [RST_BUS_UART2]         = RESET(0x90c, BIT(18)),

diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c
index fd7aae9..b9457e1 100644 (file)
--- a/drivers/clk/sunxi/clk_r40.c
+++ b/drivers/clk/sunxi/clk_r40.c
@@ -13,6 +13,10 @@
 #include <dt-bindings/reset/sun8i-r40-ccu.h>
 
 static struct ccu_clk_gate r40_gates[] = {
+       [CLK_BUS_MMC0]          = GATE(0x060, BIT(8)),
+       [CLK_BUS_MMC1]          = GATE(0x060, BIT(9)),
+       [CLK_BUS_MMC2]          = GATE(0x060, BIT(10)),
+       [CLK_BUS_MMC3]          = GATE(0x060, BIT(11)),
        [CLK_BUS_OTG]           = GATE(0x060, BIT(25)),
        [CLK_BUS_EHCI0]         = GATE(0x060, BIT(26)),
        [CLK_BUS_EHCI1]         = GATE(0x060, BIT(27)),
@@ -43,6 +47,10 @@ static struct ccu_reset r40_resets[] = {
        [RST_USB_PHY1]          = RESET(0x0cc, BIT(1)),
        [RST_USB_PHY2]          = RESET(0x0cc, BIT(2)),
 
+       [RST_BUS_MMC0]          = RESET(0x2c0, BIT(8)),
+       [RST_BUS_MMC1]          = RESET(0x2c0, BIT(9)),
+       [RST_BUS_MMC2]          = RESET(0x2c0, BIT(10)),
+       [RST_BUS_MMC3]          = RESET(0x2c0, BIT(11)),
        [RST_BUS_OTG]           = RESET(0x2c0, BIT(25)),
        [RST_BUS_EHCI0]         = RESET(0x2c0, BIT(26)),
        [RST_BUS_EHCI1]         = RESET(0x2c0, BIT(27)),

diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index 25ad875..c8a9027 100644 (file)
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -13,6 +13,9 @@
 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
 
 static struct ccu_clk_gate v3s_gates[] = {
+       [CLK_BUS_MMC0]          = GATE(0x060, BIT(8)),
+       [CLK_BUS_MMC1]          = GATE(0x060, BIT(9)),
+       [CLK_BUS_MMC2]          = GATE(0x060, BIT(10)),
        [CLK_BUS_OTG]           = GATE(0x060, BIT(24)),
 
        [CLK_BUS_UART0]         = GATE(0x06c, BIT(16)),
@@ -25,6 +28,9 @@ static struct ccu_clk_gate v3s_gates[] = {
 static struct ccu_reset v3s_resets[] = {
        [RST_USB_PHY0]          = RESET(0x0cc, BIT(0)),
 
+       [RST_BUS_MMC0]          = RESET(0x2c0, BIT(8)),
+       [RST_BUS_MMC1]          = RESET(0x2c0, BIT(9)),
+       [RST_BUS_MMC2]          = RESET(0x2c0, BIT(10)),
        [RST_BUS_OTG]           = RESET(0x2c0, BIT(24)),
 
        [RST_BUS_UART0]         = RESET(0x2d8, BIT(16)),