arm: dts: k3-j72xx: correct MCU timer1 frequency
authorTero Kristo <kristo@kernel.org>
Fri, 11 Jun 2021 08:45:27 +0000 (11:45 +0300)
committerLokesh Vutla <lokeshvutla@ti.com>
Fri, 11 Jun 2021 11:04:52 +0000 (16:34 +0530)
MCU timer1 is used as the tick timer for MCU R5 SPL, and the
clock-frequency defined in DT appears to be incorrect at the moment.
Actual clock source for the timer is MCU_SYSCLK0 / 4 which is 250MHz.

Earlier setup of 25MHz went unnoticed, as there was a separate issue
with omap-timer, which caused an error to the clock by a factor of 8
with j7 devices. This problem surfaced once the omap-timer was fixed.

Signed-off-by: Tero Kristo <kristo@kernel.org>
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi

index bd037be..c3aae65 100644 (file)
@@ -33,7 +33,7 @@
                compatible = "ti,omap5430-timer";
                reg = <0x0 0x40400000 0x0 0x80>;
                ti,timer-alwon;
-               clock-frequency = <25000000>;
+               clock-frequency = <250000000>;
                u-boot,dm-spl;
        };
 
index fe095a6..9513318 100644 (file)
@@ -46,7 +46,7 @@
                compatible = "ti,omap5430-timer";
                reg = <0x0 0x40400000 0x0 0x80>;
                ti,timer-alwon;
-               clock-frequency = <25000000>;
+               clock-frequency = <250000000>;
                u-boot,dm-spl;
        };