clock-names = "mclk", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
- pinctrl-names = "tdm_pins";
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
/*
* 0: tdmout_a;
};
};
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
tdmin_a: tdmin_a {
mux { /* GPIOZ_9 */
groups = "tdma_din2_z";
clock-names = "mclk", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
- pinctrl-names = "tdm_pins";
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
/*
* 0: tdmout_a;
};
};
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
tdmin_a: tdmin_a {
mux { /* GPIOZ_9 */
groups = "tdma_din2_z";
clock-names = "mclk", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
- pinctrl-names = "tdm_pins";
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
/*
* 0: tdmout_a;
};
};
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
tdmin_a: tdmin_a {
mux { /* GPIOZ_9 */
groups = "tdma_din2_z";
clock-names = "mclk", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
- pinctrl-names = "tdm_pins";
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
/*
* 0: tdmout_a;
};
};
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
tdmin_a: tdmin_a {
mux { /* GPIOZ_9 */
groups = "tdma_din2_z";
clock-names = "mclk", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
- pinctrl-names = "tdm_pins";
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
/*
* 0: tdmout_a;
};
};
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
+
tdmin_a: tdmin_a {
mux { /* GPIOZ_9 */
groups = "tdma_din2_z";
clock-names = "mclk", "clk_srcpll",
"samesource_srcpll", "samesource_clk";
- pinctrl-names = "tdm_pins";
+ pinctrl-names = "tdm_pins", "tdmout_a_gpio";
pinctrl-0 = <&tdma_mclk &tdmout_a>;
+ pinctrl-1 = <&tdmout_a_gpio>;
/*
* 0: tdmout_a;
};
};
+ tdmout_a_gpio: tdmout_a_gpio {
+ mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
+ groups = "GPIOZ_1",
+ "GPIOZ_2",
+ "GPIOZ_3";
+ function = "gpio_periphs";
+ output-low;
+ };
+ };
tdmin_a: tdmin_a {
mux { /* GPIOZ_9 */
groups = "tdma_din2_z";
static int aml_tdm_platform_suspend(struct platform_device *pdev,
pm_message_t state)
{
+ struct aml_tdm *p_tdm = dev_get_drvdata(&pdev->dev);
+
+ /*mute default clk */
+ if (p_tdm->start_clk_enable == 1 && p_tdm->pin_ctl) {
+ struct pinctrl_state *state = NULL;
+
+ state = pinctrl_lookup_state(p_tdm->pin_ctl, "tdmout_a_gpio");
+ if (!IS_ERR_OR_NULL(state)) {
+ pinctrl_select_state(p_tdm->pin_ctl, state);
+ pr_info("%s tdm pins disable!\n", __func__);
+ }
+ }
+
+ pr_info("%s tdm:(%d)\n", __func__, p_tdm->id);
return 0;
}
+
static int aml_tdm_platform_resume(struct platform_device *pdev)
{
+ struct aml_tdm *p_tdm = dev_get_drvdata(&pdev->dev);
+
/* complete mclk for tdm */
if (get_meson_cpu_version(MESON_CPU_VERSION_LVL_MINOR) == 0xa)
meson_clk_measure((1<<16) | 0x67);
+ /*set default clk for output*/
+ if (p_tdm->start_clk_enable == 1 && p_tdm->pin_ctl) {
+ struct pinctrl_state *state = NULL;
+
+ aml_set_default_tdm_clk(p_tdm);
+ state = pinctrl_lookup_state(p_tdm->pin_ctl, "tdm_pins");
+ if (!IS_ERR_OR_NULL(state)) {
+ pinctrl_select_state(p_tdm->pin_ctl, state);
+ pr_info("%s tdm pins enable!\n", __func__);
+ }
+ }
+
+ pr_info("%s tdm:(%d)\n", __func__, p_tdm->id);
return 0;
}
+static void aml_tdm_platform_shutdown(struct platform_device *pdev)
+{
+}
+
struct platform_driver aml_tdm_driver = {
.driver = {
.name = DRV_NAME,
.of_match_table = aml_tdm_device_id,
},
- .probe = aml_tdm_platform_probe,
+ .probe = aml_tdm_platform_probe,
.suspend = aml_tdm_platform_suspend,
.resume = aml_tdm_platform_resume,
+ .shutdown = aml_tdm_platform_shutdown,
};
module_platform_driver(aml_tdm_driver);
return 0;
}
-static int reset_ad82584f_GPIO(struct snd_soc_codec *codec)
+static int ad82584f_GPIO_enable(struct snd_soc_codec *codec, bool enable)
{
struct ad82584f_priv *ad82584f = snd_soc_codec_get_drvdata(codec);
struct ad82584f_platform_data *pdata = ad82584f->pdata;
- int ret = 0;
if (pdata->reset_pin < 0)
return 0;
- ret = devm_gpio_request_one(codec->dev, pdata->reset_pin,
- GPIOF_OUT_INIT_LOW,
- "ad82584f-reset-pin");
- if (ret < 0)
- return -1;
-
- gpio_direction_output(pdata->reset_pin, GPIOF_OUT_INIT_LOW);
- usleep_range(10 * 1000, 11 * 1000);
- gpio_direction_output(pdata->reset_pin, GPIOF_OUT_INIT_HIGH);
- usleep_range(1 * 1000, 2 * 1000);
-
- return 0;
-}
+ if (enable == true) {
#if 0
-static int reset_ad82584f(struct snd_soc_codec *codec)
-{
- struct ad82584f_priv *ad82584f = snd_soc_codec_get_drvdata(codec);
- struct ad82584f_platform_data *pdata = ad82584f->pdata;
-
- if (pdata->reset_pin < 0)
- return 0;
-
- gpio_direction_output(pdata->reset_pin, GPIOF_OUT_INIT_LOW);
- mdelay(10);
- gpio_direction_output(pdata->reset_pin, GPIOF_OUT_INIT_HIGH);
- mdelay(15);
+ int ret;
+
+ ret = devm_gpio_request_one(codec->dev, pdata->reset_pin,
+ GPIOF_OUT_INIT_LOW,
+ "ad82584f-reset-pin");
+ if (ret < 0) {
+ dev_err(codec->dev, "ad82584f get gpio error!\n");
+ return -1;
+ }
+#endif
+ gpio_direction_output(pdata->reset_pin, GPIOF_OUT_INIT_LOW);
+ usleep_range(10 * 1000, 11 * 1000);
+ gpio_direction_output(pdata->reset_pin, GPIOF_OUT_INIT_HIGH);
+ dev_info(codec->dev, "ad82584f start status = %d\n",
+ gpio_get_value(pdata->reset_pin));
+ usleep_range(1 * 1000, 2 * 1000);
+ } else {
+ /*gpio_direction_output(pdata->reset_pin, GPIOF_OUT_INIT_LOW);*/
+ gpio_set_value(pdata->reset_pin, GPIOF_OUT_INIT_LOW);
+ dev_info(codec->dev, "ad82584f stop status = %d\n",
+ gpio_get_value(pdata->reset_pin));
+ /*devm_gpio_free(codec->dev, pdata->reset_pin);*/
+ }
return 0;
}
-#endif
+
static int ad82584f_reg_init(struct snd_soc_codec *codec)
{
int i = 0;
{
struct ad82584f_priv *ad82584f = snd_soc_codec_get_drvdata(codec);
- reset_ad82584f_GPIO(codec);
+ ad82584f_GPIO_enable(codec, true);
dev_info(codec->dev, "ad82584f_init!\n");
static int ad82584f_probe(struct snd_soc_codec *codec)
{
-
-#ifdef CONFIG_HAS_EARLYSUSPEND
struct ad82584f_priv *ad82584f = snd_soc_codec_get_drvdata(codec);
+ struct ad82584f_platform_data *pdata = ad82584f->pdata;
+ int ret;
+#ifdef CONFIG_HAS_EARLYSUSPEND
ad82584f->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN;
ad82584f->early_suspend.suspend = ad82584f_early_suspend;
ad82584f->early_suspend.resume = ad82584f_late_resume;
ad82584f->early_suspend.param = codec;
register_early_suspend(&(ad82584f->early_suspend));
#endif
+
+ ret = devm_gpio_request_one(codec->dev, pdata->reset_pin,
+ GPIOF_OUT_INIT_LOW,
+ "ad82584f-reset-pin");
+ if (ret < 0) {
+ dev_err(codec->dev, "ad82584f get gpio error!\n");
+ return -1;
+ }
+
ad82584f_init(codec);
return 0;
static int ad82584f_remove(struct snd_soc_codec *codec)
{
-#ifdef CONFIG_HAS_EARLYSUSPEND
struct ad82584f_priv *ad82584f = snd_soc_codec_get_drvdata(codec);
+ struct ad82584f_platform_data *pdata = ad82584f->pdata;
+#ifdef CONFIG_HAS_EARLYSUSPEND
unregister_early_suspend(&(ad82584f->early_suspend));
#endif
+
+ devm_gpio_free(codec->dev, pdata->reset_pin);
return 0;
}
ad82584f_set_bias_level(codec, SND_SOC_BIAS_OFF);
+ ad82584f_GPIO_enable(codec, false);
return 0;
}