static void __iomem *wakeupgen_base;
static void __iomem *sar_base;
-static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks);
static DEFINE_SPINLOCK(wakeupgen_lock);
static unsigned int irq_target_cpu[NR_IRQS];
__raw_writel(val, sar_base + offset + (idx * 4));
}
-static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
-{
- u8 i;
-
- for (i = 0; i < NR_REG_BANKS; i++)
- wakeupgen_writel(reg, i, cpu);
-}
-
static inline int _wakeupgen_get_irq_info(u32 irq, u32 *bit_posn, u8 *reg_index)
{
unsigned int spi_irq;
wakeupgen_writel(val, i, cpu);
}
-static void _wakeupgen_save_masks(unsigned int cpu)
-{
- u8 i;
-
- for (i = 0; i < NR_REG_BANKS; i++)
- per_cpu(irqmasks, cpu)[i] = wakeupgen_readl(i, cpu);
-}
-
-static void _wakeupgen_restore_masks(unsigned int cpu)
-{
- u8 i;
-
- for (i = 0; i < NR_REG_BANKS; i++)
- wakeupgen_writel(per_cpu(irqmasks, cpu)[i], i, cpu);
-}
-
/*
* Architecture specific Mask extension
*/
spin_unlock_irqrestore(&wakeupgen_lock, flags);
}
+#ifdef CONFIG_HOTPLUG_CPU
+static DEFINE_PER_CPU(u32 [NR_REG_BANKS], irqmasks);
+
+static void _wakeupgen_save_masks(unsigned int cpu)
+{
+ u8 i;
+
+ for (i = 0; i < NR_REG_BANKS; i++)
+ per_cpu(irqmasks, cpu)[i] = wakeupgen_readl(i, cpu);
+}
+
+static void _wakeupgen_restore_masks(unsigned int cpu)
+{
+ u8 i;
+
+ for (i = 0; i < NR_REG_BANKS; i++)
+ wakeupgen_writel(per_cpu(irqmasks, cpu)[i], i, cpu);
+}
+
+static void _wakeupgen_set_all(unsigned int cpu, unsigned int reg)
+{
+ u8 i;
+
+ for (i = 0; i < NR_REG_BANKS; i++)
+ wakeupgen_writel(reg, i, cpu);
+}
+
/*
* Mask or unmask all interrupts on given CPU.
* 0 = Mask all interrupts on the 'cpu'
}
spin_unlock_irqrestore(&wakeupgen_lock, flags);
}
+#endif
#ifdef CONFIG_CPU_PM
/*