Both OpenGL and Vulkan drivers share the same performance counters.
Let's move them to a common place instead of duplicating.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21420>
--- /dev/null
+/*
+ * Copyright © 2023 Raspberry Pi Ltd
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#ifndef V3D_PERFORMANCE_COUNTERS_H
+#define V3D_PERFORMANCE_COUNTERS_H
+
+#define V3D_PERFCNT_CATEGORY 0
+#define V3D_PERFCNT_NAME 1
+#define V3D_PERFCNT_DESCRIPTION 2
+
+static const char *v3d_performance_counters[][3] = {
+ {"FEP", "FEP-valid-primitives-no-rendered-pixels", "[FEP] Valid primitives that result in no rendered pixels, for all rendered tiles"},
+ {"FEP", "FEP-valid-primitives-rendered-pixels", "[FEP] Valid primitives for all rendered tiles (primitives may be counted in more than one tile)"},
+ {"FEP", "FEP-clipped-quads", "[FEP] Early-Z/Near/Far clipped quads"},
+ {"FEP", "FEP-valid-quads", "[FEP] Valid quads"},
+ {"TLB", "TLB-quads-not-passing-stencil-test", "[TLB] Quads with no pixels passing the stencil test"},
+ {"TLB", "TLB-quads-not-passing-z-and-stencil-test", "[TLB] Quads with no pixels passing the Z and stencil tests"},
+ {"TLB", "TLB-quads-passing-z-and-stencil-test", "[TLB] Quads with any pixels passing the Z and stencil tests"},
+ {"TLB", "TLB-quads-with-zero-coverage", "[TLB] Quads with all pixels having zero coverage"},
+ {"TLB", "TLB-quads-with-non-zero-coverage", "[TLB] Quads with any pixels having non-zero coverage"},
+ {"TLB", "TLB-quads-written-to-color-buffer", "[TLB] Quads with valid pixels written to colour buffer"},
+ {"PTB", "PTB-primitives-discarded-outside-viewport", "[PTB] Primitives discarded by being outside the viewport"},
+ {"PTB", "PTB-primitives-need-clipping", "[PTB] Primitives that need clipping"},
+ {"PTB", "PTB-primitives-discared-reversed", "[PTB] Primitives that are discarded because they are reversed"},
+ {"QPU", "QPU-total-idle-clk-cycles", "[QPU] Total idle clock cycles for all QPUs"},
+ {"QPU", "QPU-total-active-clk-cycles-vertex-coord-shading", "[QPU] Total active clock cycles for all QPUs doing vertex/coordinate/user shading (counts only when QPU is not stalled)"},
+ {"QPU", "QPU-total-active-clk-cycles-fragment-shading", "[QPU] Total active clock cycles for all QPUs doing fragment shading (counts only when QPU is not stalled)"},
+ {"QPU", "QPU-total-clk-cycles-executing-valid-instr", "[QPU] Total clock cycles for all QPUs executing valid instructions"},
+ {"QPU", "QPU-total-clk-cycles-waiting-TMU", "[QPU] Total clock cycles for all QPUs stalled waiting for TMUs only (counter won't increment if QPU also stalling for another reason)"},
+ {"QPU", "QPU-total-clk-cycles-waiting-scoreboard", "[QPU] Total clock cycles for all QPUs stalled waiting for Scoreboard only (counter won't increment if QPU also stalling for another reason)"},
+ {"QPU", "QPU-total-clk-cycles-waiting-varyings", "[QPU] Total clock cycles for all QPUs stalled waiting for Varyings only (counter won't increment if QPU also stalling for another reason)"},
+ {"QPU", "QPU-total-instr-cache-hit", "[QPU] Total instruction cache hits for all slices"},
+ {"QPU", "QPU-total-instr-cache-miss", "[QPU] Total instruction cache misses for all slices"},
+ {"QPU", "QPU-total-uniform-cache-hit", "[QPU] Total uniforms cache hits for all slices"},
+ {"QPU", "QPU-total-uniform-cache-miss", "[QPU] Total uniforms cache misses for all slices"},
+ {"TMU", "TMU-total-text-quads-access", "[TMU] Total texture cache accesses"},
+ {"TMU", "TMU-total-text-cache-miss", "[TMU] Total texture cache misses (number of fetches from memory/L2cache)"},
+ {"VPM", "VPM-total-clk-cycles-VDW-stalled", "[VPM] Total clock cycles VDW is stalled waiting for VPM access"},
+ {"VPM", "VPM-total-clk-cycles-VCD-stalled", "[VPM] Total clock cycles VCD is stalled waiting for VPM access"},
+ {"CLE", "CLE-bin-thread-active-cycles", "[CLE] Bin thread active cycles"},
+ {"CLE", "CLE-render-thread-active-cycles", "[CLE] Render thread active cycles"},
+ {"L2T", "L2T-total-cache-hit", "[L2T] Total Level 2 cache hits"},
+ {"L2T", "L2T-total-cache-miss", "[L2T] Total Level 2 cache misses"},
+ {"CORE", "cycle-count", "[CORE] Cycle counter"},
+ {"QPU", "QPU-total-clk-cycles-waiting-vertex-coord-shading", "[QPU] Total stalled clock cycles for all QPUs doing vertex/coordinate/user shading"},
+ {"QPU", "QPU-total-clk-cycles-waiting-fragment-shading", "[QPU] Total stalled clock cycles for all QPUs doing fragment shading"},
+ {"PTB", "PTB-primitives-binned", "[PTB] Total primitives binned"},
+ {"AXI", "AXI-writes-seen-watch-0", "[AXI] Writes seen by watch 0"},
+ {"AXI", "AXI-reads-seen-watch-0", "[AXI] Reads seen by watch 0"},
+ {"AXI", "AXI-writes-stalled-seen-watch-0", "[AXI] Write stalls seen by watch 0"},
+ {"AXI", "AXI-reads-stalled-seen-watch-0", "[AXI] Read stalls seen by watch 0"},
+ {"AXI", "AXI-write-bytes-seen-watch-0", "[AXI] Total bytes written seen by watch 0"},
+ {"AXI", "AXI-read-bytes-seen-watch-0", "[AXI] Total bytes read seen by watch 0"},
+ {"AXI", "AXI-writes-seen-watch-1", "[AXI] Writes seen by watch 1"},
+ {"AXI", "AXI-reads-seen-watch-1", "[AXI] Reads seen by watch 1"},
+ {"AXI", "AXI-writes-stalled-seen-watch-1", "[AXI] Write stalls seen by watch 1"},
+ {"AXI", "AXI-reads-stalled-seen-watch-1", "[AXI] Read stalls seen by watch 1"},
+ {"AXI", "AXI-write-bytes-seen-watch-1", "[AXI] Total bytes written seen by watch 1"},
+ {"AXI", "AXI-read-bytes-seen-watch-1", "[AXI] Total bytes read seen by watch 1"},
+ {"TLB", "TLB-partial-quads-written-to-color-buffer", "[TLB] Partial quads written to the colour buffer"},
+ {"TMU", "TMU-total-config-access", "[TMU] Total config accesses"},
+ {"L2T", "L2T-no-id-stalled", "[L2T] No ID stall"},
+ {"L2T", "L2T-command-queue-stalled", "[L2T] Command queue full stall"},
+ {"L2T", "L2T-TMU-writes", "[L2T] TMU write accesses"},
+ {"TMU", "TMU-active-cycles", "[TMU] Active cycles"},
+ {"TMU", "TMU-stalled-cycles", "[TMU] Stalled cycles"},
+ {"CLE", "CLE-thread-active-cycles", "[CLE] Bin or render thread active cycles"},
+ {"L2T", "L2T-TMU-reads", "[L2T] TMU read accesses"},
+ {"L2T", "L2T-CLE-reads", "[L2T] CLE read accesses"},
+ {"L2T", "L2T-VCD-reads", "[L2T] VCD read accesses"},
+ {"L2T", "L2T-TMU-config-reads", "[L2T] TMU CFG read accesses"},
+ {"L2T", "L2T-SLC0-reads", "[L2T] SLC0 read accesses"},
+ {"L2T", "L2T-SLC1-reads", "[L2T] SLC1 read accesses"},
+ {"L2T", "L2T-SLC2-reads", "[L2T] SLC2 read accesses"},
+ {"L2T", "L2T-TMU-write-miss", "[L2T] TMU write misses"},
+ {"L2T", "L2T-TMU-read-miss", "[L2T] TMU read misses"},
+ {"L2T", "L2T-CLE-read-miss", "[L2T] CLE read misses"},
+ {"L2T", "L2T-VCD-read-miss", "[L2T] VCD read misses"},
+ {"L2T", "L2T-TMU-config-read-miss", "[L2T] TMU CFG read misses"},
+ {"L2T", "L2T-SLC0-read-miss", "[L2T] SLC0 read misses"},
+ {"L2T", "L2T-SLC1-read-miss", "[L2T] SLC1 read misses"},
+ {"L2T", "L2T-SLC2-read-miss", "[L2T] SLC2 read misses"},
+ {"CORE", "core-memory-writes", "[CORE] Total memory writes"},
+ {"L2T", "L2T-memory-writes", "[L2T] Total memory writes"},
+ {"PTB", "PTB-memory-writes", "[PTB] Total memory writes"},
+ {"TLB", "TLB-memory-writes", "[TLB] Total memory writes"},
+ {"CORE", "core-memory-reads", "[CORE] Total memory reads"},
+ {"L2T", "L2T-memory-reads", "[L2T] Total memory reads"},
+ {"PTB", "PTB-memory-reads", "[PTB] Total memory reads"},
+ {"PSE", "PSE-memory-reads", "[PSE] Total memory reads"},
+ {"TLB", "TLB-memory-reads", "[TLB] Total memory reads"},
+ {"GMP", "GMP-memory-reads", "[GMP] Total memory reads"},
+ {"PTB", "PTB-memory-words-writes", "[PTB] Total memory words written"},
+ {"TLB", "TLB-memory-words-writes", "[TLB] Total memory words written"},
+ {"PSE", "PSE-memory-words-reads", "[PSE] Total memory words read"},
+ {"TLB", "TLB-memory-words-reads", "[TLB] Total memory words read"},
+ {"TMU", "TMU-MRU-hits", "[TMU] Total MRU hits"},
+ {"CORE", "compute-active-cycles", "[CORE] Compute active cycles"},
+};
+
+#endif
#include "v3dv_private.h"
+#include "common/v3d_performance_counters.h"
#include "util/timespec.h"
#include "compiler/nir/nir_builder.h"
-static const char *v3dv_counters[][3] = {
- {"FEP", "FEP-valid-primitives-no-rendered-pixels", "[FEP] Valid primitives that result in no rendered pixels, for all rendered tiles"},
- {"FEP", "FEP-valid-primitives-rendered-pixels", "[FEP] Valid primitives for all rendered tiles (primitives may be counted in more than one tile)"},
- {"FEP", "FEP-clipped-quads", "[FEP] Early-Z/Near/Far clipped quads"},
- {"FEP", "FEP-valid-quads", "[FEP] Valid quads"},
- {"TLB", "TLB-quads-not-passing-stencil-test", "[TLB] Quads with no pixels passing the stencil test"},
- {"TLB", "TLB-quads-not-passing-z-and-stencil-test", "[TLB] Quads with no pixels passing the Z and stencil tests"},
- {"TLB", "TLB-quads-passing-z-and-stencil-test", "[TLB] Quads with any pixels passing the Z and stencil tests"},
- {"TLB", "TLB-quads-with-zero-coverage", "[TLB] Quads with all pixels having zero coverage"},
- {"TLB", "TLB-quads-with-non-zero-coverage", "[TLB] Quads with any pixels having non-zero coverage"},
- {"TLB", "TLB-quads-written-to-color-buffer", "[TLB] Quads with valid pixels written to colour buffer"},
- {"PTB", "PTB-primitives-discarded-outside-viewport", "[PTB] Primitives discarded by being outside the viewport"},
- {"PTB", "PTB-primitives-need-clipping", "[PTB] Primitives that need clipping"},
- {"PTB", "PTB-primitives-discared-reversed", "[PTB] Primitives that are discarded because they are reversed"},
- {"QPU", "QPU-total-idle-clk-cycles", "[QPU] Total idle clock cycles for all QPUs"},
- {"QPU", "QPU-total-active-clk-cycles-vertex-coord-shading", "[QPU] Total active clock cycles for all QPUs doing vertex/coordinate/user shading (counts only when QPU is not stalled)"},
- {"QPU", "QPU-total-active-clk-cycles-fragment-shading", "[QPU] Total active clock cycles for all QPUs doing fragment shading (counts only when QPU is not stalled)"},
- {"QPU", "QPU-total-clk-cycles-executing-valid-instr", "[QPU] Total clock cycles for all QPUs executing valid instructions"},
- {"QPU", "QPU-total-clk-cycles-waiting-TMU", "[QPU] Total clock cycles for all QPUs stalled waiting for TMUs only (counter won't increment if QPU also stalling for another reason)"},
- {"QPU", "QPU-total-clk-cycles-waiting-scoreboard", "[QPU] Total clock cycles for all QPUs stalled waiting for Scoreboard only (counter won't increment if QPU also stalling for another reason)"},
- {"QPU", "QPU-total-clk-cycles-waiting-varyings", "[QPU] Total clock cycles for all QPUs stalled waiting for Varyings only (counter won't increment if QPU also stalling for another reason)"},
- {"QPU", "QPU-total-instr-cache-hit", "[QPU] Total instruction cache hits for all slices"},
- {"QPU", "QPU-total-instr-cache-miss", "[QPU] Total instruction cache misses for all slices"},
- {"QPU", "QPU-total-uniform-cache-hit", "[QPU] Total uniforms cache hits for all slices"},
- {"QPU", "QPU-total-uniform-cache-miss", "[QPU] Total uniforms cache misses for all slices"},
- {"TMU", "TMU-total-text-quads-access", "[TMU] Total texture cache accesses"},
- {"TMU", "TMU-total-text-cache-miss", "[TMU] Total texture cache misses (number of fetches from memory/L2cache)"},
- {"VPM", "VPM-total-clk-cycles-VDW-stalled", "[VPM] Total clock cycles VDW is stalled waiting for VPM access"},
- {"VPM", "VPM-total-clk-cycles-VCD-stalled", "[VPM] Total clock cycles VCD is stalled waiting for VPM access"},
- {"CLE", "CLE-bin-thread-active-cycles", "[CLE] Bin thread active cycles"},
- {"CLE", "CLE-render-thread-active-cycles", "[CLE] Render thread active cycles"},
- {"L2T", "L2T-total-cache-hit", "[L2T] Total Level 2 cache hits"},
- {"L2T", "L2T-total-cache-miss", "[L2T] Total Level 2 cache misses"},
- {"CORE", "cycle-count", "[CORE] Cycle counter"},
- {"QPU", "QPU-total-clk-cycles-waiting-vertex-coord-shading", "[QPU] Total stalled clock cycles for all QPUs doing vertex/coordinate/user shading"},
- {"QPU", "QPU-total-clk-cycles-waiting-fragment-shading", "[QPU] Total stalled clock cycles for all QPUs doing fragment shading"},
- {"PTB", "PTB-primitives-binned", "[PTB] Total primitives binned"},
- {"AXI", "AXI-writes-seen-watch-0", "[AXI] Writes seen by watch 0"},
- {"AXI", "AXI-reads-seen-watch-0", "[AXI] Reads seen by watch 0"},
- {"AXI", "AXI-writes-stalled-seen-watch-0", "[AXI] Write stalls seen by watch 0"},
- {"AXI", "AXI-reads-stalled-seen-watch-0", "[AXI] Read stalls seen by watch 0"},
- {"AXI", "AXI-write-bytes-seen-watch-0", "[AXI] Total bytes written seen by watch 0"},
- {"AXI", "AXI-read-bytes-seen-watch-0", "[AXI] Total bytes read seen by watch 0"},
- {"AXI", "AXI-writes-seen-watch-1", "[AXI] Writes seen by watch 1"},
- {"AXI", "AXI-reads-seen-watch-1", "[AXI] Reads seen by watch 1"},
- {"AXI", "AXI-writes-stalled-seen-watch-1", "[AXI] Write stalls seen by watch 1"},
- {"AXI", "AXI-reads-stalled-seen-watch-1", "[AXI] Read stalls seen by watch 1"},
- {"AXI", "AXI-write-bytes-seen-watch-1", "[AXI] Total bytes written seen by watch 1"},
- {"AXI", "AXI-read-bytes-seen-watch-1", "[AXI] Total bytes read seen by watch 1"},
- {"TLB", "TLB-partial-quads-written-to-color-buffer", "[TLB] Partial quads written to the colour buffer"},
- {"TMU", "TMU-total-config-access", "[TMU] Total config accesses"},
- {"L2T", "L2T-no-id-stalled", "[L2T] No ID stall"},
- {"L2T", "L2T-command-queue-stalled", "[L2T] Command queue full stall"},
- {"L2T", "L2T-TMU-writes", "[L2T] TMU write accesses"},
- {"TMU", "TMU-active-cycles", "[TMU] Active cycles"},
- {"TMU", "TMU-stalled-cycles", "[TMU] Stalled cycles"},
- {"CLE", "CLE-thread-active-cycles", "[CLE] Bin or render thread active cycles"},
- {"L2T", "L2T-TMU-reads", "[L2T] TMU read accesses"},
- {"L2T", "L2T-CLE-reads", "[L2T] CLE read accesses"},
- {"L2T", "L2T-VCD-reads", "[L2T] VCD read accesses"},
- {"L2T", "L2T-TMU-config-reads", "[L2T] TMU CFG read accesses"},
- {"L2T", "L2T-SLC0-reads", "[L2T] SLC0 read accesses"},
- {"L2T", "L2T-SLC1-reads", "[L2T] SLC1 read accesses"},
- {"L2T", "L2T-SLC2-reads", "[L2T] SLC2 read accesses"},
- {"L2T", "L2T-TMU-write-miss", "[L2T] TMU write misses"},
- {"L2T", "L2T-TMU-read-miss", "[L2T] TMU read misses"},
- {"L2T", "L2T-CLE-read-miss", "[L2T] CLE read misses"},
- {"L2T", "L2T-VCD-read-miss", "[L2T] VCD read misses"},
- {"L2T", "L2T-TMU-config-read-miss", "[L2T] TMU CFG read misses"},
- {"L2T", "L2T-SLC0-read-miss", "[L2T] SLC0 read misses"},
- {"L2T", "L2T-SLC1-read-miss", "[L2T] SLC1 read misses"},
- {"L2T", "L2T-SLC2-read-miss", "[L2T] SLC2 read misses"},
- {"CORE", "core-memory-writes", "[CORE] Total memory writes"},
- {"L2T", "L2T-memory-writes", "[L2T] Total memory writes"},
- {"PTB", "PTB-memory-writes", "[PTB] Total memory writes"},
- {"TLB", "TLB-memory-writes", "[TLB] Total memory writes"},
- {"CORE", "core-memory-reads", "[CORE] Total memory reads"},
- {"L2T", "L2T-memory-reads", "[L2T] Total memory reads"},
- {"PTB", "PTB-memory-reads", "[PTB] Total memory reads"},
- {"PSE", "PSE-memory-reads", "[PSE] Total memory reads"},
- {"TLB", "TLB-memory-reads", "[TLB] Total memory reads"},
- {"GMP", "GMP-memory-reads", "[GMP] Total memory reads"},
- {"PTB", "PTB-memory-words-writes", "[PTB] Total memory words written"},
- {"TLB", "TLB-memory-words-writes", "[TLB] Total memory words written"},
- {"PSE", "PSE-memory-words-reads", "[PSE] Total memory words read"},
- {"TLB", "TLB-memory-words-reads", "[TLB] Total memory words read"},
- {"TMU", "TMU-MRU-hits", "[TMU] Total MRU hits"},
- {"CORE", "compute-active-cycles", "[CORE] Compute active cycles"},
-};
-
static void
kperfmon_create(struct v3dv_device *device,
struct v3dv_query_pool *pool,
VK_OUTARRAY_MAKE_TYPED(VkPerformanceCounterDescriptionKHR,
out_desc, pCounterDescriptions, &desc_count);
- for (int i = 0; i < ARRAY_SIZE(v3dv_counters); i++) {
+ for (int i = 0; i < ARRAY_SIZE(v3d_performance_counters); i++) {
vk_outarray_append_typed(VkPerformanceCounterKHR, &out, counter) {
counter->unit = VK_PERFORMANCE_COUNTER_UNIT_GENERIC_KHR;
counter->scope = VK_PERFORMANCE_COUNTER_SCOPE_COMMAND_KHR;
counter->storage = VK_PERFORMANCE_COUNTER_STORAGE_UINT64_KHR;
unsigned char sha1_result[20];
- _mesa_sha1_compute(v3dv_counters[i][1], strlen(v3dv_counters[i][1]),
+ _mesa_sha1_compute(v3d_performance_counters[i][V3D_PERFCNT_NAME],
+ strlen(v3d_performance_counters[i][V3D_PERFCNT_NAME]),
sha1_result);
memcpy(counter->uuid, sha1_result, sizeof(counter->uuid));
&out_desc, desc) {
desc->flags = 0;
snprintf(desc->name, sizeof(desc->name), "%s",
- v3dv_counters[i][1]);
+ v3d_performance_counters[i][V3D_PERFCNT_NAME]);
snprintf(desc->category, sizeof(desc->category), "%s",
- v3dv_counters[i][0]);
+ v3d_performance_counters[i][V3D_PERFCNT_CATEGORY]);
snprintf(desc->description, sizeof(desc->description), "%s",
- v3dv_counters[i][2]);
+ v3d_performance_counters[i][V3D_PERFCNT_DESCRIPTION]);
}
}
#include "v3d_query.h"
+#include "common/v3d_performance_counters.h"
+
struct v3d_query_perfcnt
{
struct v3d_query base;
struct v3d_perfmon_state *perfmon;
};
-static const char *v3d_counter_names[] = {
- "FEP-valid-primitives-no-rendered-pixels",
- "FEP-valid-primitives-rendered-pixels",
- "FEP-clipped-quads",
- "FEP-valid-quads",
- "TLB-quads-not-passing-stencil-test",
- "TLB-quads-not-passing-z-and-stencil-test",
- "TLB-quads-passing-z-and-stencil-test",
- "TLB-quads-with-zero-coverage",
- "TLB-quads-with-non-zero-coverage",
- "TLB-quads-written-to-color-buffer",
- "PTB-primitives-discarded-outside-viewport",
- "PTB-primitives-need-clipping",
- "PTB-primitives-discared-reversed",
- "QPU-total-idle-clk-cycles",
- "QPU-total-active-clk-cycles-vertex-coord-shading",
- "QPU-total-active-clk-cycles-fragment-shading",
- "QPU-total-clk-cycles-executing-valid-instr",
- "QPU-total-clk-cycles-waiting-TMU",
- "QPU-total-clk-cycles-waiting-scoreboard",
- "QPU-total-clk-cycles-waiting-varyings",
- "QPU-total-instr-cache-hit",
- "QPU-total-instr-cache-miss",
- "QPU-total-uniform-cache-hit",
- "QPU-total-uniform-cache-miss",
- "TMU-total-text-quads-access",
- "TMU-total-text-cache-miss",
- "VPM-total-clk-cycles-VDW-stalled",
- "VPM-total-clk-cycles-VCD-stalled",
- "CLE-bin-thread-active-cycles",
- "CLE-render-thread-active-cycles",
- "L2T-total-cache-hit",
- "L2T-total-cache-miss",
- "cycle-count",
- "QPU-total-clk-cycles-waiting-vertex-coord-shading",
- "QPU-total-clk-cycles-waiting-fragment-shading",
- "PTB-primitives-binned",
- "AXI-writes-seen-watch-0",
- "AXI-reads-seen-watch-0",
- "AXI-writes-stalled-seen-watch-0",
- "AXI-reads-stalled-seen-watch-0",
- "AXI-write-bytes-seen-watch-0",
- "AXI-read-bytes-seen-watch-0",
- "AXI-writes-seen-watch-1",
- "AXI-reads-seen-watch-1",
- "AXI-writes-stalled-seen-watch-1",
- "AXI-reads-stalled-seen-watch-1",
- "AXI-write-bytes-seen-watch-1",
- "AXI-read-bytes-seen-watch-1",
- "TLB-partial-quads-written-to-color-buffer",
- "TMU-total-config-access",
- "L2T-no-id-stalled",
- "L2T-command-queue-stalled",
- "L2T-TMU-writes",
- "TMU-active-cycles",
- "TMU-stalled-cycles",
- "CLE-thread-active-cycles",
- "L2T-TMU-reads",
- "L2T-CLE-reads",
- "L2T-VCD-reads",
- "L2T-TMU-config-reads",
- "L2T-SLC0-reads",
- "L2T-SLC1-reads",
- "L2T-SLC2-reads",
- "L2T-TMU-write-miss",
- "L2T-TMU-read-miss",
- "L2T-CLE-read-miss",
- "L2T-VCD-read-miss",
- "L2T-TMU-config-read-miss",
- "L2T-SLC0-read-miss",
- "L2T-SLC1-read-miss",
- "L2T-SLC2-read-miss",
- "core-memory-writes",
- "L2T-memory-writes",
- "PTB-memory-writes",
- "TLB-memory-writes",
- "core-memory-reads",
- "L2T-memory-reads",
- "PTB-memory-reads",
- "PSE-memory-reads",
- "TLB-memory-reads",
- "GMP-memory-reads",
- "PTB-memory-words-writes",
- "TLB-memory-words-writes",
- "PSE-memory-words-reads",
- "TLB-memory-words-reads",
- "TMU-MRU-hits",
- "compute-active-cycles",
-};
-
static void
kperfmon_destroy(struct v3d_context *v3d, struct v3d_perfmon_state *perfmon)
{
info->name = "V3D counters";
info->max_active_queries = DRM_V3D_MAX_PERF_COUNTERS;
- info->num_queries = ARRAY_SIZE(v3d_counter_names);
+ info->num_queries = ARRAY_SIZE(v3d_performance_counters);
return 1;
}
return 0;
if (!info)
- return ARRAY_SIZE(v3d_counter_names);
+ return ARRAY_SIZE(v3d_performance_counters);
- if (index >= ARRAY_SIZE(v3d_counter_names))
+ if (index >= ARRAY_SIZE(v3d_performance_counters))
return 0;
info->group_id = 0;
- info->name = v3d_counter_names[index];
+ info->name = v3d_performance_counters[index][V3D_PERFCNT_NAME];
info->query_type = PIPE_QUERY_DRIVER_SPECIFIC + index;
info->result_type = PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE;
info->type = PIPE_DRIVER_QUERY_TYPE_UINT64;
for (i = 0; i < num_queries; i++) {
if (query_types[i] < PIPE_QUERY_DRIVER_SPECIFIC ||
query_types[i] >= PIPE_QUERY_DRIVER_SPECIFIC +
- ARRAY_SIZE(v3d_counter_names)) {
+ ARRAY_SIZE(v3d_performance_counters)) {
fprintf(stderr, "Invalid query type\n");
return NULL;
}
projects / platform / upstream / mesa.git / commitdiff