Fix issues with memory barrier tests.
There are multiple issues currently in the dEQP-VK.memory.pipeline_barrier.* tests.
I found 3 ocasions where the values provided to srcAccessMask and dstAccessMask are the other way around.
In particular, after a transfer operation the barrier responsible for flushing the output of the transfer writes uses srcAccessMask=0 and dstAccessMask=VK_ACCESS_TRANSFER_WRITE_BIT, when actually VK_ACCESS_TRANSFER_WRITE_BIT should have been set in srcAccessMask not in dstAccessMask.
See merge request !421