video: exynos_dp: check time loop for RPLY_RECEIV

This patch checks time loop for RPLY_RECEIV which means that
AUX channel command reply is received.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>

diff --git a/drivers/video/exynos/exynos_dp_reg.c b/drivers/video/exynos/exynos_dp_reg.c
index 2db5b9a..174c445 100644 (file)
--- a/drivers/video/exynos/exynos_dp_reg.c
+++ b/drivers/video/exynos/exynos_dp_reg.c
@@ -401,6 +401,7 @@ int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp)
 {
        int reg;
        int retval = 0;
+       int timeout_loop = 0;
 
        /* Enable AUX CH operation */
        reg = readl(dp->reg_base + EXYNOS_DP_AUX_CH_CTL_2);
@@ -409,8 +410,15 @@ int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp)
 
        /* Is AUX CH command reply received? */
        reg = readl(dp->reg_base + EXYNOS_DP_INT_STA);
-       while (!(reg & RPLY_RECEIV))
+       while (!(reg & RPLY_RECEIV)) {
+               timeout_loop++;
+               if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
+                       dev_err(dp->dev, "AUX CH command reply failed!\n");
+                       return -ETIMEDOUT;
+               }
                reg = readl(dp->reg_base + EXYNOS_DP_INT_STA);
+               usleep_range(10, 11);
+       }
 
        /* Clear interrupt source for AUX CH command reply */
        writel(RPLY_RECEIV, dp->reg_base + EXYNOS_DP_INT_STA);