unsigned int debounce_cnt;
unsigned int repeat_cnt;
- unsigned int wake_cnt; /* 0:wake on any key >1:wake on wake_cfg */
- const struct tegra_kbc_wake_key *wake_cfg;
-
struct tegra_kbc_pin_cfg pin_cfg[KBC_MAX_GPIO];
const struct matrix_keymap_data *keymap_data;
void __iomem *mmio;
struct input_dev *idev;
unsigned int irq;
- unsigned int wake_enable_rows;
- unsigned int wake_enable_cols;
spinlock_t lock;
unsigned int repoll_dly;
unsigned long cp_dly_jiffies;
int i;
unsigned int rst_val;
- BUG_ON(pdata->wake_cnt > KBC_MAX_KEY);
- rst_val = (filter && pdata->wake_cnt) ? ~0 : 0;
+ /* Either mask all keys or none. */
+ rst_val = (filter && !pdata->wakeup) ? ~0 : 0;
for (i = 0; i < KBC_MAX_ROW; i++)
writel(rst_val, kbc->mmio + KBC_ROW0_MASK_0 + i * 4);
-
- if (filter) {
- for (i = 0; i < pdata->wake_cnt; i++) {
- u32 val, addr;
- addr = pdata->wake_cfg[i].row * 4 + KBC_ROW0_MASK_0;
- val = readl(kbc->mmio + addr);
- val &= ~(1 << pdata->wake_cfg[i].col);
- writel(val, kbc->mmio + addr);
- }
- }
}
static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
struct resource *res;
int irq;
int err;
- int i;
int num_rows = 0;
unsigned int debounce_cnt;
unsigned int scan_time_rows;
goto err_iounmap;
}
- kbc->wake_enable_rows = 0;
- kbc->wake_enable_cols = 0;
- for (i = 0; i < pdata->wake_cnt; i++) {
- kbc->wake_enable_rows |= (1 << pdata->wake_cfg[i].row);
- kbc->wake_enable_cols |= (1 << pdata->wake_cfg[i].col);
- }
-
/*
* The time delay between two consecutive reads of the FIFO is
* the sum of the repeat time and the time taken for scanning