from 3 x MAX_MACHINE_MODE.
(CONSTM1_RTX): Define.
* emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
from 3 x MAX_MACHINE_MODE.
(gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are
CONSTM1_RTX.
(init_emit_once): Initialize CONSTM1_RTX for MODE_INT and
MODE_VECTOR_INT modes.
* simplify-rtx.c (simplify_binary_operation_1) <case IOR, XOR, AND>:
Optimize if one operand is CONSTM1_RTX.
* config/i386/i386.c (ix86_expand_sse_movcc): Optimize mask ? -1 : x
into mask | x.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179238
138bc75d-0d04-0410-961f-
82ee72b054a4
+2011-09-27 Jakub Jelinek <jakub@redhat.com>
+
+ * rtl.h (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
+ from 3 x MAX_MACHINE_MODE.
+ (CONSTM1_RTX): Define.
+ * emit-rtl.c (const_tiny_rtx): Change into array of 4 x MAX_MACHINE_MODE
+ from 3 x MAX_MACHINE_MODE.
+ (gen_rtx_CONST_VECTOR): Use CONSTM1_RTX if all inner constants are
+ CONSTM1_RTX.
+ (init_emit_once): Initialize CONSTM1_RTX for MODE_INT and
+ MODE_VECTOR_INT modes.
+ * simplify-rtx.c (simplify_binary_operation_1) <case IOR, XOR, AND>:
+ Optimize if one operand is CONSTM1_RTX.
+ * config/i386/i386.c (ix86_expand_sse_movcc): Optimize mask ? -1 : x
+ into mask | x.
+
2011-09-26 David S. Miller <davem@davemloft.net>
* config/sparc/sparc.md (edge{8,16,32}{,l}): Return Pmode.
x = gen_rtx_AND (mode, x, op_false);
emit_insn (gen_rtx_SET (VOIDmode, dest, x));
}
+ else if (INTEGRAL_MODE_P (mode) && op_true == CONSTM1_RTX (mode))
+ {
+ op_false = force_reg (mode, op_false);
+ x = gen_rtx_IOR (mode, cmp, op_false);
+ emit_insn (gen_rtx_SET (VOIDmode, dest, x));
+ }
else if (TARGET_XOP)
{
op_true = force_reg (mode, op_true);
/* We record floating-point CONST_DOUBLEs in each floating-point mode for
the values of 0, 1, and 2. For the integer entries and VOIDmode, we
- record a copy of const[012]_rtx. */
+ record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
+ is set only for MODE_INT and MODE_VECTOR_INT modes. */
-rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
+rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
rtx const_true_rtx;
return CONST0_RTX (mode);
else if (x == CONST1_RTX (inner))
return CONST1_RTX (mode);
+ else if (x == CONSTM1_RTX (inner))
+ return CONSTM1_RTX (mode);
}
return gen_rtx_raw_CONST_VECTOR (mode, v);
dconsthalf = dconst1;
SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
- for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
+ for (i = 0; i < 3; i++)
{
const REAL_VALUE_TYPE *const r =
(i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
const_tiny_rtx[i][(int) mode] = GEN_INT (i);
}
+ const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
+
+ for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
+ mode != VOIDmode;
+ mode = GET_MODE_WIDER_MODE (mode))
+ const_tiny_rtx[3][(int) mode] = constm1_rtx;
+
for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
{
const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
+ const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
}
for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
#define constm1_rtx (const_int_rtx[MAX_SAVED_CONST_INT-1])
extern GTY(()) rtx const_true_rtx;
-extern GTY(()) rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
+extern GTY(()) rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
/* Returns a constant 0 rtx in mode MODE. Integer modes are treated the
same as VOIDmode. */
#define CONST0_RTX(MODE) (const_tiny_rtx[0][(int) (MODE)])
-/* Likewise, for the constants 1 and 2. */
+/* Likewise, for the constants 1 and 2 and -1. */
#define CONST1_RTX(MODE) (const_tiny_rtx[1][(int) (MODE)])
#define CONST2_RTX(MODE) (const_tiny_rtx[2][(int) (MODE)])
+#define CONSTM1_RTX(MODE) (const_tiny_rtx[3][(int) (MODE)])
/* If HARD_FRAME_POINTER_REGNUM is defined, then a special dummy reg
is used to represent the frame pointer. This is because the
case IOR:
if (trueop1 == CONST0_RTX (mode))
return op0;
- if (CONST_INT_P (trueop1)
- && ((UINTVAL (trueop1) & GET_MODE_MASK (mode))
- == GET_MODE_MASK (mode)))
+ if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode))
return op1;
if (rtx_equal_p (trueop0, trueop1) && ! side_effects_p (op0))
return op0;
case XOR:
if (trueop1 == CONST0_RTX (mode))
return op0;
- if (CONST_INT_P (trueop1)
- && ((UINTVAL (trueop1) & GET_MODE_MASK (mode))
- == GET_MODE_MASK (mode)))
+ if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode))
return simplify_gen_unary (NOT, mode, op0, mode);
if (rtx_equal_p (trueop0, trueop1)
&& ! side_effects_p (op0)
case AND:
if (trueop1 == CONST0_RTX (mode) && ! side_effects_p (op0))
return trueop1;
+ if (INTEGRAL_MODE_P (mode) && trueop1 == CONSTM1_RTX (mode))
+ return op0;
if (HWI_COMPUTABLE_MODE_P (mode))
{
HOST_WIDE_INT nzop0 = nonzero_bits (trueop0, mode);