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freedreno/ci: Update unit test reference decodes
authorRob Clark <robdclark@chromium.org>
Sat, 23 Jul 2022 20:14:34 +0000 (13:14 -0700)
committerMarge Bot <emma+marge@anholt.net>
Tue, 2 Aug 2022 23:46:15 +0000 (23:46 +0000)
Apparently we aren't running unit tests in CI?

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>

src/freedreno/.gitlab-ci/reference/crash.log patch | blob | history
src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log patch | blob | history
src/freedreno/.gitlab-ci/reference/fd-clouds.log patch | blob | history

diff --git a/src/freedreno/.gitlab-ci/reference/crash.log b/src/freedreno/.gitlab-ci/reference/crash.log
index e5cbf18..d1ad46c 100644 (file)
--- a/src/freedreno/.gitlab-ci/reference/crash.log
+++ b/src/freedreno/.gitlab-ci/reference/crash.log
@@ -5469,7 +5469,7 @@ clusters:
        790cdf93        GRAS_SC_VIEWPORT_SCISSOR[0xf].BR: { X = 57235 | Y = 30988 }
        00000000        GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
        00000000        GRAS_SC_WINDOW_SCISSOR_BR: { X = 0 | Y = 0 }
-       00000000        GRAS_LRZ_CNTL: { 0 }
+       00000000        GRAS_LRZ_CNTL: { DIR = 0 }
        00000000        GRAS_LRZ_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
        00000000        GRAS_LRZ_MRT_BUF_INFO_0: { COLOR_FORMAT = 0 }
        00000000        GRAS_LRZ_BUFFER_BASE: 0
@@ -5714,7 +5714,7 @@ clusters:
        790cdf93        GRAS_SC_VIEWPORT_SCISSOR[0xf].BR: { X = 57235 | Y = 30988 }
        00000000        GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
        00000000        GRAS_SC_WINDOW_SCISSOR_BR: { X = 0 | Y = 0 }
-       00000000        GRAS_LRZ_CNTL: { 0 }
+       00000000        GRAS_LRZ_CNTL: { DIR = 0 }
        00000000        GRAS_LRZ_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
        00000000        GRAS_LRZ_MRT_BUF_INFO_0: { COLOR_FORMAT = 0 }
        00000000        GRAS_LRZ_BUFFER_BASE: 0
@@ -5875,7 +5875,7 @@ clusters:
        00000000        RB_BLIT_CLEAR_COLOR_DW1: 0
        00000000        RB_BLIT_CLEAR_COLOR_DW2: 0
        00000000        RB_BLIT_CLEAR_COLOR_DW3: 0
-       000000f2        RB_BLIT_INFO: { GMEM | CLEAR_MASK = 0xf }
+       000000f2        RB_BLIT_INFO: { GMEM | CLEAR_MASK = 0xf | LAST = 0 | BUFFER_ID = 0 }
        00000000        RB_DEPTH_FLAG_BUFFER_BASE: 0
        00000000        RB_DEPTH_FLAG_BUFFER_BASE_HI: 0
        00000000        RB_DEPTH_FLAG_BUFFER_PITCH: { PITCH = 0 | ARRAY_PITCH = 0 }
@@ -6073,7 +6073,7 @@ clusters:
        00000000        RB_BLIT_CLEAR_COLOR_DW1: 0
        00000000        RB_BLIT_CLEAR_COLOR_DW2: 0
        00000000        RB_BLIT_CLEAR_COLOR_DW3: 0
-       000000f2        RB_BLIT_INFO: { GMEM | CLEAR_MASK = 0xf }
+       000000f2        RB_BLIT_INFO: { GMEM | CLEAR_MASK = 0xf | LAST = 0 | BUFFER_ID = 0 }
        00000000        RB_DEPTH_FLAG_BUFFER_BASE: 0
        00000000        RB_DEPTH_FLAG_BUFFER_BASE_HI: 0
        00000000        RB_DEPTH_FLAG_BUFFER_PITCH: { PITCH = 0 | ARRAY_PITCH = 0 }
@@ -6222,28 +6222,28 @@ clusters:
        00000000        VPC_SO[0].BUFFER_BASE: 0
        00000000        VPC_SO[0].BUFFER_BASE_HI: 0
        00000000        VPC_SO[0].BUFFER_SIZE: 0
-       00000001        VPC_SO[0].NCOMP: 0x1
+       00000001        VPC_SO[0].BUFFER_STRIDE: 0x4
        00000000        VPC_SO[0].BUFFER_OFFSET: 0
        00000000        VPC_SO[0].FLUSH_BASE: 0
        00000000        VPC_SO[0].FLUSH_BASE_HI: 0
        00000000        VPC_SO[0x1].BUFFER_BASE: 0
        00000000        VPC_SO[0x1].BUFFER_BASE_HI: 0
        00000000        VPC_SO[0x1].BUFFER_SIZE: 0
-       00000001        VPC_SO[0x1].NCOMP: 0x1
+       00000001        VPC_SO[0x1].BUFFER_STRIDE: 0x4
        00000000        VPC_SO[0x1].BUFFER_OFFSET: 0
        00000000        VPC_SO[0x1].FLUSH_BASE: 0
        00000000        VPC_SO[0x1].FLUSH_BASE_HI: 0
        00000000        VPC_SO[0x2].BUFFER_BASE: 0
        00000000        VPC_SO[0x2].BUFFER_BASE_HI: 0
        00000000        VPC_SO[0x2].BUFFER_SIZE: 0
-       00000001        VPC_SO[0x2].NCOMP: 0x1
+       00000001        VPC_SO[0x2].BUFFER_STRIDE: 0x4
        00000000        VPC_SO[0x2].BUFFER_OFFSET: 0
        00000000        VPC_SO[0x2].FLUSH_BASE: 0
        00000000        VPC_SO[0x2].FLUSH_BASE_HI: 0
        00000000        VPC_SO[0x3].BUFFER_BASE: 0
        00000000        VPC_SO[0x3].BUFFER_BASE_HI: 0
        00000000        VPC_SO[0x3].BUFFER_SIZE: 0
-       00000001        VPC_SO[0x3].NCOMP: 0x1
+       00000001        VPC_SO[0x3].BUFFER_STRIDE: 0x4
        00000000        VPC_SO[0x3].BUFFER_OFFSET: 0
        00000000        VPC_SO[0x3].FLUSH_BASE: 0
        00000000        VPC_SO[0x3].FLUSH_BASE_HI: 0
@@ -6284,28 +6284,28 @@ clusters:
        00000000        VPC_SO[0].BUFFER_BASE: 0
        00000000        VPC_SO[0].BUFFER_BASE_HI: 0
        00000000        VPC_SO[0].BUFFER_SIZE: 0
-       00000001        VPC_SO[0].NCOMP: 0x1
+       00000001        VPC_SO[0].BUFFER_STRIDE: 0x4
        00000000        VPC_SO[0].BUFFER_OFFSET: 0
        00000000        VPC_SO[0].FLUSH_BASE: 0
        00000000        VPC_SO[0].FLUSH_BASE_HI: 0
        00000000        VPC_SO[0x1].BUFFER_BASE: 0
        00000000        VPC_SO[0x1].BUFFER_BASE_HI: 0
        00000000        VPC_SO[0x1].BUFFER_SIZE: 0
-       00000001        VPC_SO[0x1].NCOMP: 0x1
+       00000001        VPC_SO[0x1].BUFFER_STRIDE: 0x4
        00000000        VPC_SO[0x1].BUFFER_OFFSET: 0
        00000000        VPC_SO[0x1].FLUSH_BASE: 0
        00000000        VPC_SO[0x1].FLUSH_BASE_HI: 0
        00000000        VPC_SO[0x2].BUFFER_BASE: 0
        00000000        VPC_SO[0x2].BUFFER_BASE_HI: 0
        00000000        VPC_SO[0x2].BUFFER_SIZE: 0
-       00000001        VPC_SO[0x2].NCOMP: 0x1
+       00000001        VPC_SO[0x2].BUFFER_STRIDE: 0x4
        00000000        VPC_SO[0x2].BUFFER_OFFSET: 0
        00000000        VPC_SO[0x2].FLUSH_BASE: 0
        00000000        VPC_SO[0x2].FLUSH_BASE_HI: 0
        00000000        VPC_SO[0x3].BUFFER_BASE: 0
        00000000        VPC_SO[0x3].BUFFER_BASE_HI: 0
        00000000        VPC_SO[0x3].BUFFER_SIZE: 0
-       00000001        VPC_SO[0x3].NCOMP: 0x1
+       00000001        VPC_SO[0x3].BUFFER_STRIDE: 0x4
        00000000        VPC_SO[0x3].BUFFER_OFFSET: 0
        00000000        VPC_SO[0x3].FLUSH_BASE: 0
        00000000        VPC_SO[0x3].FLUSH_BASE_HI: 0
@@ -7301,7 +7301,7 @@ clusters:
     - context: 0
        00000001        HLSQ_FS_CNTL_0: { THREADSIZE = THREAD128 }
        00000007        HLSQ_CONTROL_1_REG: 0x7
-       fcfcfcfc        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | SIZE = r63.x }
+       fcfcfcfc        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | CENTERRHW = r63.x }
        fcfcfcfc        HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
        fcfcfcfc        HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | XYCOORDREGID = r63.x | ZWCOORDREGID = r63.x }
        000000fc        HLSQ_CONTROL_5_REG: { LINELENGTHREGID = r63.x | FOVEATIONQUALITYREGID = r0.x }
@@ -7334,7 +7334,7 @@ clusters:
     - context: 1
        00000001        HLSQ_FS_CNTL_0: { THREADSIZE = THREAD128 }
        00000007        HLSQ_CONTROL_1_REG: 0x7
-       fcfcfcfc        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | SIZE = r63.x }
+       fcfcfcfc        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | CENTERRHW = r63.x }
        fcfcfcfc        HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
        fcfcfcfc        HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | XYCOORDREGID = r63.x | ZWCOORDREGID = r63.x }
        000000fc        HLSQ_CONTROL_5_REG: { LINELENGTHREGID = r63.x | FOVEATIONQUALITYREGID = r0.x }
diff --git a/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log b/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
index 528661e..1fd463f 100644 (file)
--- a/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
+++ b/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
@@ -200,7 +200,7 @@ t4          write SP_GS_CTRL_REG0 (a870)
                        SP_GS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 0 | BRANCHSTACK = 0 }
 0000000001058204:              0000: 48a87001 00000000
 t4             write GRAS_LRZ_CNTL (8100)
-                       GRAS_LRZ_CNTL: { 0 }
+                       GRAS_LRZ_CNTL: { DIR = 0 }
 000000000105820c:              0000: 48810001 00000000
 t4             write RB_LRZ_CNTL (8898)
                        RB_LRZ_CNTL: { 0 }
@@ -287,7 +287,7 @@ t7          opcode: CP_BLIT (2c) (2 dwords)
  +     00000000                GRAS_SU_CONSERVATIVE_RAS_CNTL: { SHIFTAMOUNT = 0 }
 !+     00000002                GRAS_SC_CNTL: { CCUSINGLECACHELINESIZE = 0x2 | SINGLE_PRIM_MODE = NO_FLUSH | RASTER_MODE = TYPE_TILED | RASTER_DIRECTION = LR_TB | SEQUENCED_THREAD_DISTRIBUTION = DIST_SCREEN_COORD }
  +     00000000                GRAS_UNKNOWN_80AF: FALSE
- +     00000000                GRAS_LRZ_CNTL: { 0 }
+ +     00000000                GRAS_LRZ_CNTL: { DIR = 0 }
  +     00000000                GRAS_UNKNOWN_8110: 0
 !+     10f03080                GRAS_2D_BLIT_CNTL: { ROTATE = ROTATE_0 | SOLID_COLOR | COLOR_FORMAT = FMT6_8_8_8_8_UNORM | MASK = 0xf | IFMT = R2D_UNORM8 | RASTER_MODE = TYPE_TILED }
  +     00000000                GRAS_2D_DST_TL: { X = 0 | Y = 0 }
@@ -460,7 +460,7 @@ t4                  write RB_MSAA_CNTL (88d5)
                                RB_MSAA_CNTL: { SAMPLES = MSAA_ONE }
 000000000115e018:                      0000: 4088d501 00000000
 t4                     write RB_BLIT_INFO (88e3)
-                               RB_BLIT_INFO: { UNK0 | GMEM | CLEAR_MASK = 0 }
+                               RB_BLIT_INFO: { UNK0 | GMEM | CLEAR_MASK = 0 | LAST = 0 | BUFFER_ID = 0 }
 000000000115e020:                      0000: 4088e301 00000003
 t4                     write RB_BLIT_DST_INFO (88d7)
                                RB_BLIT_DST_INFO: { TILE_MODE = TILE6_3 | FLAGS | SAMPLES = MSAA_ONE | COLOR_SWAP = WZYX | COLOR_FORMAT = FMT6_8_8_8_8_UNORM }
@@ -502,7 +502,7 @@ t7                  opcode: CP_EVENT_WRITE (46) (2 dwords)
 !+     01012000                        RB_BLIT_FLAG_DST: 0x1012000
  +     00000000                        RB_BLIT_FLAG_DST_HI: 0
 !+     00004001                        RB_BLIT_FLAG_DST_PITCH: { PITCH = 64 | ARRAY_PITCH = 1024 }
-!+     00000003                        RB_BLIT_INFO: { UNK0 | GMEM | CLEAR_MASK = 0 }
+!+     00000003                        RB_BLIT_INFO: { UNK0 | GMEM | CLEAR_MASK = 0 | LAST = 0 | BUFFER_ID = 0 }
 !+     7c400000                        RB_CCU_CNTL: { COLOR_OFFSET = 0xf8000 | DEPTH_OFFSET = 0 | GMEM }
 !+     00000000                        VPC_SO_DISABLE: { 0 }
  +     00000000                        SP_TP_WINDOW_OFFSET: { X = 0 | Y = 0 }
@@ -1000,7 +1000,7 @@ t4                                        write SP_FS_PREFETCH_CNTL (a99e)
 0000000001054344:                                      0000: 40a99e01 00007fc0
 t4                                     write HLSQ_CONTROL_1_REG (b982)
                                                HLSQ_CONTROL_1_REG: 0x7
-                                               HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | SIZE = r63.x }
+                                               HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | CENTERRHW = r63.x }
                                                HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
                                                HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | XYCOORDREGID = r63.x | ZWCOORDREGID = r63.x }
                                                HLSQ_CONTROL_5_REG: { LINELENGTHREGID = r63.x | FOVEATIONQUALITYREGID = r0.x }
@@ -1528,7 +1528,7 @@ t7                        opcode: CP_DRAW_INDIRECT_MULTI (2a) (12 dwords)
  +     00000000                        HLSQ_GS_CNTL: { CONSTLEN = 0 }
 !+     00000003                        HLSQ_FS_CNTL_0: { THREADSIZE = THREAD128 | VARYINGS }
 !+     00000007                        HLSQ_CONTROL_1_REG: 0x7
-!+     fcfcfcfc                        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | SIZE = r63.x }
+!+     fcfcfcfc                        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | CENTERRHW = r63.x }
 !+     fcfcfc00                        HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 !+     fcfcfcfc                        HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | XYCOORDREGID = r63.x | ZWCOORDREGID = r63.x }
  +     000000fc                        HLSQ_CONTROL_5_REG: { LINELENGTHREGID = r63.x | FOVEATIONQUALITYREGID = r0.x }
@@ -1559,7 +1559,7 @@ t4                        write RB_MSAA_CNTL (88d5)
                                RB_MSAA_CNTL: { SAMPLES = MSAA_ONE }
 000000000115c02c:                      0000: 4088d501 00000000
 t4                     write RB_BLIT_INFO (88e3)
-                               RB_BLIT_INFO: { CLEAR_MASK = 0 }
+                               RB_BLIT_INFO: { CLEAR_MASK = 0 | LAST = 0 | BUFFER_ID = 0 }
 000000000115c034:                      0000: 4088e301 00000000
 t4                     write RB_BLIT_DST_INFO (88d7)
                                RB_BLIT_DST_INFO: { TILE_MODE = TILE6_3 | FLAGS | SAMPLES = MSAA_ONE | COLOR_SWAP = WZYX | COLOR_FORMAT = FMT6_8_8_8_8_UNORM }
@@ -1592,11 +1592,11 @@ t7                      opcode: CP_EVENT_WRITE (46) (2 dwords)
  +     01012000                        RB_BLIT_FLAG_DST: 0x1012000
  +     00000000                        RB_BLIT_FLAG_DST_HI: 0
  +     00004001                        RB_BLIT_FLAG_DST_PITCH: { PITCH = 64 | ARRAY_PITCH = 1024 }
-!+     00000000                        RB_BLIT_INFO: { CLEAR_MASK = 0 }
+!+     00000000                        RB_BLIT_INFO: { CLEAR_MASK = 0 | LAST = 0 | BUFFER_ID = 0 }
 000000000115c068:                      0000: 70460001 0000001e
 00000000010583c8:              0000: 70bf8003 0115c000 00000000 0000001c
 t4             write GRAS_LRZ_CNTL (8100)
-                       GRAS_LRZ_CNTL: { 0 }
+                       GRAS_LRZ_CNTL: { DIR = 0 }
 00000000010583d8:              0000: 48810001 00000000
 t7             opcode: CP_EVENT_WRITE (46) (2 dwords)
                        { EVENT = LRZ_FLUSH }
diff --git a/src/freedreno/.gitlab-ci/reference/fd-clouds.log b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
index a5d53c3..7d4b986 100644 (file)
--- a/src/freedreno/.gitlab-ci/reference/fd-clouds.log
+++ b/src/freedreno/.gitlab-ci/reference/fd-clouds.log
@@ -227,7 +227,7 @@ t4          write VPC_SO_STREAM_CNTL (9305)
                        VPC_SO_STREAM_CNTL: { BUF0_STREAM = 0 | BUF1_STREAM = 0 | BUF2_STREAM = 0 | BUF3_STREAM = 0 | STREAM_ENABLE = 0 }
 0000000001d91248:              0000: 48930501 00000000
 t4             write GRAS_LRZ_CNTL (8100)
-                       GRAS_LRZ_CNTL: { 0 }
+                       GRAS_LRZ_CNTL: { DIR = 0 }
 0000000001d91250:              0000: 48810001 00000000
 t4             write RB_LRZ_CNTL (8898)
                        RB_LRZ_CNTL: { 0 }
@@ -245,7 +245,7 @@ t7          opcode: CP_SKIP_IB2_ENABLE_GLOBAL (1d) (2 dwords)
 t7             opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
 0000000001d91278:              0000: 70268000
 t4             write RB_CCU_CNTL (8e07)
-                       RB_CCU_CNTL: { COLOR_OFFSET = 0xf8000 | DEPTH_OFFSET = 0 | GMEM | UNK2 }
+                       RB_CCU_CNTL: { COLOR_OFFSET = 0xf8000 | DEPTH_OFFSET = 0 | GMEM | CONCURRENT_RESOLVE }
 0000000001d9127c:              0000: 408e0701 7c400004
 t4             write RB_DEPTH_BUFFER_INFO (8872)
                        RB_DEPTH_BUFFER_INFO: { DEPTH_FORMAT = DEPTH6_NONE }
@@ -683,7 +683,7 @@ t4                                  write PC_HS_OUT_CNTL (9b03)
 0000000001121098:                                      0000: 409b0301 00000000
 t4                                     write HLSQ_CONTROL_1_REG (b982)
                                                HLSQ_CONTROL_1_REG: 0x7
-                                               HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | SIZE = r63.x }
+                                               HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | CENTERRHW = r63.x }
                                                HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
                                                HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | XYCOORDREGID = r63.x | ZWCOORDREGID = r63.x }
                                                HLSQ_CONTROL_5_REG: { LINELENGTHREGID = r63.x | FOVEATIONQUALITYREGID = r0.x }
@@ -954,7 +954,7 @@ t7                  opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
 !+     059f086f                        GRAS_SC_VIEWPORT_SCISSOR[0].BR: { X = 2159 | Y = 1439 }
  +     00000000                        GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
 !+     059f086f                        GRAS_SC_WINDOW_SCISSOR_BR: { X = 2159 | Y = 1439 }
- +     00000000                        GRAS_LRZ_CNTL: { 0 }
+ +     00000000                        GRAS_LRZ_CNTL: { DIR = 0 }
  +     00000000                        GRAS_LRZ_PS_INPUT_CNTL: { FRAGCOORDSAMPLEMODE = FRAGCOORD_CENTER }
  +     00000000                        GRAS_LRZ_BUFFER_BASE: 0
  +     00000000                        GRAS_LRZ_BUFFER_BASE_HI: 0
@@ -1023,7 +1023,7 @@ t7                        opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
  +     00000000                        RB_MRT_FLAG_BUFFER[0].PITCH: { PITCH = 0 | ARRAY_PITCH = 0 }
 !+     00000001                        RB_UNKNOWN_8E01: 0x1
  +     00000000                        RB_UNKNOWN_8E04: 0
-!+     7c400004                        RB_CCU_CNTL: { COLOR_OFFSET = 0xf8000 | DEPTH_OFFSET = 0 | GMEM | UNK2 }
+!+     7c400004                        RB_CCU_CNTL: { COLOR_OFFSET = 0xf8000 | DEPTH_OFFSET = 0 | GMEM | CONCURRENT_RESOLVE }
 !+     00ffff00                        VPC_VS_CLIP_CNTL: { CLIP_MASK = 0 | CLIP_DIST_03_LOC = 255 | CLIP_DIST_47_LOC = 255 }
 !+     0000ffff                        VPC_VS_LAYER_CNTL: { LAYERLOC = 255 | VIEWLOC = 255 }
  +     00000000                        VPC_UNKNOWN_9107: { 0 }
@@ -1140,7 +1140,7 @@ t7                        opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
  +     00000000                        HLSQ_GS_CNTL: { CONSTLEN = 0 }
 !+     00000001                        HLSQ_FS_CNTL_0: { THREADSIZE = THREAD128 }
 !+     00000007                        HLSQ_CONTROL_1_REG: 0x7
-!+     fcfcfcfc                        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | SIZE = r63.x }
+!+     fcfcfcfc                        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | CENTERRHW = r63.x }
 !+     fcfcfcfc                        HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 !+     fcfcfcfc                        HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | XYCOORDREGID = r63.x | ZWCOORDREGID = r63.x }
 !+     000000fc                        HLSQ_CONTROL_5_REG: { LINELENGTHREGID = r63.x | FOVEATIONQUALITYREGID = r0.x }
@@ -1516,7 +1516,7 @@ t7                opcode: CP_SET_MODE (63) (2 dwords)
 t7             opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
 0000000001d91938:              0000: 70268000
 t4             write RB_CCU_CNTL (8e07)
-                       RB_CCU_CNTL: { COLOR_OFFSET = 0xf8000 | DEPTH_OFFSET = 0 | GMEM | UNK2 }
+                       RB_CCU_CNTL: { COLOR_OFFSET = 0xf8000 | DEPTH_OFFSET = 0 | GMEM | CONCURRENT_RESOLVE }
 0000000001d9193c:              0000: 408e0701 7c400004
 t4             write VPC_SO_DISABLE (9306)
                        VPC_SO_DISABLE: { DISABLE }
@@ -1641,7 +1641,7 @@ t4                        write RB_BLIT_DST_INFO (88d7)
                                RB_BLIT_DST_INFO: { TILE_MODE = TILE6_LINEAR | SAMPLES = MSAA_ONE | COLOR_SWAP = WZYX | COLOR_FORMAT = FMT6_8_8_8_X8_UNORM }
 00000000011160dc:                      0000: 4888d701 00001880
 t4                     write RB_BLIT_INFO (88e3)
-                               RB_BLIT_INFO: { GMEM | CLEAR_MASK = 0xf }
+                               RB_BLIT_INFO: { GMEM | CLEAR_MASK = 0xf | LAST = 0 | BUFFER_ID = 0 }
 00000000011160e4:                      0000: 4088e301 000000f2
 t4                     write RB_BLIT_BASE_GMEM (88d6)
                                RB_BLIT_BASE_GMEM: 0
@@ -1693,8 +1693,8 @@ t7                        opcode: CP_EVENT_WRITE (46) (2 dwords)
  +     00000000                        RB_BLIT_CLEAR_COLOR_DW1: 0
  +     00000000                        RB_BLIT_CLEAR_COLOR_DW2: 0
  +     00000000                        RB_BLIT_CLEAR_COLOR_DW3: 0
-!+     000000f2                        RB_BLIT_INFO: { GMEM | CLEAR_MASK = 0xf }
- +     7c400004                        RB_CCU_CNTL: { COLOR_OFFSET = 0xf8000 | DEPTH_OFFSET = 0 | GMEM | UNK2 }
+!+     000000f2                        RB_BLIT_INFO: { GMEM | CLEAR_MASK = 0xf | LAST = 0 | BUFFER_ID = 0 }
+ +     7c400004                        RB_CCU_CNTL: { COLOR_OFFSET = 0xf8000 | DEPTH_OFFSET = 0 | GMEM | CONCURRENT_RESOLVE }
 !+     00000001                        VPC_SO_DISABLE: { DISABLE }
  +     00000001                        PC_POWER_CNTL: 0x1
 !+     00000000                        VFD_MODE_CNTL: { RENDER_MODE = RENDERING_PASS }
@@ -1977,7 +1977,7 @@ t4                                        write PC_HS_OUT_CNTL (9b03)
 0000000001120098:                                      0000: 409b0301 00000000
 t4                                     write HLSQ_CONTROL_1_REG (b982)
                                                HLSQ_CONTROL_1_REG: 0x7
-                                               HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | SIZE = r63.x }
+                                               HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | CENTERRHW = r63.x }
                                                HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
                                                HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | XYCOORDREGID = r4.w | ZWCOORDREGID = r5.y }
                                                HLSQ_CONTROL_5_REG: { LINELENGTHREGID = r63.x | FOVEATIONQUALITYREGID = r0.x }
@@ -6752,7 +6752,7 @@ t7                        opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
  +     00000000                        HLSQ_GS_CNTL: { CONSTLEN = 0 }
  +     00000001                        HLSQ_FS_CNTL_0: { THREADSIZE = THREAD128 }
  +     00000007                        HLSQ_CONTROL_1_REG: 0x7
- +     fcfcfcfc                        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | SIZE = r63.x }
+ +     fcfcfcfc                        HLSQ_CONTROL_2_REG: { FACEREGID = r63.x | SAMPLEID = r63.x | SAMPLEMASK = r63.x | CENTERRHW = r63.x }
  +     fcfcfcfc                        HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 !+     1513fcfc                        HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | XYCOORDREGID = r4.w | ZWCOORDREGID = r5.y }
  +     000000fc                        HLSQ_CONTROL_5_REG: { LINELENGTHREGID = r63.x | FOVEATIONQUALITYREGID = r0.x }
@@ -6818,7 +6818,7 @@ t4                        write RB_BLIT_SCISSOR_TL (88d1)
                                RB_BLIT_SCISSOR_BR: { X = 2175 | Y = 1439 }
 0000000001116130:                      0000: 4888d102 00000000 059f087f
 t4                     write RB_BLIT_INFO (88e3)
-                               RB_BLIT_INFO: { CLEAR_MASK = 0 }
+                               RB_BLIT_INFO: { CLEAR_MASK = 0 | LAST = 0 | BUFFER_ID = 0 }
 000000000111613c:                      0000: 4088e301 00000000
 t4                     write RB_BLIT_DST_INFO (88d7)
                                RB_BLIT_DST_INFO: { TILE_MODE = TILE6_LINEAR | SAMPLES = MSAA_ONE | COLOR_SWAP = WXYZ | COLOR_FORMAT = FMT6_8_8_8_X8_UNORM }
@@ -6854,7 +6854,7 @@ t7                        opcode: CP_EVENT_WRITE (46) (2 dwords)
  +     00000000                        RB_BLIT_DST_HI: 0
 !+     00000088                        RB_BLIT_DST_PITCH: 8704
 !+     0002fd00                        RB_BLIT_DST_ARRAY_PITCH: 12533760
-!+     00000000                        RB_BLIT_INFO: { CLEAR_MASK = 0 }
+!+     00000000                        RB_BLIT_INFO: { CLEAR_MASK = 0 | LAST = 0 | BUFFER_ID = 0 }
 0000000001116170:                      0000: 70460001 0000001e
 t7                     opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
 0000000001116178:                      0000: 70268000
Domain: Graphics System / GL;