osd: osd afbc decode err when dv enable and FF/FR [1/1]
authorPengcheng Chen <pengcheng.chen@amlogic.com>
Tue, 11 Jun 2019 09:28:52 +0000 (17:28 +0800)
committerNick Xie <nick@khadas.com>
Mon, 5 Aug 2019 06:59:54 +0000 (14:59 +0800)
PD#SWPL-9344

Problem:
osd hold line is too small when dv enable

Solution:
enlarge osd hold line from 4 to 8

Verify:
verified by franklin

Change-Id: I81d1fe210fe6e9f9a065d7ff75178ef1807f3e43
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
drivers/amlogic/media/osd/osd_fb.c
drivers/amlogic/media/osd/osd_hw.c
drivers/amlogic/media/osd/osd_hw.h

index 81c3648..0d7db5f 100644 (file)
@@ -2003,10 +2003,6 @@ int osd_notify_callback(struct notifier_block *block, unsigned long cmd,
        switch (cmd) {
        case  VOUT_EVENT_MODE_CHANGE:
                set_osd_logo_freescaler();
-               if (!strcmp(vinfo->name, "dummy_panel"))
-                       osd_set_hold_line(MAX_HOLD_LINE);
-               else
-                       osd_set_hold_line(DEFAULT_HOLD_LINE);
                if (osd_hw.osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_G12B &&
                        is_meson_rev_b())
                        set_reset_rdma_trigger_line();
@@ -3358,6 +3354,36 @@ static ssize_t store_osd_line_n_rdma(
        return count;
 }
 
+static ssize_t show_osd_hold_line(
+       struct device *device, struct device_attribute *attr,
+       char *buf)
+{
+       struct fb_info *fb_info = dev_get_drvdata(device);
+       int hold_line;
+
+       hold_line = osd_get_hold_line(fb_info->node);
+
+       return snprintf(buf, PAGE_SIZE, "0x%x\n", hold_line);
+}
+
+static ssize_t store_osd_hold_line(
+       struct device *device, struct device_attribute *attr,
+       const char *buf, size_t count)
+{
+       struct fb_info *fb_info = dev_get_drvdata(device);
+       int hold_line;
+       int ret = 0;
+
+       ret = kstrtoint(buf, 0, &hold_line);
+       if (ret < 0)
+               return -EINVAL;
+
+       osd_set_hold_line(fb_info->node, hold_line);
+
+       return count;
+}
+
+
 static inline  int str2lower(char *str)
 {
        while (*str != '\0') {
@@ -3570,6 +3596,9 @@ static struct device_attribute osd_attrs[] = {
                        show_osd_status, NULL),
        __ATTR(osd_line_n_rdma, 0644,
                        show_osd_line_n_rdma, store_osd_line_n_rdma),
+       __ATTR(osd_hold_line, 0644,
+                       show_osd_hold_line, store_osd_hold_line),
+
 };
 
 static struct device_attribute osd_attrs_viu2[] = {
index d106dea..e5cd109 100644 (file)
@@ -3686,21 +3686,30 @@ void osd_set_dimm_info(u32 index, u32 osd_dimm_layer, u32 osd_dimm_color)
        osd_hw.dim_color[index] = osd_dimm_color;
 }
 
-void osd_set_hold_line(int hold_line)
+u32 osd_get_hold_line(u32 index)
 {
-       int i;
        unsigned int data32 = 0, val = 0;
 
-       for (i = 0; i <= osd_hw.osd_meson_dev.viu1_osd_count; i++) {
-               if (osd_hw.powered[i]) {
-                       data32 = VSYNCOSD_RD_MPEG_REG
-                               (hw_osd_reg_array[i].osd_fifo_ctrl_stat);
-                       val = (data32 >> 5) & 0x1f;
-                       if (val != hold_line) {
-                               VSYNCOSD_WR_MPEG_REG_BITS
-                                       (hw_osd_reg_array[i].osd_fifo_ctrl_stat,
-                                       hold_line & 0x1f, 5, 5);
-                       }
+       if (osd_hw.powered[index]) {
+               data32 = VSYNCOSD_RD_MPEG_REG
+                       (hw_osd_reg_array[index].osd_fifo_ctrl_stat);
+               val = (data32 >> 5) & 0x1f;
+       }
+       return val;
+}
+
+void osd_set_hold_line(u32 index, int hold_line)
+{
+       unsigned int data32 = 0, val = 0;
+
+       if (osd_hw.powered[index]) {
+               data32 = VSYNCOSD_RD_MPEG_REG
+                       (hw_osd_reg_array[index].osd_fifo_ctrl_stat);
+               val = (data32 >> 5) & 0x1f;
+               if (val != hold_line) {
+                       VSYNCOSD_WR_MPEG_REG_BITS
+                               (hw_osd_reg_array[index].osd_fifo_ctrl_stat,
+                               hold_line & 0x1f, 5, 5);
                }
        }
 }
@@ -9126,7 +9135,11 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
                 * set DDR request priority to be urgent
                 */
                data32 = 1;
-               data32 |= 4 << 5;  /* hold_fifo_lines */
+               /* hold_fifo_lines */
+               if (osd_hw.osd_meson_dev.osd_ver >= OSD_HIGH_ONE)
+                       data32 |= VIU1_DEFAULT_HOLD_LINE << 5;
+               else
+                       data32 |= MIN_HOLD_LINE << 5;
                /* burst_len_sel: 3=64, g12a = 5 */
                if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE) {
                        data32 |= 1 << 10;
@@ -9240,6 +9253,9 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
                                osd_reg_set_bits(
                                hw_osd_reg_array[idx].osd_fifo_ctrl_stat,
                                1, 10, 2);
+                               osd_reg_set_bits(
+                               hw_osd_reg_array[idx].osd_fifo_ctrl_stat,
+                               VIU1_DEFAULT_HOLD_LINE, 5, 5);
                                if (osd_hw.osd_meson_dev.cpu_id ==
                                        __MESON_CPU_MAJOR_ID_G12B)
                                        osd_reg_set_bits
@@ -9428,10 +9444,8 @@ void osd_init_viu2(void)
         */
        data32 = 1;
        vinfo = get_current_vinfo2();
-       if (vinfo && (!strcmp(vinfo->name, "dummy_panel"))) {
-               data32 |= MAX_HOLD_LINE << 5;  /* hold_fifo_lines */
-       } else
-               data32 |= DEFAULT_HOLD_LINE << 5;  /* hold_fifo_lines */
+
+       data32 |= VIU2_DEFAULT_HOLD_LINE << 5;  /* hold_fifo_lines */
        /* burst_len_sel: 3=64, g12a = 5 */
        if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE) {
                data32 |= 1 << 10;
index 2e1217e..acf8cef 100644 (file)
@@ -24,7 +24,9 @@
 #include "osd_drm.h"
 
 #define MAX_HOLD_LINE     0x1f
-#define DEFAULT_HOLD_LINE 0x04
+#define MIN_HOLD_LINE     0x04
+#define VIU1_DEFAULT_HOLD_LINE  0x08
+#define VIU2_DEFAULT_HOLD_LINE  0x04
 //#define REG_OFFSET (0x20)
 #define OSD_RELATIVE_BITS 0x33330
 #include "osd_rdma.h"
@@ -221,5 +223,6 @@ void osd_set_dimm_info(u32 index, u32 osd_dimm_layer, u32 osd_dimm_color);
 u32 osd_get_line_n_rdma(void);
 void  osd_set_line_n_rdma(u32 line_n_rdma);
 u32 get_output_device_id(u32 index);
-void osd_set_hold_line(int hold_line);
+void osd_set_hold_line(u32 index, int hold_line);
+u32 osd_get_hold_line(u32 index);
 #endif