Simplify post epilogue_completed splitters.

Now that we have post epilogue_completed split point for all
optimization levels, we can simplify post epilogue_completed splitters
considerably. If corresponding define_peephole2 pattern fails to
allocate a temporary register (or if peephole2 pass isn't run at all),
we can now always split invalid RTX after epilogue_completed is set.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

	* config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
	(*pushdi2_rex64 peephole2): Unconditionally split after
	epilogue_completed.
	(*ashl<mode>3_doubleword): Ditto.
	(*<shift_insn><mode>3_doubleword): Ditto.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b986f28..8fb1da0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2020-02-05  Uroš Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
+       (*pushdi2_rex64 peephole2): Unconditionally split after
+       epilogue_completed.
+       (*ashl<mode>3_doubleword): Ditto.
+       (*<shift_insn><mode>3_doubleword): Ditto.
+
 2020-02-05  Michael Meissner  <meissner@linux.ibm.com>
 
        PR target/93568

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 46b442d..496a866 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1688,38 +1688,21 @@
 ;; First try to get scratch register and go through it.  In case this
 ;; fails, push sign extended lower part first and then overwrite
 ;; upper part by 32bit move.
+
 (define_peephole2
   [(match_scratch:DI 2 "r")
    (set (match_operand:DI 0 "push_operand")
         (match_operand:DI 1 "immediate_operand"))]
-  "TARGET_64BIT && !symbolic_operand (operands[1], DImode)
+  "TARGET_64BIT
+   && !symbolic_operand (operands[1], DImode)
    && !x86_64_immediate_operand (operands[1], DImode)"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))])
 
-;; We need to define this as both peepholer and splitter for case
-;; peephole2 pass is not run.
-;; "&& 1" is needed to keep it from matching the previous pattern.
-(define_peephole2
-  [(set (match_operand:DI 0 "push_operand")
-        (match_operand:DI 1 "immediate_operand"))]
-  "TARGET_64BIT && !symbolic_operand (operands[1], DImode)
-   && !x86_64_immediate_operand (operands[1], DImode) && 1"
-  [(set (match_dup 0) (match_dup 1))
-   (set (match_dup 2) (match_dup 3))]
-{
-  split_double_mode (DImode, &operands[1], 1, &operands[2], &operands[3]);
-
-  operands[1] = gen_lowpart (DImode, operands[2]);
-  operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx,
-                                                  GEN_INT (4)));
-})
-
 (define_split
   [(set (match_operand:DI 0 "push_operand")
         (match_operand:DI 1 "immediate_operand"))]
-  "TARGET_64BIT && ((optimize > 0 && flag_peephole2)
-                   ? epilogue_completed : reload_completed)
+  "TARGET_64BIT && epilogue_completed
    && !symbolic_operand (operands[1], DImode)
    && !x86_64_immediate_operand (operands[1], DImode)"
   [(set (match_dup 0) (match_dup 1))
@@ -10586,7 +10569,7 @@
        (ashift:DWI (match_operand:DWI 1 "nonmemory_operand")
                    (match_operand:QI 2 "nonmemory_operand")))
    (clobber (reg:CC FLAGS_REG))]
-  "(optimize && flag_peephole2) ? epilogue_completed : reload_completed"
+  "epilogue_completed"
   [(const_int 0)]
   "ix86_split_ashl (operands, NULL_RTX, <MODE>mode); DONE;")
 
@@ -11338,7 +11321,7 @@
    (clobber (reg:CC FLAGS_REG))]
   ""
   "#"
-  "(optimize && flag_peephole2) ? epilogue_completed : reload_completed"
+  "epilogue_completed"
   [(const_int 0)]
   "ix86_split_<shift_insn> (operands, NULL_RTX, <MODE>mode); DONE;"
   [(set_attr "type" "multi")])