This patch includes the following updates to the load/store refactoring effort introduced in D93370:
- Update various VSX patterns that use to "force" an XForm, to instead just XForm.
This allows the ability for the patterns to compute the most optimal addressing
mode (and to produce a DForm instruction when possible)
- Update pattern and test case for the LXVD2X/STXVD2X intrinsics
- Update LIT test cases that use to use the XForm instruction to use the DForm instruction
Differential Revision: https://reviews.llvm.org/D95115
let CodeSize = 3 in
def XFLOADf64 : PseudoXFormMemOp<(outs vsfrc:$XT), (ins memrr:$src),
"#XFLOADf64",
- [(set f64:$XT, (load ForceXForm:$src))]>;
+ [(set f64:$XT, (load XForm:$src))]>;
let Predicates = [HasVSX, HasOnlySwappingMemOps] in
def LXVD2X : XX1Form_memOp<31, 844,
(outs vsrc:$XT), (ins memrr:$src),
"lxvd2x $XT, $src", IIC_LdStLFD,
- [(set v2f64:$XT, (int_ppc_vsx_lxvd2x ForceXForm:$src))]>;
+ []>;
def LXVDSX : XX1Form_memOp<31, 332,
(outs vsrc:$XT), (ins memrr:$src),
let CodeSize = 3 in
def XFSTOREf64 : PseudoXFormMemOp<(outs), (ins vsfrc:$XT, memrr:$dst),
"#XFSTOREf64",
- [(store f64:$XT, ForceXForm:$dst)]>;
+ [(store f64:$XT, XForm:$dst)]>;
let Predicates = [HasVSX, HasOnlySwappingMemOps] in {
// The behaviour of this instruction is endianness-specific so we provide no
let CodeSize = 3 in
def XFLOADf32 : PseudoXFormMemOp<(outs vssrc:$XT), (ins memrr:$src),
"#XFLOADf32",
- [(set f32:$XT, (load ForceXForm:$src))]>;
+ [(set f32:$XT, (load XForm:$src))]>;
// Pseudo instruction LIWAX will be expanded to LXSIWAX or LFIWAX later
def LIWAX : PseudoXFormMemOp<(outs vsfrc:$XT), (ins memrr:$src),
"#LIWAX",
let CodeSize = 3 in
def XFSTOREf32 : PseudoXFormMemOp<(outs), (ins vssrc:$XT, memrr:$dst),
"#XFSTOREf32",
- [(store f32:$XT, ForceXForm:$dst)]>;
+ [(store f32:$XT, XForm:$dst)]>;
// Pseudo instruction STIWX will be expanded to STXSIWX or STFIWX later
def STIWX : PseudoXFormMemOp<(outs), (ins vsfrc:$XT, memrr:$dst),
"#STIWX",
// [HasVSX, IsLittleEndian]
// [HasVSX, NoP9Vector]
// [HasVSX, NoP9Vector, IsLittleEndian]
+// [HasVSX, NoP9Vector, IsBigEndian]
// [HasVSX, HasOnlySwappingMemOps]
// [HasVSX, HasOnlySwappingMemOps, IsBigEndian]
// [HasVSX, HasP8Vector]
(SUBREG_TO_REG (i64 1), (XFLOADf64 ForceXForm:$src), sub_64)>;
} // HasVSX, NoP9Vector, IsLittleEndian
+let Predicates = [HasVSX, NoP9Vector, IsBigEndian] in {
+ def : Pat<(v2f64 (int_ppc_vsx_lxvd2x ForceXForm:$src)),
+ (LXVD2X ForceXForm:$src)>;
+ def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, ForceXForm:$dst),
+ (STXVD2X $rS, ForceXForm:$dst)>;
+} // HasVSX, NoP9Vector, IsBigEndian
+
// Any VSX subtarget that only has loads and stores that load in big endian
// order regardless of endianness. This is really pre-Power9 subtargets.
let Predicates = [HasVSX, HasOnlySwappingMemOps] in {
def : Pat<(v2f64 (PPClxvd2x ForceXForm:$src)), (LXVD2X ForceXForm:$src)>;
// Stores.
- def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, ForceXForm:$dst),
- (STXVD2X $rS, ForceXForm:$dst)>;
def : Pat<(PPCstxvd2x v2f64:$rS, ForceXForm:$dst), (STXVD2X $rS, ForceXForm:$dst)>;
} // HasVSX, HasOnlySwappingMemOps
let Predicates = [HasVSX, HasP8Vector] in {
def : Pat<(int_ppc_vsx_xxleqv v4i32:$A, v4i32:$B),
(XXLEQV $A, $B)>;
-def : Pat<(f64 (extloadf32 ForceXForm:$src)),
- (COPY_TO_REGCLASS (XFLOADf32 ForceXForm:$src), VSFRC)>;
+def : Pat<(f64 (extloadf32 XForm:$src)),
+ (COPY_TO_REGCLASS (XFLOADf32 XForm:$src), VSFRC)>;
def : Pat<(f32 (fpround (f64 (extloadf32 ForceXForm:$src)))),
(f32 (XFLOADf32 ForceXForm:$src))>;
def : Pat<(f64 (any_fpextend f32:$src)),
(v1i128 (COPY_TO_REGCLASS (XXBRQ (COPY_TO_REGCLASS $A, VSRC)), VRRC))>;
// D-Form Load/Store
-def : Pat<(v4i32 (quadwOffsetLoad DQForm:$src)), (LXV memrix16:$src)>;
-def : Pat<(v4f32 (quadwOffsetLoad DQForm:$src)), (LXV memrix16:$src)>;
-def : Pat<(v2i64 (quadwOffsetLoad DQForm:$src)), (LXV memrix16:$src)>;
-def : Pat<(v2f64 (quadwOffsetLoad DQForm:$src)), (LXV memrix16:$src)>;
-def : Pat<(f128 (quadwOffsetLoad DQForm:$src)),
+foreach Ty = [v4i32, v4f32, v2i64, v2f64] in {
+ def : Pat<(Ty (load DQForm:$src)), (LXV memrix16:$src)>;
+ def : Pat<(Ty (load XForm:$src)), (LXVX XForm:$src)>;
+ def : Pat<(store Ty:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
+ def : Pat<(store Ty:$rS, XForm:$dst), (STXVX $rS, XForm:$dst)>;
+}
+
+def : Pat<(f128 (load DQForm:$src)),
(COPY_TO_REGCLASS (LXV memrix16:$src), VRRC)>;
+def : Pat<(f128 (load XForm:$src)),
+ (COPY_TO_REGCLASS (LXVX XForm:$src), VRRC)>;
def : Pat<(v4i32 (int_ppc_vsx_lxvw4x DQForm:$src)), (LXV memrix16:$src)>;
def : Pat<(v2f64 (int_ppc_vsx_lxvd2x DQForm:$src)), (LXV memrix16:$src)>;
+def : Pat<(v4i32 (int_ppc_vsx_lxvw4x XForm:$src)), (LXVX XForm:$src)>;
+def : Pat<(v2f64 (int_ppc_vsx_lxvd2x XForm:$src)), (LXVX XForm:$src)>;
-def : Pat<(quadwOffsetStore v4f32:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
-def : Pat<(quadwOffsetStore v4i32:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
-def : Pat<(quadwOffsetStore v2f64:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
-def : Pat<(quadwOffsetStore f128:$rS, DQForm:$dst),
+def : Pat<(store f128:$rS, DQForm:$dst),
(STXV (COPY_TO_REGCLASS $rS, VSRC), memrix16:$dst)>;
-def : Pat<(quadwOffsetStore v2i64:$rS, DQForm:$dst), (STXV $rS, memrix16:$dst)>;
+def : Pat<(store f128:$rS, XForm:$dst),
+ (STXVX (COPY_TO_REGCLASS $rS, VSRC), XForm:$dst)>;
def : Pat<(int_ppc_vsx_stxvw4x v4i32:$rS, DQForm:$dst),
(STXV $rS, memrix16:$dst)>;
def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, DQForm:$dst),
(STXV $rS, memrix16:$dst)>;
-
-def : Pat<(v2f64 (nonQuadwOffsetLoad ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v2i64 (nonQuadwOffsetLoad ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v4f32 (nonQuadwOffsetLoad ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v4i32 (nonQuadwOffsetLoad ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v4i32 (int_ppc_vsx_lxvw4x ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(v2f64 (int_ppc_vsx_lxvd2x ForceXForm:$src)), (LXVX ForceXForm:$src)>;
-def : Pat<(f128 (nonQuadwOffsetLoad ForceXForm:$src)),
- (COPY_TO_REGCLASS (LXVX ForceXForm:$src), VRRC)>;
-def : Pat<(nonQuadwOffsetStore f128:$rS, ForceXForm:$dst),
- (STXVX (COPY_TO_REGCLASS $rS, VSRC), ForceXForm:$dst)>;
-def : Pat<(nonQuadwOffsetStore v2f64:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(nonQuadwOffsetStore v2i64:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(nonQuadwOffsetStore v4f32:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(nonQuadwOffsetStore v4i32:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(int_ppc_vsx_stxvw4x v4i32:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
-def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, ForceXForm:$dst),
- (STXVX $rS, ForceXForm:$dst)>;
+def : Pat<(int_ppc_vsx_stxvw4x v4i32:$rS, XForm:$dst),
+ (STXVX $rS, XForm:$dst)>;
+def : Pat<(int_ppc_vsx_stxvd2x v2f64:$rS, XForm:$dst),
+ (STXVX $rS, XForm:$dst)>;
// Build vectors from i8 loads
defm : ScalToVecWPermute<v8i16, ScalarLoads.ZELi8,
store <4 x i32> %2, <4 x i32>* %0, align 16
ret void
; CHECK-LABEL: test2
-; CHECK: addi 3, 3, 8
-; CHECK: addi [[REG:[0-9]+]], 4, 4
-; CHECK: lxvx [[LD:[0-9]+]], 0, 3
-; CHECK: stxvx [[LD]], 0, [[REG]]
+; CHECK: li [[REG:[0-9]+]], 8
+; CHECK: lxvx [[LD:[0-9]+]], 3, [[REG]]
+; CHECK: li [[REG2:[0-9]+]], 4
+; CHECK: stxvx [[LD]], 4, [[REG2]]
}
; CHECK-P9: addis r4, r2, .LC0@toc@ha
; CHECK-P9: lxvwsx vs0, 0, r3
; CHECK-P9: ld r4, .LC0@toc@l(r4)
-; CHECK-P9: stxvx vs0, 0, r4
+; CHECK-P9: stxv vs0, 0(r4)
; CHECK-P9: lis r4, 1024
; CHECK-P9: lfiwax f0, 0, r3
; CHECK-P9: addis r3, r2, .LC1@toc@ha
; EXTABI: body: |
; EXTABI: bb.0.entry:
; EXTABI: liveins: $f1, $x4
-; EXTABI-DAG: renamable $f0 = XFLOADf64 $zero8, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
+; EXTABI-DAG: renamable $f0 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $f0, renamable $f1, implicit $rm
; EXTABI-DAG: renamable $vf31 = nofpexcept XSMULDP killed renamable $f1, renamable $f1, implicit $rm
-; EXTABI: XFSTOREf64 killed renamable $f0, $zero8, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
+; EXTABI: STFD killed renamable $f0, 0, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
; EXTABI-LABEL: INLINEASM
-; EXTABI-DAG: renamable $f0 = XFLOADf64 $zero8, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
+; EXTABI-DAG: renamable $f0 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $vf31, killed renamable $f0, implicit $rm
-; EXTABI-DAG: XFSTOREf64 killed renamable $f0, $zero8, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
-; EXTABI: renamable $f1 = XFLOADf64 $zero8, killed renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
+; EXTABI-DAG: STFD killed renamable $f0, 0, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
+; EXTABI: renamable $f1 = LFD 0, killed renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
; DFLABI-LABEL: vec_test
; CHECK-64-LABEL: shuffle_vector_halfword_0_4:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C0(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_halfword_0_4:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C0(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_halfword_3_4:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C1(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_halfword_3_4:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C1(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_halfword_6_4:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C2(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_halfword_6_4:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C2(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_halfword_7_4:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C3(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_halfword_7_4:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C3(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_byte_1_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C4(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_1_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C4(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_byte_2_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C5(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_2_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C5(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_byte_5_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C6(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_5_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C6(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_byte_6_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C7(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_6_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C7(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_byte_7_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C8(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_7_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C8(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_byte_11_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C9(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_11_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C9(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_byte_12_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C10(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_12_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C10(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; CHECK-64-LABEL: shuffle_vector_byte_15_8:
; CHECK-64: # %bb.0: # %entry
; CHECK-64-NEXT: ld 3, L..C11(2)
-; CHECK-64-NEXT: lxvx 35, 0, 3
+; CHECK-64-NEXT: lxv 35, 0(3)
; CHECK-64-NEXT: vperm 2, 2, 2, 3
; CHECK-64-NEXT: blr
;
; CHECK-32-LABEL: shuffle_vector_byte_15_8:
; CHECK-32: # %bb.0: # %entry
; CHECK-32-NEXT: lwz 3, L..C11(2)
-; CHECK-32-NEXT: lxvx 35, 0, 3
+; CHECK-32-NEXT: lxv 35, 0(3)
; CHECK-32-NEXT: vperm 2, 2, 2, 3
; CHECK-32-NEXT: blr
entry:
; MIR32: isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
; MIR32: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-; MIR32: renamable $[[GPR1:r[0-9]+]] = ADDI %fixed-stack.2, 0
-; MIR32: renamable $[[GPR2:r[0-9]+]] = ADDI %fixed-stack.0, 0
-; MIR32: renamable $f{{[0-9]+}} = XFLOADf64 $zero, killed renamable $[[GPR1]]
-; MIR32: renamable $f{{[0-9]+}} = XFLOADf64 $zero, killed renamable $[[GPR2]]
+; MIR32: renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.2
+; MIR32: renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.0
; 64BIT-LABEL: .test:
; 64BIT-DAG: lfd {{[0-9]+}}, 80(1)
; MIR64: isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
; MIR64: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
-; MIR64: renamable $[[GPR1:x[0-9]+]] = ADDI8 %fixed-stack.2, 0
-; MIR64: renamable $[[GPR2:x[0-9]+]] = ADDI8 %fixed-stack.0, 0
-; MIR64: renamable $f{{[0-9]+}} = XFLOADf64 $zero8, killed renamable $[[GPR1]]
-; MIR64: renamable $f{{[0-9]+}} = XFLOADf64 $zero8, killed renamable $[[GPR2]]
+; MIR64: renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.2
+; MIR64: renamable $f{{[0-9]+}} = LFD 0, %fixed-stack.0
; RUN: FileCheck --check-prefix=64BIT %s
define void @caller() {
+
+
; 32BIT-LABEL: name: caller
; 32BIT: bb.0.entry:
; 32BIT: ADJCALLSTACKDOWN 88, 0, implicit-def dead $r1, implicit $r1
; 32BIT: STW killed [[ORI1]], 80, $r1 :: (store (s32), align 8)
; 32BIT: [[LWZtoc1:%[0-9]+]]:gprc = LWZtoc %const.1, $r2 :: (load (s32) from got)
; 32BIT: [[LXVW4X1:%[0-9]+]]:vsrc = LXVW4X $zero, killed [[LWZtoc1]] :: (load (s128) from constant-pool)
- ; 32BIT: [[LWZtoc2:%[0-9]+]]:gprc = LWZtoc %const.2, $r2 :: (load (s32) from got)
- ; 32BIT: [[XFLOADf64_:%[0-9]+]]:vsfrc = XFLOADf64 $zero, killed [[LWZtoc2]] :: (load (s64) from constant-pool)
+ ; 32BIT: [[LWZtoc2:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.2, $r2 :: (load (s32) from got)
+ ; 32BIT: [[LFD:%[0-9]+]]:f8rc = LFD 0, killed [[LWZtoc2]] :: (load (s64) from constant-pool)
; 32BIT: [[LIS2:%[0-9]+]]:gprc = LIS 16393
; 32BIT: [[ORI2:%[0-9]+]]:gprc = ORI killed [[LIS2]], 8697
; 32BIT: [[LIS3:%[0-9]+]]:gprc = LIS 61467
; 32BIT: [[ORI3:%[0-9]+]]:gprc = ORI killed [[LIS3]], 34414
- ; 32BIT: [[LWZtoc3:%[0-9]+]]:gprc = LWZtoc %const.3, $r2 :: (load (s32) from got)
- ; 32BIT: [[XFLOADf64_1:%[0-9]+]]:vsfrc = XFLOADf64 $zero, killed [[LWZtoc3]] :: (load (s64) from constant-pool)
+ ; 32BIT: [[LWZtoc3:%[0-9]+]]:gprc_and_gprc_nor0 = LWZtoc %const.3, $r2 :: (load (s32) from got)
+ ; 32BIT: [[LFD1:%[0-9]+]]:f8rc = LFD 0, killed [[LWZtoc3]] :: (load (s64) from constant-pool)
; 32BIT: [[LI1:%[0-9]+]]:gprc = LI 55
; 32BIT: $r3 = COPY [[LI1]]
; 32BIT: $v2 = COPY [[LXVW4X1]]
- ; 32BIT: $f1 = COPY [[XFLOADf64_]]
+ ; 32BIT: $f1 = COPY [[LFD]]
; 32BIT: $r9 = COPY [[ORI2]]
; 32BIT: $r10 = COPY [[ORI3]]
- ; 32BIT: $f2 = COPY [[XFLOADf64_1]]
+ ; 32BIT: $f2 = COPY [[LFD1]]
; 32BIT: BL_NOP <mcsymbol .callee[PR]>, csr_aix32_altivec, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $v2, implicit $f1, implicit $r9, implicit $r10, implicit $f2, implicit $r2, implicit-def $r1, implicit-def $v2
; 32BIT: ADJCALLSTACKUP 88, 0, implicit-def dead $r1, implicit $r1
; 32BIT: [[COPY:%[0-9]+]]:vsrc = COPY $v2
; 32BIT: BLR implicit $lr, implicit $rm
-
; 64BIT-LABEL: name: caller
; 64BIT: bb.0.entry:
; 64BIT: ADJCALLSTACKDOWN 120, 0, implicit-def dead $r1, implicit $r1
; 64BIT: [[LXVW4X1:%[0-9]+]]:vsrc = LXVW4X $zero8, killed [[LDtocCPT1]] :: (load (s128) from constant-pool)
; 64BIT: [[LD:%[0-9]+]]:g8rc = LD 104, $x1 :: (load (s64))
; 64BIT: [[LD1:%[0-9]+]]:g8rc = LD 96, $x1 :: (load (s64))
- ; 64BIT: [[LDtocCPT2:%[0-9]+]]:g8rc = LDtocCPT %const.2, $x2 :: (load (s64) from got)
- ; 64BIT: [[XFLOADf64_:%[0-9]+]]:vsfrc = XFLOADf64 $zero8, killed [[LDtocCPT2]] :: (load (s64) from constant-pool)
- ; 64BIT: [[LDtocCPT3:%[0-9]+]]:g8rc = LDtocCPT %const.3, $x2 :: (load (s64) from got)
- ; 64BIT: [[XFLOADf64_1:%[0-9]+]]:vsfrc = XFLOADf64 $zero8, killed [[LDtocCPT3]] :: (load (s64) from constant-pool)
+ ; 64BIT: [[LDtocCPT2:%[0-9]+]]:g8rc_and_g8rc_nox0 = LDtocCPT %const.2, $x2 :: (load (s64) from got)
+ ; 64BIT: [[LFD:%[0-9]+]]:f8rc = LFD 0, killed [[LDtocCPT2]] :: (load (s64) from constant-pool)
+ ; 64BIT: [[LDtocCPT3:%[0-9]+]]:g8rc_and_g8rc_nox0 = LDtocCPT %const.3, $x2 :: (load (s64) from got)
+ ; 64BIT: [[LFD1:%[0-9]+]]:f8rc = LFD 0, killed [[LDtocCPT3]] :: (load (s64) from constant-pool)
; 64BIT: [[LIS8_1:%[0-9]+]]:g8rc = LIS8 16393
; 64BIT: [[ORI8_2:%[0-9]+]]:g8rc = ORI8 killed [[LIS8_1]], 8697
; 64BIT: [[RLDIC1:%[0-9]+]]:g8rc = RLDIC killed [[ORI8_2]], 32, 1
; 64BIT: [[LI8_1:%[0-9]+]]:g8rc = LI8 55
; 64BIT: $x3 = COPY [[LI8_1]]
; 64BIT: $v2 = COPY [[LXVW4X1]]
- ; 64BIT: $f1 = COPY [[XFLOADf64_]]
+ ; 64BIT: $f1 = COPY [[LFD]]
; 64BIT: $x7 = COPY [[ORI8_3]]
; 64BIT: $x9 = COPY [[LD1]]
; 64BIT: $x10 = COPY [[LD]]
- ; 64BIT: $f2 = COPY [[XFLOADf64_1]]
+ ; 64BIT: $f2 = COPY [[LFD1]]
; 64BIT: BL8_NOP <mcsymbol .callee[PR]>, csr_ppc64_altivec, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $v2, implicit $f1, implicit $x7, implicit $x9, implicit $x10, implicit $f2, implicit $x2, implicit-def $r1, implicit-def $v2
; 64BIT: ADJCALLSTACKUP 120, 0, implicit-def dead $r1, implicit $r1
; 64BIT: [[COPY:%[0-9]+]]:vsrc = COPY $v2
; CHECK: STW killed [[ADDI]], 0, %stack.0.arg_list :: (store (s32) into %ir.0)
; CHECK: [[ADDI1:%[0-9]+]]:gprc = ADDI %fixed-stack.0, 15
; CHECK: [[RLWINM:%[0-9]+]]:gprc_and_gprc_nor0 = RLWINM killed [[ADDI1]], 0, 0, 27
- ; CHECK: [[ADDI2:%[0-9]+]]:gprc = nuw ADDI killed [[RLWINM]], 16
- ; CHECK: [[XFLOADf64_:%[0-9]+]]:vsfrc = XFLOADf64 $zero, killed [[ADDI2]] :: (load (s64) from %ir.4, align 16)
+ ; CHECK: [[LFD:%[0-9]+]]:f8rc = LFD 16, killed [[RLWINM]] :: (load (s64) from %ir.4, align 16)
; CHECK: LIFETIME_END %stack.0.arg_list
- ; CHECK: $f1 = COPY [[XFLOADf64_]]
+ ; CHECK: $f1 = COPY [[LFD]]
; CHECK: BLR implicit $lr, implicit $rm, implicit $f1
entry:
%arg_list = alloca i8*, align 4
; CHECK: STD killed [[ADDI8_]], 0, %stack.0.arg_list :: (store (s64) into %ir.0)
; CHECK: [[ADDI8_1:%[0-9]+]]:g8rc = ADDI8 %fixed-stack.0, 15
; CHECK: [[RLDICR:%[0-9]+]]:g8rc_and_g8rc_nox0 = RLDICR killed [[ADDI8_1]], 0, 59
- ; CHECK: [[LI8_:%[0-9]+]]:g8rc = LI8 16
- ; CHECK: [[XFLOADf64_:%[0-9]+]]:vsfrc = XFLOADf64 killed [[RLDICR]], killed [[LI8_]] :: (load (s64) from %ir.4, align 16)
+ ; CHECK: [[LFD:%[0-9]+]]:f8rc = LFD 16, killed [[RLDICR]] :: (load (s64) from %ir.4, align 16)
; CHECK: LIFETIME_END %stack.0.arg_list
- ; CHECK: $f1 = COPY [[XFLOADf64_]]
+ ; CHECK: $f1 = COPY [[LFD]]
; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $f1
entry:
%arg_list = alloca i8*, align 8
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsi:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI5_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsi:
; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI7_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI7_0@toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: blr
;
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: sldi r4, r4, 2
; P9BE-NEXT: add r3, r3, r4
-; P9BE-NEXT: addi r3, r3, -12
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: li r4, -12
+; P9BE-NEXT: lxvx v2, r3, r4
; P9BE-NEXT: addis r3, r2, .LCPI9_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI9_0@toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: blr
;
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: sldi r4, r4, 2
; P9LE-NEXT: add r3, r3, r4
-; P9LE-NEXT: addi r3, r3, -12
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: li r4, -12
+; P9LE-NEXT: lxvx v2, r3, r4
; P9LE-NEXT: addis r3, r2, .LCPI9_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI9_0@toc@l
-; P9LE-NEXT: lxvx v3, 0, r3
+; P9LE-NEXT: lxv v3, 0(r3)
; P9LE-NEXT: vperm v2, v2, v2, v3
; P9LE-NEXT: blr
;
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI16_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI16_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvftoi:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI16_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI16_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvftoi:
; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI18_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI18_0@toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: xvcvspsxws v2, v2
; P9BE-NEXT: blr
; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: addis r3, r2, .LCPI18_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI18_0@toc@l
-; P9LE-NEXT: lxvx v3, 0, r3
+; P9LE-NEXT: lxv v3, 0(r3)
; P9LE-NEXT: vperm v2, v2, v2, v3
; P9LE-NEXT: xvcvspsxws v2, v2
; P9LE-NEXT: blr
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI25_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI25_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvdtoi:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI25_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI25_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvdtoi:
;
; P8BE-LABEL: fromDiffMemConsDConvdtoi:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfdx f3, 0, r3
-; P8BE-NEXT: lfd f0, 24(r3)
-; P8BE-NEXT: lfd f1, 8(r3)
-; P8BE-NEXT: lfd f2, 16(r3)
+; P8BE-NEXT: lfd f0, 16(r3)
+; P8BE-NEXT: lfd f1, 0(r3)
+; P8BE-NEXT: lfd f2, 24(r3)
+; P8BE-NEXT: lfd f3, 8(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xxmrghd vs1, vs2, vs3
; P8BE-NEXT: xvcvdpsxws v2, vs0
; P8BE-NEXT: xvcvdpsxws v3, vs1
-; P8BE-NEXT: vmrgew v2, v2, v3
+; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDConvdtoi:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfdx f3, 0, r3
; P8LE-NEXT: lfd f0, 24(r3)
; P8LE-NEXT: lfd f1, 8(r3)
; P8LE-NEXT: lfd f2, 16(r3)
+; P8LE-NEXT: lfd f3, 0(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xvcvdpsxws v2, vs0
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI37_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI37_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsui:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI37_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI37_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsui:
; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI39_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI39_0@toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: blr
;
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: sldi r4, r4, 2
; P9BE-NEXT: add r3, r3, r4
-; P9BE-NEXT: addi r3, r3, -12
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: li r4, -12
+; P9BE-NEXT: lxvx v2, r3, r4
; P9BE-NEXT: addis r3, r2, .LCPI41_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI41_0@toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: blr
;
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: sldi r4, r4, 2
; P9LE-NEXT: add r3, r3, r4
-; P9LE-NEXT: addi r3, r3, -12
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: li r4, -12
+; P9LE-NEXT: lxvx v2, r3, r4
; P9LE-NEXT: addis r3, r2, .LCPI41_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI41_0@toc@l
-; P9LE-NEXT: lxvx v3, 0, r3
+; P9LE-NEXT: lxv v3, 0(r3)
; P9LE-NEXT: vperm v2, v2, v2, v3
; P9LE-NEXT: blr
;
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI48_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI48_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvftoui:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI48_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI48_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvftoui:
; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI50_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI50_0@toc@l
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: vperm v2, v2, v2, v3
; P9BE-NEXT: xvcvspuxws v2, v2
; P9BE-NEXT: blr
; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: addis r3, r2, .LCPI50_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI50_0@toc@l
-; P9LE-NEXT: lxvx v3, 0, r3
+; P9LE-NEXT: lxv v3, 0(r3)
; P9LE-NEXT: vperm v2, v2, v2, v3
; P9LE-NEXT: xvcvspuxws v2, v2
; P9LE-NEXT: blr
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI57_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI57_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvdtoui:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI57_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI57_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvdtoui:
;
; P8BE-LABEL: fromDiffMemConsDConvdtoui:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfdx f3, 0, r3
-; P8BE-NEXT: lfd f0, 24(r3)
-; P8BE-NEXT: lfd f1, 8(r3)
-; P8BE-NEXT: lfd f2, 16(r3)
+; P8BE-NEXT: lfd f0, 16(r3)
+; P8BE-NEXT: lfd f1, 0(r3)
+; P8BE-NEXT: lfd f2, 24(r3)
+; P8BE-NEXT: lfd f3, 8(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xxmrghd vs1, vs2, vs3
; P8BE-NEXT: xvcvdpuxws v2, vs0
; P8BE-NEXT: xvcvdpuxws v3, vs1
-; P8BE-NEXT: vmrgew v2, v2, v3
+; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDConvdtoui:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfdx f3, 0, r3
; P8LE-NEXT: lfd f0, 24(r3)
; P8LE-NEXT: lfd f1, 8(r3)
; P8LE-NEXT: lfd f2, 16(r3)
+; P8LE-NEXT: lfd f3, 0(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xvcvdpuxws v2, vs0
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI65_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI65_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst1ll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI65_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI65_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst1ll:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI66_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI66_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst16kll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI66_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI66_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst16kll:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI67_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI67_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst32kll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI67_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI67_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst32kll:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI69_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI69_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI69_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI69_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsll:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI78_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI78_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltCnstConvftoll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI78_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI78_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltCnstConvftoll:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI80_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI80_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvftoll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI80_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI80_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvftoll:
;
; P8BE-LABEL: fromDiffMemConsAConvftoll:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfsx f0, 0, r3
+; P8BE-NEXT: lfs f0, 0(r3)
; P8BE-NEXT: lfs f1, 4(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xvcvdpsxds v2, vs0
;
; P8LE-LABEL: fromDiffMemConsAConvftoll:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfsx f0, 0, r3
+; P8LE-NEXT: lfs f0, 0(r3)
; P8LE-NEXT: lfs f1, 4(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xvcvdpsxds v2, vs0
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI87_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI87_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltCnstConvdtoll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI87_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI87_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltCnstConvdtoll:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI89_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI89_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvdtoll:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI89_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI89_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvdtoll:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI97_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI97_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst1ull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI97_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI97_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst1ull:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI98_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI98_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst16kull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI98_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI98_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst16kull:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI99_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI99_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltConst32kull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI99_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI99_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltConst32kull:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI101_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI101_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI101_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI101_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsull:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI110_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI110_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltCnstConvftoull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI110_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI110_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltCnstConvftoull:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI112_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI112_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvftoull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI112_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI112_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvftoull:
;
; P8BE-LABEL: fromDiffMemConsAConvftoull:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfsx f0, 0, r3
+; P8BE-NEXT: lfs f0, 0(r3)
; P8BE-NEXT: lfs f1, 4(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xvcvdpuxds v2, vs0
;
; P8LE-LABEL: fromDiffMemConsAConvftoull:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfsx f0, 0, r3
+; P8LE-NEXT: lfs f0, 0(r3)
; P8LE-NEXT: lfs f1, 4(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xvcvdpuxds v2, vs0
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI119_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI119_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: spltCnstConvdtoull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI119_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI119_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: spltCnstConvdtoull:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: addis r3, r2, .LCPI121_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI121_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r3
+; P9BE-NEXT: lxv v2, 0(r3)
; P9BE-NEXT: blr
;
; P9LE-LABEL: fromDiffConstsConvdtoull:
; P9LE: # %bb.0: # %entry
; P9LE-NEXT: addis r3, r2, .LCPI121_0@toc@ha
; P9LE-NEXT: addi r3, r3, .LCPI121_0@toc@l
-; P9LE-NEXT: lxvx v2, 0, r3
+; P9LE-NEXT: lxv v2, 0(r3)
; P9LE-NEXT: blr
;
; P8BE-LABEL: fromDiffConstsConvdtoull:
ret fp128 %2
; CHECK-LABEL: insert_exp_qp
; CHECK-DAG: mtfprd [[FPREG:f[0-9]+]], r3
-; CHECK-DAG: lxvx [[VECREG:v[0-9]+]]
+; CHECK-DAG: lxv [[VECREG:v[0-9]+]]
; CHECK: xsiexpqp v2, [[VECREG]], [[FPREG]]
; CHECK: blr
}
%1 = call i64 @llvm.ppc.scalar.extract.expq(fp128 %0)
ret i64 %1
; CHECK-LABEL: extract_exp
-; CHECK: lxvx [[VECIN:v[0-9]+]]
+; CHECK: lxv [[VECIN:v[0-9]+]]
; CHECK: xsxexpqp [[VECOUT:v[0-9]+]], [[VECIN]]
; CHECK: mfvsrd r3, [[VECOUT]]
; CHECK: blr
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI12_0@toc@ha
; CHECK-P9-BE-NEXT: xxlxor v4, v4, v4
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI12_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-BE-NEXT: blr
;
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI15_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI15_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vmrgow v2, v3, v2
; CHECK-P9-NEXT: blr
;
; CHECK-P9-BE: # %bb.0: # %entry
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI15_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI15_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI15_1@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI15_1@toc@l
-; CHECK-P9-BE-NEXT: lxvx v4, 0, r3
+; CHECK-P9-BE-NEXT: lxv v4, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v4, v3
; CHECK-P9-BE-NEXT: blr
;
; CHECK-P9-NEXT: lxsiwzx v2, r3, r4
; CHECK-P9-NEXT: addis r3, r2, .LCPI16_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI16_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: blr
;
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lxsibzx v2, 0, r3
; CHECK-P9-NEXT: vspltb v2, v2, 7
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P9-BE-LABEL: testByteSplat:
; CHECK-P9-BE: # %bb.0: # %entry
; CHECK-P9-BE-NEXT: lxsibzx v2, 0, r3
; CHECK-P9-BE-NEXT: vspltb v2, v2, 7
-; CHECK-P9-BE-NEXT: stxvx v2, 0, r3
+; CHECK-P9-BE-NEXT: stxv v2, 0(r3)
; CHECK-P9-BE-NEXT: blr
;
; CHECK-NOVSX-LABEL: testByteSplat:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI3_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI3_0@toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret fp128 0xL00000000000000003C00FFFFC5D02B3A
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <16 x i8> <i8 -128, i8 -127, i8 -126, i8 -125, i8 -124, i8 -123, i8 -122, i8 -121, i8 -120, i8 -119, i8 -118, i8 -117, i8 -116, i8 -115, i8 -114, i8 -113>
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI5_0@toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <8 x i16> <i16 -32768, i16 -32767, i16 -32766, i16 -32765, i16 -32764, i16 -32763, i16 -32762, i16 -32761>
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI6_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI6_0@toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <4 x i32> <i32 -2147483648, i32 -2147483647, i32 -2147483646, i32 -2147483645>
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI7_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI7_0@toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <2 x i64> <i64 -9223372036854775808, i64 -9223372036854775807>
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI8_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI8_0@toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <1 x i128> <i128 -27670116110564327424>
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI9_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI9_0@toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <4 x float> <float 0x380FFFF840000000, float 0x380FFF57C0000000, float 0x3843FFFB20000000, float 0x3843FF96C0000000>
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI10_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI10_0@toc@l
-; CHECK-P9-NEXT: lxvx vs34, 0, r3
+; CHECK-P9-NEXT: lxv vs34, 0(r3)
; CHECK-P9-NEXT: blr
entry:
ret <2 x double> <double 2.225070e-308, double 2.225000e-308>
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI15_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI15_0@toc@l
-; CHECK-P9-NEXT: lxvx vs35, 0, r3
+; CHECK-P9-NEXT: lxv vs35, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LCPI15_1@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI15_1@toc@l
; CHECK-P9-NEXT: xsaddqp v2, v2, v3
-; CHECK-P9-NEXT: lxvx vs35, 0, r3
+; CHECK-P9-NEXT: lxv vs35, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LCPI15_2@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI15_2@toc@l
; CHECK-P9-NEXT: xsaddqp v2, v2, v3
-; CHECK-P9-NEXT: lxvx vs35, 0, r3
+; CHECK-P9-NEXT: lxv vs35, 0(r3)
; CHECK-P9-NEXT: xsaddqp v2, v2, v3
; CHECK-P9-NEXT: blr
entry:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LCPI17_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI17_0@toc@l
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LCPI17_1@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI17_1@toc@l
-; CHECK-P9-NEXT: lxvx vs2, 0, r3
+; CHECK-P9-NEXT: lxv vs2, 0(r3)
; CHECK-P9-NEXT: xvadddp vs1, vs34, vs0
; CHECK-P9-NEXT: xvadddp vs1, vs1, vs2
; CHECK-P9-NEXT: xvadddp vs34, vs1, vs0
; CHECK-NEXT: bl cos
; CHECK-NEXT: nop
; CHECK-NEXT: addi 30, 30, 8
-; CHECK-NEXT: stfdx 1, 0, 29
+; CHECK-NEXT: stfd 1, 0(29)
; CHECK-NEXT: cmpldi 30, 2040
; CHECK-NEXT: bne 0, .LBB0_1
; CHECK-NEXT: # %bb.2: # %exit
; CHECK-NEXT: #
; CHECK-NEXT: lfdu 0, 8(3)
; CHECK-NEXT: xssqrtdp 0, 0
-; CHECK-NEXT: stfdx 0, 0, 3
+; CHECK-NEXT: stfd 0, 0(3)
; CHECK-NEXT: bdnz .LBB1_1
; CHECK-NEXT: # %bb.2: # %exit
; CHECK-NEXT: blr
; CHECK-P9-NEXT: addis r3, r2, .LCPI16_0@toc@ha
; CHECK-P9-NEXT: xxsldwi vs0, vs34, vs34, 1
; CHECK-P9-NEXT: addi r3, r3, .LCPI16_0@toc@l
-; CHECK-P9-NEXT: lxvx vs35, 0, r3
+; CHECK-P9-NEXT: lxv vs35, 0(r3)
; CHECK-P9-NEXT: li r3, 16
; CHECK-P9-NEXT: stfiwx f0, r5, r3
; CHECK-P9-NEXT: li r3, 20
; CHECK-NEXT: std r6, 56(r1)
; CHECK-NEXT: std r7, 64(r1)
; CHECK-NEXT: std r8, 72(r1)
-; CHECK-NEXT: lxvx v2, 0, r4
+; CHECK-NEXT: lxv v2, 0(r4)
; CHECK-NEXT: std r9, 80(r1)
; CHECK-NEXT: std r10, 88(r1)
; CHECK-NEXT: bltlr cr0
; CHECK-BE-NEXT: std r6, 72(r1)
; CHECK-BE-NEXT: std r7, 80(r1)
; CHECK-BE-NEXT: std r8, 88(r1)
-; CHECK-BE-NEXT: lxvx v2, 0, r4
+; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: std r9, 96(r1)
; CHECK-BE-NEXT: std r10, 104(r1)
; CHECK-BE-NEXT: bltlr cr0
define dso_local void @testLdNSt(i8* nocapture readonly %PtrC, fp128* nocapture %PtrF) {
; CHECK-LABEL: testLdNSt:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 4
-; CHECK-NEXT: addi r4, r4, 8
-; CHECK-NEXT: lxvx vs0, 0, r3
-; CHECK-NEXT: stxvx vs0, 0, r4
+; CHECK-NEXT: li r5, 4
+; CHECK-NEXT: lxvx vs0, r3, r5
+; CHECK-NEXT: li r3, 8
+; CHECK-NEXT: stxvx vs0, r4, r3
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: testLdNSt:
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis r3, r2, a@toc@ha
; CHECK-NEXT: addi r3, r3, a@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b@toc@ha
; CHECK-NEXT: addi r3, r3, b@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: bl fmodf128
; CHECK-NEXT: nop
; CHECK-NEXT: addi r1, r1, 32
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: li r4, 1
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: iselgt r3, r4, r3
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: li r4, 1
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: isellt r3, r4, r3
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: cror 4*cr5+lt, un, lt
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: cror 4*cr5+lt, un, gt
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: li r4, 1
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: iseleq r3, r4, r3
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: iselgt r3, 0, r3
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: isellt r3, 0, r3
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: crnor 4*cr5+lt, lt, un
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: crnor 4*cr5+lt, gt, un
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: iseleq r3, 0, r3
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: bgtlr cr0
; CHECK-NEXT: # %bb.1: # %entry
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: bltlr cr0
; CHECK-NEXT: # %bb.1: # %entry
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: crnor 4*cr5+lt, un, lt
; CHECK-NEXT: bclr 12, 4*cr5+lt, 0
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: crnor 4*cr5+lt, un, gt
; CHECK-NEXT: bclr 12, 4*cr5+lt, 0
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-NEXT: addi r3, r3, a_qp@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-NEXT: addi r3, r3, b_qp@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xscmpuqp cr0, v2, v3
; CHECK-NEXT: beqlr cr0
; CHECK-NEXT: # %bb.1: # %entry
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC6@toc@ha
; CHECK-NEXT: ld r4, .LC6@toc@l(r4)
-; CHECK-NEXT: lxvx v2, 0, r4
+; CHECK-NEXT: lxv v2, 0(r4)
; CHECK-NEXT: xscvqpdp v2, v2
; CHECK-NEXT: stxsd v2, 0(r3)
; CHECK-NEXT: blr
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
-; CHECK-P8-NEXT: stfdx f1, 0, r30
+; CHECK-P8-NEXT: stfd f1, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-NEXT: addis r5, r2, .LC7@toc@ha
; CHECK-NEXT: sldi r4, r4, 3
; CHECK-NEXT: ld r5, .LC7@toc@l(r5)
-; CHECK-NEXT: lxvx v2, 0, r5
+; CHECK-NEXT: lxv v2, 0(r5)
; CHECK-NEXT: xscvqpdp v2, v2
; CHECK-NEXT: stxsdx v2, r3, r4
; CHECK-NEXT: blr
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
-; CHECK-P8-NEXT: stfdx f1, 0, r30
+; CHECK-P8-NEXT: stfd f1, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r4, r2, .LC6@toc@ha
; CHECK-NEXT: ld r4, .LC6@toc@l(r4)
-; CHECK-NEXT: lxvx v2, 0, r4
+; CHECK-NEXT: lxv v2, 0(r4)
; CHECK-NEXT: xscvqpdpo v2, v2
; CHECK-NEXT: xsrsp f0, v2
; CHECK-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop
-; CHECK-P8-NEXT: stfsx f1, 0, r30
+; CHECK-P8-NEXT: stfs f1, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop
-; CHECK-P8-NEXT: stfsx f1, 0, r30
+; CHECK-P8-NEXT: stfs f1, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-NEXT: ld r3, .LC8@toc@l(r3)
; CHECK-NEXT: xscvdpqp v2, v2
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: dpConv2qp_02:
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: lfdx f1, 0, r3
+; CHECK-P8-NEXT: lfd f1, 0(r3)
; CHECK-P8-NEXT: bl __extenddfkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-NEXT: ld r3, .LC8@toc@l(r3)
; CHECK-NEXT: xscvdpqp v2, v2
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: dpConv2qp_02b:
; CHECK-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-NEXT: ld r3, .LC8@toc@l(r3)
; CHECK-NEXT: xscvdpqp v2, v2
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: spConv2qp_02:
; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
-; CHECK-P8-NEXT: lfsx f1, 0, r3
+; CHECK-P8-NEXT: lfs f1, 0(r3)
; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-NEXT: ld r3, .LC8@toc@l(r3)
; CHECK-NEXT: xscvdpqp v2, v2
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: spConv2qp_02b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; CHECK-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LABEL: loadConstant:
; CHECK-NEXT: xsaddqp v2, v2, v3
; CHECK-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; CHECK-NEXT: lxvx v3, 0, r3
+; CHECK-NEXT: lxv v3, 0(r3)
; CHECK-NEXT: xsaddqp v2, v2, v3
; CHECK-NEXT: blr
;
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld r3, 104(r1)
; CHECK-NEXT: stxv v2, 0(r9)
-; CHECK-NEXT: stxvx v3, 0, r3
+; CHECK-NEXT: stxv v3, 0(r3)
; CHECK-NEXT: mtvsrwa v3, r10
; CHECK-NEXT: lxv v2, 0(r9)
; CHECK-NEXT: xscvsdqp v3, v3
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: li r3, 48
-; CHECK-P8-NEXT: stfdx f1, 0, r30
+; CHECK-P8-NEXT: stfd f1, 0(r30)
; CHECK-P8-NEXT: ld r30, 64(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: lvx v31, r1, r3 # 16-byte Folded Reload
; CHECK-P8-NEXT: addi r1, r1, 80
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: li r3, 48
-; CHECK-P8-NEXT: stfdx f1, 0, r30
+; CHECK-P8-NEXT: stfd f1, 0(r30)
; CHECK-P8-NEXT: ld r30, 64(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: lvx v31, r1, r3 # 16-byte Folded Reload
; CHECK-P8-NEXT: addi r1, r1, 80
; CHECK-NEXT: addis r5, r2, .LC0@toc@ha
; CHECK-NEXT: sldi r4, r4, 3
; CHECK-NEXT: ld r5, .LC0@toc@l(r5)
-; CHECK-NEXT: lxvx v2, 0, r5
+; CHECK-NEXT: lxv v2, 0(r5)
; CHECK-NEXT: xscvqpudz v2, v2
; CHECK-NEXT: stxsdx v2, r3, r4
; CHECK-NEXT: blr
define dso_local fp128 @ld_unalign16___float128___float128(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 1
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 1
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
define dso_local fp128 @ld_align16___float128___float128(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_align16___float128___float128:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 8
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-LABEL: ld_or___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK-LABEL: ld_not_disjoint16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK-LABEL: ld_disjoint_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 6
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-LABEL: ld_disjoint_align16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 24
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 24
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: pli r5, 3567587329
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_not_disjoint64___float128___float128:
; CHECK-PREP10-NEXT: oris r4, r4, 54437
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-LABEL: ld_cst_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 255
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 255 to fp128*), align 16
; CHECK-P10-LABEL: ld_cst_unalign32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 99999
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_unalign32___float128___float128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r3, 1
; CHECK-PREP10-NEXT: ori r3, r3, 34463
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 99999 to fp128*), align 16
; CHECK-P10-LABEL: ld_cst_align32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 9999900
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align32___float128___float128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r3, 152
; CHECK-PREP10-NEXT: ori r3, r3, 38428
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 9999900 to fp128*), align 16
; CHECK-P10-NEXT: pli r3, 232
; CHECK-P10-NEXT: pli r4, 3567587329
; CHECK-P10-NEXT: rldimi r4, r3, 32, 0
-; CHECK-P10-NEXT: lxvx v2, 0, r4
+; CHECK-P10-NEXT: lxv v2, 0(r4)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_unalign64___float128___float128:
; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
; CHECK-PREP10-NEXT: oris r3, r3, 54437
; CHECK-PREP10-NEXT: ori r3, r3, 4097
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 1000000000001 to fp128*), align 16
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_cst_align64___float128___float128:
; CHECK-PREP10-NEXT: lis r3, 3725
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
-; CHECK-PREP10-NEXT: lxvx v2, 0, r3
+; CHECK-PREP10-NEXT: lxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* inttoptr (i64 1000000000000 to fp128*), align 4096
define dso_local void @st_unalign16___float128___float128(i8* nocapture %ptr, fp128 %str) {
; CHECK-LABEL: st_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 1
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 1
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
define dso_local void @st_align16___float128___float128(i8* nocapture %ptr, fp128 %str) {
; CHECK-LABEL: st_align16___float128___float128:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 8
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
; CHECK-LABEL: st_or1___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
; CHECK-LABEL: st_not_disjoint16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
; CHECK-LABEL: st_disjoint_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 6
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK-LABEL: st_disjoint_align16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 24
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 24
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: pli r5, 3567587329
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_not_disjoint64___float128___float128:
; CHECK-PREP10-NEXT: oris r4, r4, 54437
; CHECK-PREP10-NEXT: ori r4, r4, 4097
; CHECK-PREP10-NEXT: or r3, r3, r4
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
; CHECK-LABEL: st_cst_unalign16___float128___float128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 255
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 255 to fp128*), align 16
; CHECK-P10-LABEL: st_cst_unalign32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 99999
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_cst_unalign32___float128___float128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r3, 1
; CHECK-PREP10-NEXT: ori r3, r3, 34463
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 99999 to fp128*), align 16
; CHECK-P10-LABEL: st_cst_align32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 9999900
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_cst_align32___float128___float128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r3, 152
; CHECK-PREP10-NEXT: ori r3, r3, 38428
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 9999900 to fp128*), align 16
; CHECK-P10-NEXT: pli r3, 232
; CHECK-P10-NEXT: pli r4, 3567587329
; CHECK-P10-NEXT: rldimi r4, r3, 32, 0
-; CHECK-P10-NEXT: stxvx v2, 0, r4
+; CHECK-P10-NEXT: stxv v2, 0(r4)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_cst_unalign64___float128___float128:
; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
; CHECK-PREP10-NEXT: oris r3, r3, 54437
; CHECK-PREP10-NEXT: ori r3, r3, 4097
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 1000000000001 to fp128*), align 16
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_cst_align64___float128___float128:
; CHECK-PREP10-NEXT: lis r3, 3725
; CHECK-PREP10-NEXT: ori r3, r3, 19025
; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
-; CHECK-PREP10-NEXT: stxvx v2, 0, r3
+; CHECK-PREP10-NEXT: stxv v2, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
store fp128 %str, fp128* inttoptr (i64 1000000000000 to fp128*), align 4096
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd128@toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd128@toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: lxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt128@toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt128@toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: stxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: blr
;
; CHECK-PREP10-LABEL: testGlob128PtrPlus0:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: addis r3, r2, GlobLd128@toc@ha
; CHECK-PREP10-NEXT: addi r3, r3, GlobLd128@toc@l
-; CHECK-PREP10-NEXT: lxvx vs0, 0, r3
+; CHECK-PREP10-NEXT: lxv vs0, 0(r3)
; CHECK-PREP10-NEXT: addis r3, r2, GlobSt128@toc@ha
; CHECK-PREP10-NEXT: addi r3, r3, GlobSt128@toc@l
-; CHECK-PREP10-NEXT: stxvx vs0, 0, r3
+; CHECK-PREP10-NEXT: stxv vs0, 0(r3)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load fp128, fp128* getelementptr inbounds ([20 x fp128], [20 x fp128]* @GlobLd128, i64 0, i64 0), align 16
%this.addr = alloca %SomeStruct*, align 8
%V.addr = alloca double, align 8
store %SomeStruct* %this, %SomeStruct** %this.addr, align 8
-; ELF64VSX: stfdx {{[0-9][0-9]?}}, 0, {{[1-9][0-9]?}}
+; ELF64VSX: stfd {{[0-9][0-9]?}}, -{{[1-9][0-9]?}}({{[1-9][0-9]?}})
store double %V, double* %V.addr, align 8
%this1 = load %SomeStruct*, %SomeStruct** %this.addr
%Val = getelementptr inbounds %SomeStruct, %SomeStruct* %this1, i32 0, i32 0
; CHECK-NEXT: ld 4, a15@toc@l(4)
; CHECK-NEXT: lfd 2, a2@toc@l(3)
; CHECK-NEXT: addis 3, 2, a3@toc@ha
-; CHECK-NEXT: lxvx 34, 0, 6
-; CHECK-NEXT: lxvx 0, 0, 5
+; CHECK-NEXT: lxv 34, 0(6)
+; CHECK-NEXT: lxv 0, 0(5)
; CHECK-NEXT: li 5, 152
; CHECK-NEXT: lfd 3, a3@toc@l(3)
; CHECK-NEXT: addis 3, 2, a4@toc@ha
; CHECK-FAST-LABEL: fma_combine_no_ice:
; CHECK-FAST: # %bb.0:
; CHECK-FAST-NEXT: addis 3, 2, .LCPI4_0@toc@ha
-; CHECK-FAST-NEXT: addis 4, 2, .LCPI4_1@toc@ha
; CHECK-FAST-NEXT: lfs 0, .LCPI4_0@toc@l(3)
-; CHECK-FAST-NEXT: lfsx 2, 0, 3
+; CHECK-FAST-NEXT: addis 3, 2, .LCPI4_1@toc@ha
+; CHECK-FAST-NEXT: lfs 2, 0(3)
+; CHECK-FAST-NEXT: lfs 3, .LCPI4_1@toc@l(3)
; CHECK-FAST-NEXT: addis 3, 2, .LCPI4_2@toc@ha
-; CHECK-FAST-NEXT: lfs 3, .LCPI4_1@toc@l(4)
; CHECK-FAST-NEXT: lfs 1, .LCPI4_2@toc@l(3)
; CHECK-FAST-NEXT: xsmaddasp 3, 2, 0
; CHECK-FAST-NEXT: xsmaddasp 1, 2, 3
; CHECK-LABEL: fma_combine_no_ice:
; CHECK: # %bb.0:
; CHECK-NEXT: addis 3, 2, .LCPI4_0@toc@ha
-; CHECK-NEXT: addis 4, 2, .LCPI4_1@toc@ha
; CHECK-NEXT: lfs 0, .LCPI4_0@toc@l(3)
-; CHECK-NEXT: lfsx 2, 0, 3
+; CHECK-NEXT: addis 3, 2, .LCPI4_1@toc@ha
+; CHECK-NEXT: lfs 2, 0(3)
+; CHECK-NEXT: lfs 3, .LCPI4_1@toc@l(3)
; CHECK-NEXT: addis 3, 2, .LCPI4_2@toc@ha
-; CHECK-NEXT: lfs 3, .LCPI4_1@toc@l(4)
; CHECK-NEXT: lfs 1, .LCPI4_2@toc@l(3)
; CHECK-NEXT: fmr 4, 3
; CHECK-NEXT: xsmaddasp 3, 2, 0
; CHECK-FAST-LABEL: getNegatedExpression_crash:
; CHECK-FAST: # %bb.0:
; CHECK-FAST-NEXT: addis 3, 2, .LCPI5_1@toc@ha
-; CHECK-FAST-NEXT: addis 4, 2, .LCPI5_0@toc@ha
; CHECK-FAST-NEXT: lfs 3, .LCPI5_1@toc@l(3)
-; CHECK-FAST-NEXT: lfs 4, .LCPI5_0@toc@l(4)
+; CHECK-FAST-NEXT: addis 3, 2, .LCPI5_0@toc@ha
+; CHECK-FAST-NEXT: lfs 4, .LCPI5_0@toc@l(3)
; CHECK-FAST-NEXT: xssubdp 0, 1, 3
; CHECK-FAST-NEXT: xsmaddadp 3, 1, 4
; CHECK-FAST-NEXT: xsmaddadp 0, 3, 2
; CHECK-LABEL: getNegatedExpression_crash:
; CHECK: # %bb.0:
; CHECK-NEXT: addis 3, 2, .LCPI5_1@toc@ha
-; CHECK-NEXT: addis 4, 2, .LCPI5_0@toc@ha
; CHECK-NEXT: lfs 3, .LCPI5_1@toc@l(3)
-; CHECK-NEXT: lfs 4, .LCPI5_0@toc@l(4)
+; CHECK-NEXT: addis 3, 2, .LCPI5_0@toc@ha
+; CHECK-NEXT: lfs 4, .LCPI5_0@toc@l(3)
; CHECK-NEXT: xssubdp 0, 1, 3
; CHECK-NEXT: xsmaddadp 3, 1, 4
; CHECK-NEXT: xsmaddadp 0, 3, 2
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI11_0@toc@ha
-; FMF-NEXT: addis 4, 2, .LCPI11_1@toc@ha
; FMF-NEXT: lfs 2, .LCPI11_0@toc@l(3)
-; FMF-NEXT: lfs 3, .LCPI11_1@toc@l(4)
+; FMF-NEXT: addis 3, 2, .LCPI11_1@toc@ha
+; FMF-NEXT: lfs 3, .LCPI11_1@toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsmulsp 1, 1, 2
; GLOBAL-NEXT: # %bb.1:
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI11_0@toc@ha
-; GLOBAL-NEXT: addis 4, 2, .LCPI11_1@toc@ha
; GLOBAL-NEXT: lfs 2, .LCPI11_0@toc@l(3)
-; GLOBAL-NEXT: lfs 3, .LCPI11_1@toc@l(4)
+; GLOBAL-NEXT: addis 3, 2, .LCPI11_1@toc@ha
+; GLOBAL-NEXT: lfs 3, .LCPI11_1@toc@l(3)
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI13_0@toc@ha
-; FMF-NEXT: addis 4, 2, .LCPI13_1@toc@ha
; FMF-NEXT: lfs 2, .LCPI13_0@toc@l(3)
-; FMF-NEXT: lfs 3, .LCPI13_1@toc@l(4)
+; FMF-NEXT: addis 3, 2, .LCPI13_1@toc@ha
+; FMF-NEXT: lfs 3, .LCPI13_1@toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsmulsp 1, 1, 2
; GLOBAL-NEXT: # %bb.1:
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI13_0@toc@ha
-; GLOBAL-NEXT: addis 4, 2, .LCPI13_1@toc@ha
; GLOBAL-NEXT: lfs 2, .LCPI13_0@toc@l(3)
-; GLOBAL-NEXT: lfs 3, .LCPI13_1@toc@l(4)
+; GLOBAL-NEXT: addis 3, 2, .LCPI13_1@toc@ha
+; GLOBAL-NEXT: lfs 3, .LCPI13_1@toc@l(3)
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI15_0@toc@ha
-; FMF-NEXT: addis 4, 2, .LCPI15_1@toc@ha
; FMF-NEXT: lfs 2, .LCPI15_0@toc@l(3)
-; FMF-NEXT: lfs 3, .LCPI15_1@toc@l(4)
+; FMF-NEXT: addis 3, 2, .LCPI15_1@toc@ha
+; FMF-NEXT: lfs 3, .LCPI15_1@toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmaddasp 2, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 3
; GLOBAL-NEXT: # %bb.1:
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI15_0@toc@ha
-; GLOBAL-NEXT: addis 4, 2, .LCPI15_1@toc@ha
; GLOBAL-NEXT: lfs 2, .LCPI15_0@toc@l(3)
-; GLOBAL-NEXT: lfs 3, .LCPI15_1@toc@l(4)
+; GLOBAL-NEXT: addis 3, 2, .LCPI15_1@toc@ha
+; GLOBAL-NEXT: lfs 3, .LCPI15_1@toc@l(3)
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI16_0@toc@ha
-; FMF-NEXT: addis 4, 2, .LCPI16_1@toc@ha
; FMF-NEXT: lfs 2, .LCPI16_0@toc@l(3)
-; FMF-NEXT: lfs 3, .LCPI16_1@toc@l(4)
+; FMF-NEXT: addis 3, 2, .LCPI16_1@toc@ha
+; FMF-NEXT: lfs 3, .LCPI16_1@toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmaddasp 2, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 3
; GLOBAL-NEXT: # %bb.1:
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI16_0@toc@ha
-; GLOBAL-NEXT: addis 4, 2, .LCPI16_1@toc@ha
; GLOBAL-NEXT: lfs 2, .LCPI16_0@toc@l(3)
-; GLOBAL-NEXT: lfs 3, .LCPI16_1@toc@l(4)
+; GLOBAL-NEXT: addis 3, 2, .LCPI16_1@toc@ha
+; GLOBAL-NEXT: lfs 3, .LCPI16_1@toc@l(3)
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
; P8-NEXT: xxlxor f3, f3, f3
; P8-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; P8-NEXT: lfs f0, .LCPI13_0@toc@l(r3)
-; P8-NEXT: fcmpo cr0, f2, f3
; P8-NEXT: lis r3, -32768
+; P8-NEXT: fcmpo cr0, f2, f3
; P8-NEXT: xxlxor f3, f3, f3
; P8-NEXT: fcmpo cr1, f1, f0
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, lt
; PPC64-DAG: stfd 2, [[OFFSET_HI:-?[0-9]+]]([[SP:[0-9]+]])
; PPC64-DAG: stfd 1, [[OFFSET_LO:-?[0-9]+]]([[SP]])
; PPC64-DAG: li [[FLIP_BIT:[0-9]+]], 1
-; PPC64-DAG: rldic [[FLIP_BIT]], [[FLIP_BIT]], 63, 0
+; PPC64-DAG: rldic [[RES:[0-9]+]], [[FLIP_BIT]], 63, 0
; PPC64-DAG: ld [[HI:[0-9]+]], [[OFFSET_LO]]([[SP]])
; PPC64-DAG: ld [[LO:[0-9]+]], [[OFFSET_HI]]([[SP]])
; PPC64-NOT: BARRIER
-; PPC64-DAG: xor 3, [[HI]], [[FLIP_BIT]]
-; PPC64-DAG: xor 4, [[LO]], [[FLIP_BIT]]
+; PPC64-DAG: xor 3, [[HI]], [[RES]]
+; PPC64-DAG: xor 4, [[LO]], [[RES]]
; PPC64: blr
; PPC64-P8-LABEL: test_neg:
; Verify XFLOADf64 didn't implict def 'rm'.
define double @rm() {
; CHECK-P8-LABEL: bb.0.entry
-; CHECK-P8: %{{[0-9]+}}:vsfrc = XFLOADf64 $zero8, %{{[0-9]+}} ::
+; CHECK-P8: %{{[0-9]+}}:f8rc = LFD target-flags(ppc-toc-lo) %const.0, %{{[0-9]+}}, implicit $x2 ::
entry:
ret double 2.300000e+00
}
; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <4 x i32>, <4 x i32>* %vp1
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI3_0@toc@ha
; CHECK-P9-BE-NEXT: lxv v2, 0(r4)
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI3_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <4 x i32>, <4 x i32>* %vp1
; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <8 x i16>, <8 x i16>* %vp1
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-P9-BE-NEXT: lxv v2, 0(r4)
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <8 x i16>, <8 x i16>* %vp1
; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI9_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI9_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <4 x float>, <4 x float>* %vp1
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI10_0@toc@ha
; CHECK-P9-BE-NEXT: lxv v2, 0(r4)
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI10_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: blr
%v1 = load <4 x float>, <4 x float>* %vp1
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI13_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI13_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI14_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI14_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v2, 0, r3
+; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v3, v3, v2
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI15_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI15_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI16_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI16_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v2, 0, r3
+; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v3, v3, v2
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI21_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI21_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v3, 0, r3
+; CHECK-P9-BE-NEXT: lxv v3, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
; CHECK-P9-BE: # %bb.0:
; CHECK-P9-BE-NEXT: addis r3, r2, .LCPI22_0@toc@ha
; CHECK-P9-BE-NEXT: addi r3, r3, .LCPI22_0@toc@l
-; CHECK-P9-BE-NEXT: lxvx v2, 0, r3
+; CHECK-P9-BE-NEXT: lxv v2, 0(r3)
; CHECK-P9-BE-NEXT: vperm v2, v3, v3, v2
; CHECK-P9-BE-NEXT: stxv v2, 0(r7)
; CHECK-P9-BE-NEXT: blr
-; RUN: llc -O3 -ppc-late-peephole=false -o - %s | FileCheck %s
+; RUN: llc -O3 -ppc-late-peephole=false -ppc-convert-rr-to-ri=false -o - %s | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
; MEDIUM-VSX: .quad 0x3f4fd4920b498cf0
; MEDIUM-VSX-LABEL: test_double_const:
; MEDIUM-VSX: addis [[REG1:[0-9]+]], 2, [[VAR]]@toc@ha
-; MEDIUM-VSX: lfd {{[0-9]+}}, [[VAR]]@toc@l([[REG1]])
+; MEDIUM-VSX: lfd {{[0-9]+}}, 0({{[0-9]+}})
; LARGE: [[VAR:[a-z0-9A-Z_.]+]]:
; LARGE: .quad 0x3f4fd4920b498cf0
; LARGE-VSX-LABEL: test_double_const:
; LARGE-VSX: addis [[REG1:[0-9]+]], 2, [[VAR2:[a-z0-9A-Z_.]+]]@toc@ha
; LARGE-VSX: ld [[REG2:[0-9]+]], [[VAR2]]@toc@l([[REG1]])
-; LARGE-VSX: lfdx {{[0-9]+}}, 0, [[REG2]]
+; LARGE-VSX: lfd {{[0-9]+}}, 0({{[0-9]+}})
; MEDIUM-P9: [[VAR:[a-z0-9A-Z_.]+]]:
; MEDIUM-P9: .quad 0x3f4fd4920b498cf0
; CHECK-NEXT: stxv vs0, 48(r30)
; CHECK-NEXT: stxv vs1, 32(r30)
; CHECK-NEXT: stxv vs2, 16(r30)
-; CHECK-NEXT: stxvx vs3, 0, r30
+; CHECK-NEXT: stxv vs3, 0(r30)
; CHECK-NEXT: addi r1, r1, 176
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-BE-NEXT: xvf16ger2pp acc0, v2, v4
; CHECK-BE-NEXT: xxmfacc acc0
; CHECK-BE-NEXT: stxv vs1, 16(r30)
-; CHECK-BE-NEXT: stxvx vs0, 0, r30
+; CHECK-BE-NEXT: stxv vs0, 0(r30)
; CHECK-BE-NEXT: stxv vs3, 48(r30)
; CHECK-BE-NEXT: stxv vs2, 32(r30)
; CHECK-BE-NEXT: ld r30, 240(r1) # 8-byte Folded Reload
; CHECK-NEXT: stxv vs0, 48(r3)
; CHECK-NEXT: stxv vs1, 32(r3)
; CHECK-NEXT: stxv vs2, 16(r3)
-; CHECK-NEXT: stxvx vs3, 0, r3
+; CHECK-NEXT: stxv vs3, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-BE-LABEL: intrinsics1:
; CHECK-BE-NEXT: pmxvf64gernp acc0, vsp34, v0, 0, 0
; CHECK-BE-NEXT: xxmfacc acc0
; CHECK-BE-NEXT: stxv vs1, 16(r3)
-; CHECK-BE-NEXT: stxvx vs0, 0, r3
+; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: stxv vs3, 48(r3)
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: blr
; CHECK-LABEL: test1_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v{{[0-9]+}}, v2, v[[REG2]]
; CHECK-LABEL: test2_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vaddudm v{{[0-9]+}}, v2, v[[REG3]]
; CHECK-LABEL: test3_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vsubudm v{{[0-9]+}}, v[[REG3]], v2
; CHECK-LABEL: test4_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-P8-NEXT: xxlxor v[[REG4:[0-9]+]],
; CHECK-LABEL: test5_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vaddudm v[[REG4:[0-9]+]], v2, v[[REG3]]
; CHECK-LABEL: test6_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vsubudm v{{[0-9]+}}, v2, v[[REG3]]
; CHECK-LABEL: test7_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG4:[0-9]+]], v2, v[[REG2]]
; CHECK-LABEL: test8_v2i64:
; CHECK-P8: lxvd2x vs[[REG1:[0-9]+]], 0, r{{[0-9]+}}
; CHECK-P8-NEXT: xxswapd v[[REG2:[0-9]+]], vs[[REG1]]
-; CHECK-P9: lxvx v[[REG2:[0-9]+]], 0, r{{[0-9]+}}
+; CHECK-P9: lxv v[[REG2:[0-9]+]], 0(r{{[0-9]+}})
; CHECK-NOT: vmul
; CHECK-NEXT: vsld v[[REG3:[0-9]+]], v2, v[[REG2]]
; CHECK-NEXT: vsubudm v{{[0-9]+}}, v[[REG3]], v2
; CHECK-NEXT: addis 5, 2, .LCPI0_0@toc@ha
; CHECK-NEXT: .Ltmp0:
; CHECK-NEXT: .loc 1 2 38 prologue_end
-; CHECK-NEXT: lfsx 0, 0, 3
+; CHECK-NEXT: lfs 0, 0(3)
; CHECK-NEXT: addis 3, 2, .LCPI0_1@toc@ha
; CHECK-NEXT: .Ltmp1:
; CHECK-NEXT: .loc 1 0 38 is_stmt 0
; CHECK-NOPREFIX: # %bb.0: # %entry
; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; CHECK-NOPREFIX-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-NOPREFIX-NEXT: lxvx vs34, 0, r3
+; CHECK-NOPREFIX-NEXT: lxv vs34, 0(r3)
; CHECK-NOPREFIX-NEXT: blr
;
; CHECK-BE-LABEL: testDoubleToDoubleFail:
; CHECK-NOPREFIX: # %bb.0: # %entry
; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-NOPREFIX-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; CHECK-NOPREFIX-NEXT: lxvx vs34, 0, r3
+; CHECK-NOPREFIX-NEXT: lxv vs34, 0(r3)
; CHECK-NOPREFIX-NEXT: blr
;
; CHECK-BE-LABEL: testFloatDenormToDouble:
; CHECK-NOPREFIX: # %bb.0: # %entry
; CHECK-NOPREFIX-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-NOPREFIX-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; CHECK-NOPREFIX-NEXT: lxvx vs34, 0, r3
+; CHECK-NOPREFIX-NEXT: lxv vs34, 0(r3)
; CHECK-NOPREFIX-NEXT: blr
;
; CHECK-BE-LABEL: testDoubleToDoubleNaNFail:
; CHECK-BE: # %bb.0:
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vrlq v2, v3, v2
; CHECK-BE-NEXT: blr
%shl.i = shl <1 x i128> <i128 16>, %x
; CHECK-BE: # %bb.0:
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vrlq v2, v3, v2
; CHECK-BE-NEXT: blr
%shl.i = shl <1 x i128> <i128 4>, %x
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-BE-NEXT: lxvx v5, 0, r3
+; CHECK-BE-NEXT: lxv v5, 0(r3)
; CHECK-BE-NEXT: vperm v3, v3, v4, v5
; CHECK-BE-NEXT: vrlqnm v2, v2, v3
; CHECK-BE-NEXT: blr
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI16_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI16_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI17_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI17_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI18_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI18_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI19_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI19_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI20_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI20_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI21_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI21_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI22_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI22_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI23_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI23_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI56_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI56_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI57_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI57_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI58_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI58_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI59_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI59_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI60_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI60_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI61_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI61_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI62_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI62_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI63_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI63_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI64_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI64_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI65_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI65_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI66_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI66_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI67_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI67_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI68_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI68_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI69_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI69_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI70_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI70_0@toc@l
-; CHECK-NEXT: lxvx 35, 0, 3
+; CHECK-NEXT: lxv 35, 0(3)
; CHECK-NEXT: vperm 2, 2, 2, 3
; CHECK-NEXT: blr
;
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI71_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI71_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: blr
entry:
; CHECK-LABEL: ReadWrite128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, input128@got@pcrel(0), 1
-; CHECK-NEXT: lxvx vs0, 0, r3
+; CHECK-NEXT: .Lpcrel4:
+; CHECK-NEXT: .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8)
+; CHECK-NEXT: lxv vs0, 0(r3)
; CHECK-NEXT: pld r3, output128@got@pcrel(0), 1
-; CHECK-NEXT: stxvx vs0, 0, r3
+; CHECK-NEXT: .Lpcrel5:
+; CHECK-NEXT: .reloc .Lpcrel5-8,R_PPC64_PCREL_OPT,.-(.Lpcrel5-8)
+; CHECK-NEXT: stxv vs0, 0(r3)
; CHECK-NEXT: blr
entry:
%0 = load i128, i128* @input128, align 16
; CHECK-LABEL: ReadWritef32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputf32@got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel4:
+; CHECK-NEXT: .Lpcrel6:
; CHECK-NEXT: xxspltidp vs1, 1078103900
-; CHECK-NEXT: .reloc .Lpcrel4-8,R_PPC64_PCREL_OPT,.-(.Lpcrel4-8)
+; CHECK-NEXT: .reloc .Lpcrel6-8,R_PPC64_PCREL_OPT,.-(.Lpcrel6-8)
; CHECK-NEXT: lfs f0, 0(r3)
; CHECK-NEXT: pld r3, outputf32@got@pcrel(0), 1
; CHECK-NEXT: xsaddsp f0, f0, f1
; CHECK-LABEL: ReadWritef64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputf64@got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel5:
+; CHECK-NEXT: .Lpcrel7:
; CHECK-NEXT: xxsplti32dx vs1, 0, 1075524403
; CHECK-NEXT: xxsplti32dx vs1, 1, 858993459
-; CHECK-NEXT: .reloc .Lpcrel5-8,R_PPC64_PCREL_OPT,.-(.Lpcrel5-8)
+; CHECK-NEXT: .reloc .Lpcrel7-8,R_PPC64_PCREL_OPT,.-(.Lpcrel7-8)
; CHECK-NEXT: lfd f0, 0(r3)
; CHECK-NEXT: pld r3, outputf64@got@pcrel(0), 1
; CHECK-NEXT: xsadddp f0, f0, f1
; CHECK-LABEL: ReadWriteVi32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputVi32@got@pcrel(0), 1
+; CHECK-NEXT: .Lpcrel8:
; CHECK-NEXT: li r4, 45
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: .reloc .Lpcrel8-8,R_PPC64_PCREL_OPT,.-(.Lpcrel8-8)
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: pld r3, outputVi32@got@pcrel(0), 1
; CHECK-NEXT: vinsw v2, r4, 8
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
entry:
%0 = load <4 x i32>, <4 x i32>* @inputVi32, align 16
; CHECK-LABEL: ReadWriteVi64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputVi64@got@pcrel(0), 1
-; CHECK-NEXT: lxvx vs0, 0, r3
+; CHECK-NEXT: .Lpcrel9:
+; CHECK-NEXT: .reloc .Lpcrel9-8,R_PPC64_PCREL_OPT,.-(.Lpcrel9-8)
+; CHECK-NEXT: lxv vs0, 0(r3)
; CHECK-NEXT: pld r3, outputVi64@got@pcrel(0), 1
-; CHECK-NEXT: stxvx vs0, 0, r3
+; CHECK-NEXT: .Lpcrel10:
+; CHECK-NEXT: .reloc .Lpcrel10-8,R_PPC64_PCREL_OPT,.-(.Lpcrel10-8)
+; CHECK-NEXT: stxv vs0, 0(r3)
; CHECK-NEXT: blr
entry:
%0 = load <2 x i64>, <2 x i64>* @inputVi64, align 16
; CHECK-LABEL: ReadWriteArray:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, ArrayIn@got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel6:
+; CHECK-NEXT: .Lpcrel11:
; CHECK-NEXT: pld r4, ArrayOut@got@pcrel(0), 1
-; CHECK-NEXT: .reloc .Lpcrel6-8,R_PPC64_PCREL_OPT,.-(.Lpcrel6-8)
+; CHECK-NEXT: .reloc .Lpcrel11-8,R_PPC64_PCREL_OPT,.-(.Lpcrel11-8)
; CHECK-NEXT: lwz r3, 28(r3)
; CHECK-NEXT: addi r3, r3, 42
; CHECK-NEXT: stw r3, 8(r4)
; CHECK-LABEL: ReadWriteIntPtr:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, IntPtrIn@got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel7:
+; CHECK-NEXT: .Lpcrel12:
; CHECK-NEXT: pld r4, IntPtrOut@got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel8:
-; CHECK-NEXT: .reloc .Lpcrel7-8,R_PPC64_PCREL_OPT,.-(.Lpcrel7-8)
+; CHECK-NEXT: .Lpcrel13:
+; CHECK-NEXT: .reloc .Lpcrel12-8,R_PPC64_PCREL_OPT,.-(.Lpcrel12-8)
; CHECK-NEXT: ld r3, 0(r3)
-; CHECK-NEXT: .reloc .Lpcrel8-8,R_PPC64_PCREL_OPT,.-(.Lpcrel8-8)
+; CHECK-NEXT: .reloc .Lpcrel13-8,R_PPC64_PCREL_OPT,.-(.Lpcrel13-8)
; CHECK-NEXT: ld r4, 0(r4)
; CHECK-NEXT: lwz r5, 216(r3)
; CHECK-NEXT: lwz r3, 48(r3)
; CHECK-LABEL: ReadWriteFuncPtr:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, FuncPtrIn@got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel9:
+; CHECK-NEXT: .Lpcrel14:
; CHECK-NEXT: pld r4, FuncPtrOut@got@pcrel(0), 1
-; CHECK-NEXT: .reloc .Lpcrel9-8,R_PPC64_PCREL_OPT,.-(.Lpcrel9-8)
+; CHECK-NEXT: .reloc .Lpcrel14-8,R_PPC64_PCREL_OPT,.-(.Lpcrel14-8)
; CHECK-NEXT: ld r3, 0(r3)
; CHECK-NEXT: std r3, 0(r4)
; CHECK-NEXT: blr
; CHECK-LABEL: FuncPtrCall:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, FuncPtrIn@got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel10:
-; CHECK-NEXT: .reloc .Lpcrel10-8,R_PPC64_PCREL_OPT,.-(.Lpcrel10-8)
+; CHECK-NEXT: .Lpcrel15:
+; CHECK-NEXT: .reloc .Lpcrel15-8,R_PPC64_PCREL_OPT,.-(.Lpcrel15-8)
; CHECK-NEXT: ld r12, 0(r3)
; CHECK-NEXT: mtctr r12
; CHECK-NEXT: bctr
; CHECK-LABEL: ReadVecElement:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pld r3, inputVi32@got@pcrel(0), 1
-; CHECK-NEXT: .Lpcrel11:
-; CHECK-NEXT: .reloc .Lpcrel11-8,R_PPC64_PCREL_OPT,.-(.Lpcrel11-8)
+; CHECK-NEXT: .Lpcrel16:
+; CHECK-NEXT: .reloc .Lpcrel16-8,R_PPC64_PCREL_OPT,.-(.Lpcrel16-8)
; CHECK-NEXT: lwa r3, 4(r3)
; CHECK-NEXT: blr
entry:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd11@toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd11@toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: lxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt11@toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt11@toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: stxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LABEL: testGlob11PtrPlus0:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, GlobLd11@toc@ha
; CHECK-P9-NEXT: addi r3, r3, GlobLd11@toc@l
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, GlobSt11@toc@ha
; CHECK-P9-NEXT: addi r3, r3, GlobSt11@toc@l
-; CHECK-P9-NEXT: stxvx vs0, 0, r3
+; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: testGlob11PtrPlus0:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd12@toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd12@toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: lxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt12@toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt12@toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, 0, r3
+; CHECK-P10-BE-NEXT: stxv vs0, 0(r3)
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LABEL: testGlob12PtrPlus0:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, GlobLd12@toc@ha
; CHECK-P9-NEXT: addi r3, r3, GlobLd12@toc@l
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, GlobSt12@toc@ha
; CHECK-P9-NEXT: addi r3, r3, GlobSt12@toc@l
-; CHECK-P9-NEXT: stxvx vs0, 0, r3
+; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: testGlob12PtrPlus0:
;
; CHECK-VSX-LABEL: test:
; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: std 3, 48(1)
-; CHECK-VSX-NEXT: std 6, 72(1)
-; CHECK-VSX-NEXT: std 5, 64(1)
-; CHECK-VSX-NEXT: std 4, 56(1)
; CHECK-VSX-NEXT: std 5, -16(1)
; CHECK-VSX-NEXT: std 6, -8(1)
; CHECK-VSX-NEXT: lfd 1, -16(1)
; CHECK-VSX-NEXT: lfd 2, -8(1)
+; CHECK-VSX-NEXT: std 6, 72(1)
+; CHECK-VSX-NEXT: std 5, 64(1)
+; CHECK-VSX-NEXT: std 3, 48(1)
+; CHECK-VSX-NEXT: std 4, 56(1)
; CHECK-VSX-NEXT: blr
;
; CHECK-P9-LABEL: test:
; FIXME: li [[R1:r[0-9]+]], 1
; FIXME: li [[R2:r[0-9]+]], 0
; FIXME: mtvsrdd [[V1:v[0-9]+]], [[R2]], [[R1]]
-; CHECK-P9: lxvx [[V1:v[0-9]+]]
+; CHECK-P9: lxv [[V1:v[0-9]+]]
; CHECK-P9: vadduqm v2, v2, [[V1]]
; CHECK-P9: blr
; CHECK-LE: blr
; CHECK-P9-LABEL: @call_v1i128_increment_by_val
-; CHECK-P9-DAG: lxvx v2
-; CHECK-P9-DAG: lxvx v3
+; CHECK-P9-DAG: lxv v2
+; CHECK-P9-DAG: lxv v3
; CHECK-P9: bl v1i128_increment_by_val
; CHECK-P9: blr
; PC64LE-NEXT: addis 3, 2, .LCPI31_0@toc@ha
; PC64LE-NEXT: xxlxor 3, 3, 3
; PC64LE-NEXT: lfs 0, .LCPI31_0@toc@l(3)
-; PC64LE-NEXT: fcmpo 0, 2, 3
; PC64LE-NEXT: lis 3, -32768
+; PC64LE-NEXT: fcmpo 0, 2, 3
; PC64LE-NEXT: xxlxor 3, 3, 3
; PC64LE-NEXT: fcmpo 1, 1, 0
; PC64LE-NEXT: crand 20, 6, 0
; PC64LE-NEXT: xxlxor 2, 2, 2
; PC64LE-NEXT: li 3, 0
; PC64LE-NEXT: mr 30, 4
-; PC64LE-NEXT: lfsx 31, 0, 29
+; PC64LE-NEXT: lfs 31, 0(29)
; PC64LE-NEXT: xxlxor 4, 4, 4
; PC64LE-NEXT: std 3, 8(4)
; PC64LE-NEXT: fmr 1, 31
; PC64LE-NEXT: fmr 3, 31
-; PC64LE-NEXT: stfdx 31, 0, 4
+; PC64LE-NEXT: stfd 31, 0(4)
; PC64LE-NEXT: bl __gcc_qadd
; PC64LE-NEXT: nop
; PC64LE-NEXT: fmr 3, 1
; PC64LE-NEXT: bl __powitf2
; PC64LE-NEXT: nop
; PC64LE-NEXT: xsrsp 0, 1
-; PC64LE-NEXT: stfsx 0, 0, 29
+; PC64LE-NEXT: stfs 0, 0(29)
; PC64LE-NEXT: stfd 1, -16(30)
; PC64LE-NEXT: stfd 2, -8(30)
; PC64LE-NEXT: addi 1, 1, 80
; PC64LE-NEXT: addis 3, 2, .LCPI36_0@toc@ha
; PC64LE-NEXT: xxlxor 4, 4, 4
; PC64LE-NEXT: fmr 30, 1
-; PC64LE-NEXT: fmr 31, 2
; PC64LE-NEXT: lfs 3, .LCPI36_0@toc@l(3)
+; PC64LE-NEXT: fmr 31, 2
; PC64LE-NEXT: bl __gcc_qadd
; PC64LE-NEXT: nop
; PC64LE-NEXT: cmpdi 30, 0
; PC64LE-NEXT: addis 3, 2, .LCPI38_0@toc@ha
; PC64LE-NEXT: xxlxor 4, 4, 4
; PC64LE-NEXT: fmr 30, 1
-; PC64LE-NEXT: fmr 31, 2
; PC64LE-NEXT: lfd 3, .LCPI38_0@toc@l(3)
+; PC64LE-NEXT: fmr 31, 2
; PC64LE-NEXT: bl __gcc_qadd
; PC64LE-NEXT: nop
; PC64LE-NEXT: cmpdi 30, 0
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count
br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
-; CHECK: stfdx
+; CHECK: stfd
; CHECK: lxvd2x
}
; CHECK-NEXT: .p2align 5
; CHECK-NEXT: .LBB0_1: # %bounds.ok
; CHECK-NEXT: #
-; CHECK-NEXT: lfsx 2, 0, 3
+; CHECK-NEXT: lfs 2, 0(3)
; CHECK-NEXT: xxlxor 1, 1, 1
; CHECK-NEXT: bl fmodf
; CHECK-NEXT: nop
; CHECK-NEXT: addi 30, 30, 1
-; CHECK-NEXT: stfsx 1, 0, 3
+; CHECK-NEXT: stfs 1, 0(3)
; CHECK-NEXT: cmpld 30, 29
; CHECK-NEXT: blt+ 0, .LBB0_1
; CHECK-NEXT: .LBB0_2: # %bounds.fail
; CHECK-NEXT: xvcvsxwsp vs0, v3
; CHECK-NEXT: xxspltw vs0, vs0, 2
; CHECK-NEXT: xvmaddasp vs0, v2, v2
-; CHECK-NEXT: stxvx vs0, 0, r3
+; CHECK-NEXT: stxv vs0, 0(r3)
; CHECK-NEXT: blr
entry:
%.size = load i32, i32* undef
; P9-VSX: # %bb.0: # %entry
; P9-VSX-NEXT: addis r3, r2, .LCPI8_0@toc@ha
; P9-VSX-NEXT: addi r3, r3, .LCPI8_0@toc@l
-; P9-VSX-NEXT: lxvx v3, 0, r3
+; P9-VSX-NEXT: lxv v3, 0(r3)
; P9-VSX-NEXT: addis r3, r2, .LCPI8_1@toc@ha
; P9-VSX-NEXT: addi r3, r3, .LCPI8_1@toc@l
; P9-VSX-NEXT: vslo v4, v2, v3
; P9-VSX-NEXT: vspltb v3, v3, 15
; P9-VSX-NEXT: vsl v3, v4, v3
-; P9-VSX-NEXT: lxvx v4, 0, r3
+; P9-VSX-NEXT: lxv v4, 0(r3)
; P9-VSX-NEXT: vsro v2, v2, v4
; P9-VSX-NEXT: vspltb v4, v4, 15
; P9-VSX-NEXT: vsr v2, v2, v4
; CHECK-NEXT: xxlxor v3, v3, v3
; CHECK-NEXT: li r6, 0
; CHECK-NEXT: addi r5, r5, .LCPI0_0@toc@l
-; CHECK-NEXT: lxvx v2, 0, r5
+; CHECK-NEXT: lxv v2, 0(r5)
; CHECK-NEXT: addis r5, r2, .LCPI0_1@toc@ha
; CHECK-NEXT: addi r5, r5, .LCPI0_1@toc@l
-; CHECK-NEXT: lxvx v4, 0, r5
+; CHECK-NEXT: lxv v4, 0(r5)
; CHECK-NEXT: li r5, 4
; CHECK-NEXT: vperm v0, v3, v5, v2
; CHECK-NEXT: mtctr r5
; P9BE-NEXT: xxlxor v3, v3, v3
; P9BE-NEXT: li r6, 0
; P9BE-NEXT: addi r5, r5, .LCPI0_0@toc@l
-; P9BE-NEXT: lxvx v2, 0, r5
+; P9BE-NEXT: lxv v2, 0(r5)
; P9BE-NEXT: addis r5, r2, .LCPI0_1@toc@ha
; P9BE-NEXT: addi r5, r5, .LCPI0_1@toc@l
-; P9BE-NEXT: lxvx v4, 0, r5
+; P9BE-NEXT: lxv v4, 0(r5)
; P9BE-NEXT: li r5, 4
; P9BE-NEXT: vperm v0, v3, v5, v2
; P9BE-NEXT: mtctr r5
; CHECK-NEXT: lxsd v1, 0(r4)
; CHECK-NEXT: xxlxor v3, v3, v3
; CHECK-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; CHECK-NEXT: lxvx v4, 0, r3
+; CHECK-NEXT: lxv v4, 0(r3)
; CHECK-NEXT: addis r3, r2, .LCPI1_1@toc@ha
; CHECK-NEXT: addi r3, r3, .LCPI1_1@toc@l
-; CHECK-NEXT: lxvx v0, 0, r3
+; CHECK-NEXT: lxv v0, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: vperm v5, v3, v2, v4
; CHECK-NEXT: vperm v2, v3, v2, v0
; P9BE-NEXT: lxsd v1, 0(r4)
; P9BE-NEXT: xxlxor v3, v3, v3
; P9BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; P9BE-NEXT: lxvx v4, 0, r3
+; P9BE-NEXT: lxv v4, 0(r3)
; P9BE-NEXT: addis r3, r2, .LCPI1_1@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI1_1@toc@l
-; P9BE-NEXT: lxvx v0, 0, r3
+; P9BE-NEXT: lxv v0, 0(r3)
; P9BE-NEXT: li r3, 0
; P9BE-NEXT: vperm v5, v3, v2, v4
; P9BE-NEXT: vperm v2, v3, v2, v0
; CHECK-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-NEXT: xxlxor v3, v3, v3
; CHECK-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; CHECK-NEXT: lxvx v4, 0, r3
+; CHECK-NEXT: lxv v4, 0(r3)
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: lxsiwzx v5, r5, r3
; CHECK-NEXT: vperm v2, v2, v3, v4
; CHECK-NEXT: vslw v3, v3, v4
; CHECK-NEXT: vsubuwm v2, v3, v2
; CHECK-NEXT: xxswapd vs0, v2
-; CHECK-NEXT: stxvx vs0, 0, r3
+; CHECK-NEXT: stxv vs0, 0(r3)
; CHECK-NEXT: blr
;
; P9BE-LABEL: test32:
; P9BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; P9BE-NEXT: xxlxor v3, v3, v3
; P9BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; P9BE-NEXT: lxvx v4, 0, r3
+; P9BE-NEXT: lxv v4, 0(r3)
; P9BE-NEXT: li r3, 4
; P9BE-NEXT: lxsiwzx v5, r5, r3
; P9BE-NEXT: vperm v2, v3, v2, v4
; P9BE-NEXT: vslw v3, v3, v4
; P9BE-NEXT: vsubuwm v2, v3, v2
; P9BE-NEXT: xxswapd vs0, v2
-; P9BE-NEXT: stxvx vs0, 0, r3
+; P9BE-NEXT: stxv vs0, 0(r3)
; P9BE-NEXT: blr
entry:
%idx.ext63 = sext i32 %i_pix2 to i64
; CHECK-NEXT: vmrghh v2, v3, v2
; CHECK-NEXT: vsplth v3, v3, 3
; CHECK-NEXT: vmrglw v3, v4, v3
-; CHECK-NEXT: lxvx v4, 0, r3
+; CHECK-NEXT: lxv v4, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: vperm v2, v2, v3, v4
; CHECK-NEXT: xxspltw v3, v2, 2
; P9BE-NEXT: addis r6, r2, .LCPI3_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI3_1@toc@l
; P9BE-NEXT: addi r6, r6, .LCPI3_0@toc@l
-; P9BE-NEXT: lxvx v3, 0, r6
+; P9BE-NEXT: lxv v3, 0(r6)
; P9BE-NEXT: li r6, 0
; P9BE-NEXT: mtvsrwz v4, r6
; P9BE-NEXT: vperm v2, v4, v2, v3
; P9BE-NEXT: vperm v3, v4, v5, v3
; P9BE-NEXT: vsplth v4, v4, 3
; P9BE-NEXT: vmrghw v3, v4, v3
-; P9BE-NEXT: lxvx v4, 0, r3
+; P9BE-NEXT: lxv v4, 0(r3)
; P9BE-NEXT: li r3, 0
; P9BE-NEXT: vperm v2, v3, v2, v4
; P9BE-NEXT: xxspltw v3, v2, 1
; CHECK-NEXT: vmrglw v2, v2, v4
; CHECK-NEXT: vmrglh v3, v3, v4
; CHECK-NEXT: vmrglw v3, v4, v3
-; CHECK-NEXT: lxvx v4, 0, r3
+; CHECK-NEXT: lxv v4, 0(r3)
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: vperm v2, v3, v2, v4
; CHECK-NEXT: xxspltw v3, v2, 2
; P9BE-NEXT: addis r6, r2, .LCPI4_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI4_1@toc@l
; P9BE-NEXT: addi r6, r6, .LCPI4_0@toc@l
-; P9BE-NEXT: lxvx v3, 0, r6
+; P9BE-NEXT: lxv v3, 0(r6)
; P9BE-NEXT: li r6, 0
; P9BE-NEXT: mtvsrwz v4, r6
; P9BE-NEXT: vperm v2, v4, v2, v3
; P9BE-NEXT: vmrghh v3, v3, v4
; P9BE-NEXT: xxspltw v4, v4, 0
; P9BE-NEXT: vmrghw v2, v3, v2
-; P9BE-NEXT: lxvx v3, 0, r3
+; P9BE-NEXT: lxv v3, 0(r3)
; P9BE-NEXT: li r3, 0
; P9BE-NEXT: vperm v2, v4, v2, v3
; P9BE-NEXT: xxspltw v3, v2, 1
; CHECK-P8-LABEL: foof_fmf:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: xsrsqrtesp 0, 2
+; CHECK-P8-NEXT: addis 3, 2, .LCPI3_1@toc@ha
+; CHECK-P8-NEXT: lfs 3, .LCPI3_1@toc@l(3)
; CHECK-P8-NEXT: addis 3, 2, .LCPI3_0@toc@ha
-; CHECK-P8-NEXT: addis 4, 2, .LCPI3_1@toc@ha
-; CHECK-P8-NEXT: lfs 3, .LCPI3_0@toc@l(3)
-; CHECK-P8-NEXT: lfs 4, .LCPI3_1@toc@l(4)
+; CHECK-P8-NEXT: lfs 4, .LCPI3_0@toc@l(3)
; CHECK-P8-NEXT: xsmulsp 2, 2, 0
-; CHECK-P8-NEXT: xsmaddasp 3, 2, 0
-; CHECK-P8-NEXT: xsmulsp 0, 0, 4
-; CHECK-P8-NEXT: xsmulsp 0, 0, 3
+; CHECK-P8-NEXT: xsmulsp 3, 0, 3
+; CHECK-P8-NEXT: xsmaddasp 4, 2, 0
+; CHECK-P8-NEXT: xsmulsp 0, 3, 4
; CHECK-P8-NEXT: xsmuldp 1, 1, 0
; CHECK-P8-NEXT: blr
;
; CHECK-P8-LABEL: goo_fmf:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: xsrsqrtesp 0, 2
+; CHECK-P8-NEXT: addis 3, 2, .LCPI7_1@toc@ha
+; CHECK-P8-NEXT: lfs 3, .LCPI7_1@toc@l(3)
; CHECK-P8-NEXT: addis 3, 2, .LCPI7_0@toc@ha
-; CHECK-P8-NEXT: addis 4, 2, .LCPI7_1@toc@ha
-; CHECK-P8-NEXT: lfs 3, .LCPI7_0@toc@l(3)
-; CHECK-P8-NEXT: lfs 4, .LCPI7_1@toc@l(4)
+; CHECK-P8-NEXT: lfs 4, .LCPI7_0@toc@l(3)
; CHECK-P8-NEXT: xsmulsp 2, 2, 0
-; CHECK-P8-NEXT: xsmaddasp 3, 2, 0
-; CHECK-P8-NEXT: xsmulsp 0, 0, 4
-; CHECK-P8-NEXT: xsmulsp 0, 0, 3
+; CHECK-P8-NEXT: xsmulsp 3, 0, 3
+; CHECK-P8-NEXT: xsmaddasp 4, 2, 0
+; CHECK-P8-NEXT: xsmulsp 0, 3, 4
; CHECK-P8-NEXT: xsmulsp 1, 1, 0
; CHECK-P8-NEXT: blr
;
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: xsrsqrtesp 0, 1
; CHECK-P8-NEXT: addis 3, 2, .LCPI10_0@toc@ha
-; CHECK-P8-NEXT: addis 4, 2, .LCPI10_1@toc@ha
; CHECK-P8-NEXT: lfs 4, .LCPI10_0@toc@l(3)
-; CHECK-P8-NEXT: lfs 5, .LCPI10_1@toc@l(4)
+; CHECK-P8-NEXT: addis 3, 2, .LCPI10_1@toc@ha
+; CHECK-P8-NEXT: lfs 5, .LCPI10_1@toc@l(3)
; CHECK-P8-NEXT: xsmulsp 1, 1, 0
; CHECK-P8-NEXT: xsmaddasp 4, 1, 0
; CHECK-P8-NEXT: xsmulsp 0, 0, 5
; CHECK-P9-NEXT: xvrsqrtesp 0, 35
; CHECK-P9-NEXT: addis 3, 2, .LCPI12_0@toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI12_0@toc@l
-; CHECK-P9-NEXT: lxvx 2, 0, 3
+; CHECK-P9-NEXT: lxv 2, 0(3)
; CHECK-P9-NEXT: addis 3, 2, .LCPI12_1@toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI12_1@toc@l
; CHECK-P9-NEXT: xvmulsp 1, 35, 0
; CHECK-P9-NEXT: xvmaddasp 2, 1, 0
-; CHECK-P9-NEXT: lxvx 1, 0, 3
+; CHECK-P9-NEXT: lxv 1, 0(3)
; CHECK-P9-NEXT: xvmulsp 0, 0, 1
; CHECK-P9-NEXT: xvmulsp 0, 0, 2
; CHECK-P9-NEXT: xvmulsp 34, 34, 0
; CHECK-P8-NEXT: # %bb.1:
; CHECK-P8-NEXT: xsrsqrtesp 0, 1
; CHECK-P8-NEXT: addis 3, 2, .LCPI23_0@toc@ha
-; CHECK-P8-NEXT: addis 4, 2, .LCPI23_1@toc@ha
; CHECK-P8-NEXT: lfs 2, .LCPI23_0@toc@l(3)
-; CHECK-P8-NEXT: lfs 3, .LCPI23_1@toc@l(4)
+; CHECK-P8-NEXT: addis 3, 2, .LCPI23_1@toc@ha
+; CHECK-P8-NEXT: lfs 3, .LCPI23_1@toc@l(3)
; CHECK-P8-NEXT: xsmulsp 1, 1, 0
; CHECK-P8-NEXT: xsmaddasp 2, 1, 0
; CHECK-P8-NEXT: xsmulsp 0, 1, 3
; CHECK-P9-NEXT: xvrsqrtesp 0, 34
; CHECK-P9-NEXT: addis 3, 2, .LCPI25_0@toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI25_0@toc@l
-; CHECK-P9-NEXT: lxvx 2, 0, 3
+; CHECK-P9-NEXT: lxv 2, 0(3)
; CHECK-P9-NEXT: addis 3, 2, .LCPI25_1@toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI25_1@toc@l
; CHECK-P9-NEXT: xvmulsp 1, 34, 0
; CHECK-P9-NEXT: xvmaddasp 2, 1, 0
-; CHECK-P9-NEXT: lxvx 0, 0, 3
+; CHECK-P9-NEXT: lxv 0, 0(3)
; CHECK-P9-NEXT: xvmulsp 0, 1, 0
; CHECK-P9-NEXT: xvmulsp 34, 0, 2
; CHECK-P9-NEXT: blr
; CHECK-P9-NEXT: xvrsqrtedp 0, 34
; CHECK-P9-NEXT: addis 3, 2, .LCPI27_0@toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI27_0@toc@l
-; CHECK-P9-NEXT: lxvx 2, 0, 3
+; CHECK-P9-NEXT: lxv 2, 0(3)
; CHECK-P9-NEXT: addis 3, 2, .LCPI27_1@toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI27_1@toc@l
; CHECK-P9-NEXT: xvmuldp 1, 34, 0
; CHECK-P9-NEXT: xxlor 3, 2, 2
; CHECK-P9-NEXT: xvmaddadp 3, 1, 0
-; CHECK-P9-NEXT: lxvx 1, 0, 3
+; CHECK-P9-NEXT: lxv 1, 0(3)
; CHECK-P9-NEXT: xvmuldp 0, 0, 1
; CHECK-P9-NEXT: xvmuldp 0, 0, 3
; CHECK-P9-NEXT: xvmuldp 3, 34, 0
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: xsmulsp f1, f2, f1
; CHECK-P8-NEXT: addis r3, r2, .LCPI2_0@toc@ha
-; CHECK-P8-NEXT: addis r4, r2, .LCPI2_1@toc@ha
; CHECK-P8-NEXT: xssubsp f0, f3, f4
; CHECK-P8-NEXT: lfs f3, .LCPI2_0@toc@l(r3)
-; CHECK-P8-NEXT: lfs f4, .LCPI2_1@toc@l(r4)
+; CHECK-P8-NEXT: addis r3, r2, .LCPI2_1@toc@ha
+; CHECK-P8-NEXT: lfs f4, .LCPI2_1@toc@l(r3)
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: xsmaddasp f1, f0, f3
; CHECK-P8-NEXT: xsmulsp f0, f2, f4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
;
; CHECK-FMA-LABEL: foo_float_reuse_const:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_0_double_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i64*
%1 = load i64, i64* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_or_double_uint64_t(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint16_double_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to i64*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_disjoint_align16_double_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint32_double_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to i64*
; CHECK-P10-NEXT: xscvuxddp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_double_uint64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvuxddp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_double_uint64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvuxddp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to i64*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_cst_align32_double_uint64_t() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_double_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xscvuxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_double_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvuxddp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 9999900 to i64*), align 8
%conv = uitofp i64 %0 to double
; CHECK-P10-NEXT: xscvuxddp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_double_uint64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvuxddp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_double_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_double_uint64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvuxddp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 1000000000000 to i64*), align 4096
%conv = uitofp i64 %0 to double
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_0_double_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i64*
%1 = load i64, i64* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_or_double_int64_t(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint16_double_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to i64*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_disjoint_align16_double_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint32_double_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to i64*
; CHECK-P10-NEXT: xscvsxddp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_double_int64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvsxddp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_double_int64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvsxddp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to i64*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_cst_align32_double_int64_t() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_double_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xscvsxddp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_double_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvsxddp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 9999900 to i64*), align 8
%conv = sitofp i64 %0 to double
; CHECK-P10-NEXT: xscvsxddp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_double_int64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvsxddp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_double_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxddp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_double_int64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvsxddp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 1000000000000 to i64*), align 4096
%conv = sitofp i64 %0 to double
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_0_double_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_or_double_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint16_double_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_disjoint_align16_double_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfs f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint32_double_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: lfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_double_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_double_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_cst_align32_double_float() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfs f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fpext float %0 to double
; CHECK-P10-NEXT: lfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_double_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_double_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fpext float %0 to double
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_0_double_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_or_double_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint16_double_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_disjoint_align16_double_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_not_disjoint32_double_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: lfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_double_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_double_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local double @ld_cst_align32_double_double() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
ret double %0
; CHECK-P10-NEXT: lfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_double_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_double_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
ret double %0
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_double_float(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_0_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: stfs f0, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
%0 = inttoptr i64 %ptr to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_double_float(i64 %ptr, i8 zeroext %off, double %str) {
-; CHECK-POSTP8-LABEL: st_or1_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: stfs f0, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_double_float(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint16_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: stfs f0, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_double_float(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_disjoint_align16_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: stfs f0, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = fptrunc double %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint32_double_float(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint32_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: stfs f0, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint32_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint32_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
%or = or i64 %ptr, 99999
; CHECK-P8-NEXT: oris r4, r4, 54437
; CHECK-P8-NEXT: ori r4, r4, 4097
; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = fptrunc double %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_double_float(double %str) {
-; CHECK-POSTP8-LABEL: st_cst_align32_double_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: xsrsp f0, f1
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: stfs f0, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_double_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xsrsp f0, f1
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = fptrunc double %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_cst_align64_double_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: xsrsp f0, f1
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align64_double_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: xsrsp f0, f1
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_cst_align64_double_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: xsrsp f0, f1
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = fptrunc double %str to float
store float %conv, float* inttoptr (i64 1000000000000 to float*), align 4096
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_double_double(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_0_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
store double %str, double* %0, align 8
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_double_double(i64 %ptr, i8 zeroext %off, double %str) {
-; CHECK-POSTP8-LABEL: st_or1_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_double_double(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint16_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_double_double(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_disjoint_align16_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: stfd f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: stfd f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint32_double_double(i64 %ptr, double %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint32_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint32_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint32_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: stfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_double_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_double_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_double_double(double %str) {
-; CHECK-POSTP8-LABEL: st_cst_align32_double_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: stfd f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_double_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: stfd f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
store double %str, double* inttoptr (i64 9999900 to double*), align 8
ret void
; CHECK-P10-NEXT: stfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_cst_align64_double_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align64_double_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_cst_align64_double_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: stfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
store double %str, double* inttoptr (i64 1000000000000 to double*), align 4096
ret void
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_0_float_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i64*
%1 = load i64, i64* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_or_float_uint64_t(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint16_float_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to i64*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_disjoint_align16_float_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint32_float_uint64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to i64*
; CHECK-P10-NEXT: xscvuxdsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_float_uint64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvuxdsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_float_uint64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvuxdsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to i64*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_cst_align32_float_uint64_t() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_float_uint64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xscvuxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_float_uint64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvuxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 9999900 to i64*), align 8
%conv = uitofp i64 %0 to float
; CHECK-P10-NEXT: xscvuxdsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_float_uint64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvuxdsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_float_uint64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvuxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_float_uint64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvuxdsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 1000000000000 to i64*), align 4096
%conv = uitofp i64 %0 to float
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_0_float_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to i64*
%1 = load i64, i64* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_or_float_int64_t(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint16_float_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to i64*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_disjoint_align16_float_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint32_float_int64_t(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to i64*
; CHECK-P10-NEXT: xscvsxdsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_float_int64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvsxdsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_float_int64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvsxdsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to i64*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_cst_align32_float_int64_t() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_float_int64_t:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xscvsxdsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_float_int64_t:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvsxdsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 9999900 to i64*), align 8
%conv = sitofp i64 %0 to float
; CHECK-P10-NEXT: xscvsxdsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_float_int64_t:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvsxdsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_float_int64_t:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvsxdsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_float_int64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvsxdsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load i64, i64* inttoptr (i64 1000000000000 to i64*), align 4096
%conv = sitofp i64 %0 to float
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_0_float_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_or_float_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint16_float_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_disjoint_align16_float_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfs f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint32_float_float(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: lfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_float_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_float_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_cst_align32_float_float() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfs f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
ret float %0
; CHECK-P10-NEXT: lfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_float_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_float_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
ret float %0
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_0_float_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_0_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_or_float_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-POSTP8-LABEL: ld_or_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint16_float_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint16_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_disjoint_align16_float_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_disjoint_align16_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: lfd f0, 24(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_not_disjoint32_float_double(i64 %ptr) {
-; CHECK-POSTP8-LABEL: ld_not_disjoint32_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: lfd f0, 0(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: xsrsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_float_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xsrsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_float_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xsrsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local float @ld_cst_align32_float_double() {
-; CHECK-POSTP8-LABEL: ld_cst_align32_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: lfd f0, -27108(r3)
-; CHECK-POSTP8-NEXT: xsrsp f1, f0
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xsrsp f1, f0
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptrunc double %0 to float
; CHECK-P10-NEXT: xsrsp f1, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_float_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xsrsp f1, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xsrsp f1, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_float_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xsrsp f1, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptrunc double %0 to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_float_float(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_0_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: stfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: stfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
store float %str, float* %0, align 4
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_float_float(i64 %ptr, i8 zeroext %off, float %str) {
-; CHECK-POSTP8-LABEL: st_or1_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: stfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: stfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_float_float(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint16_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: stfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: stfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_float_float(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_disjoint_align16_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: stfs f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: stfs f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint32_float_float(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint32_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: stfs f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint32_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint32_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: stfs f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: stfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_float_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_float_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_float_float(float %str) {
-; CHECK-POSTP8-LABEL: st_cst_align32_float_float:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: stfs f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_float_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: stfs f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
store float %str, float* inttoptr (i64 9999900 to float*), align 4
ret void
; CHECK-P10-NEXT: stfs f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_cst_align64_float_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stfs f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align64_float_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_cst_align64_float_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: stfs f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
store float %str, float* inttoptr (i64 1000000000000 to float*), align 4096
ret void
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_float_double(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_0_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
%0 = inttoptr i64 %ptr to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_float_double(i64 %ptr, i8 zeroext %off, float %str) {
-; CHECK-POSTP8-LABEL: st_or1_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: or r3, r4, r3
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_float_double(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint16_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 6
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_float_double(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_disjoint_align16_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-POSTP8-NEXT: stfd f1, 24(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: stfd f1, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = fpext float %str to double
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint32_float_double(i64 %ptr, float %str) {
-; CHECK-POSTP8-LABEL: st_not_disjoint32_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: ori r3, r3, 34463
-; CHECK-POSTP8-NEXT: oris r3, r3, 1
-; CHECK-POSTP8-NEXT: stfd f1, 0(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint32_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint32_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: stfd f1, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
%or = or i64 %ptr, 99999
; CHECK-P10-NEXT: stfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_float_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_float_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = fpext float %str to double
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_float_double(float %str) {
-; CHECK-POSTP8-LABEL: st_cst_align32_float_double:
-; CHECK-POSTP8: # %bb.0: # %entry
-; CHECK-POSTP8-NEXT: lis r3, 153
-; CHECK-POSTP8-NEXT: stfd f1, -27108(r3)
-; CHECK-POSTP8-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_float_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: stfd f1, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = fpext float %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
; CHECK-P10-NEXT: stfd f1, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_cst_align64_float_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stfd f1, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align64_float_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f1, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_cst_align64_float_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: stfd f1, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = fpext float %str to double
store double %conv, double* inttoptr (i64 1000000000000 to double*), align 4096
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_0_int16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_or_int16_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_not_disjoint16_int16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_disjoint_align16_int16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_not_disjoint32_int16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_cst_align32_int16_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptosi float %0 to i16
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptosi float %0 to i16
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_0_int16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_or_int16_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_not_disjoint16_int16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_disjoint_align16_int16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_not_disjoint32_int16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i16 @ld_cst_align32_int16_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptosi double %0 to i16
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptosi double %0 to i16
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_or_uint16_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_not_disjoint16_uint16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_disjoint_align16_uint16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_not_disjoint32_uint16_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_cst_align32_uint16_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptoui float %0 to i16
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptoui float %0 to i16
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_0_uint16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_or_uint16_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_not_disjoint16_uint16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_disjoint_align16_uint16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_not_disjoint32_uint16_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i16 @ld_cst_align32_uint16_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptoui double %0 to i16
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptoui double %0 to i16
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint16_t_float(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to float
%0 = inttoptr i64 %ptr to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint16_t_float(i64 %ptr, i8 zeroext %off, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to float
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint16_t_float(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to float
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint16_t_float(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i16 %str to float
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i16 %str to float
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i16 %str to float
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint16_t_float(i16 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i16 %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint16_t_double(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to double
%0 = inttoptr i64 %ptr to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint16_t_double(i64 %ptr, i8 zeroext %off, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to double
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint16_t_double(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to double
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint16_t_double(i64 %ptr, i16 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i16 %str to double
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i16 %str to double
; CHECK-P10-NEXT: xscvuxddp f0, f0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint64_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i16 %str to double
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint16_t_double(i16 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i16 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i16 %str to double
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int16_t_float(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_0_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to float
%0 = inttoptr i64 %ptr to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int16_t_float(i64 %ptr, i8 zeroext %off, i16 signext %str) {
-; CHECK-P10-LABEL: st_or1_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to float
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int16_t_float(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to float
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int16_t_float(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i16 %str to float
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i16 %str to float
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int16_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i16 %str to float
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int16_t_float(i16 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int16_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int16_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int16_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int16_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i16 %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int16_t_double(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_0_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to double
%0 = inttoptr i64 %ptr to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int16_t_double(i64 %ptr, i8 zeroext %off, i16 signext %str) {
-; CHECK-P10-LABEL: st_or1_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to double
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int16_t_double(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to double
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int16_t_double(i64 %ptr, i16 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i16 %str to double
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i16 %str to double
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int16_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i16 %str to double
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int16_t_double(i16 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int16_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int16_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int16_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int16_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i16 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i16 %str to double
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_0_int32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_or_int32_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_not_disjoint16_int32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_disjoint_align16_int32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_not_disjoint32_int32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_cst_align32_int32_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptosi float %0 to i32
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptosi float %0 to i32
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_0_int32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_or_int32_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_not_disjoint16_int32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_disjoint_align16_int32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_not_disjoint32_int32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_cst_align32_int32_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptosi double %0 to i32
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptosi double %0 to i32
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_0_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_or_uint32_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_not_disjoint16_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_disjoint_align16_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_not_disjoint32_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
-entry:
- %or = or i64 %ptr, 99999
- %0 = inttoptr i64 %or to float*
- %1 = load float, float* %0, align 4
- %conv = fptoui float %1 to i32
- ret i32 %conv
-}
-
-; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_float:
+; CHECK-LABEL: ld_not_disjoint32_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
+entry:
+ %or = or i64 %ptr, 99999
+ %0 = inttoptr i64 %or to float*
+ %1 = load float, float* %0, align 4
+ %conv = fptoui float %1 to i32
+ ret i32 %conv
+}
+
+; Function Attrs: norecurse nounwind readonly uwtable willreturn
+define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_float(i64 %ptr) {
+; CHECK-P10-LABEL: ld_disjoint_align32_uint32_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_cst_align32_uint32_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptoui float %0 to i32
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptoui float %0 to i32
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_0_uint32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_or_uint32_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_not_disjoint16_uint32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_disjoint_align16_uint32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i32 @ld_not_disjoint32_uint32_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
define dso_local zeroext i32 @ld_cst_align16_uint32_t_double() {
; CHECK-LABEL: ld_cst_align16_uint32_t_double:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: lfd f0, 4080(0)
-; CHECK-NEXT: xscvdpuxws f0, f0
-; CHECK-NEXT: mffprwz r3, f0
-; CHECK-NEXT: clrldi r3, r3, 32
-; CHECK-NEXT: blr
-entry:
- %0 = load double, double* inttoptr (i64 4080 to double*), align 16
- %conv = fptoui double %0 to i32
- ret i32 %conv
-}
-
-; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local zeroext i32 @ld_cst_align32_uint32_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpuxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-NEXT: lfd f0, 4080(0)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
+entry:
+ %0 = load double, double* inttoptr (i64 4080 to double*), align 16
+ %conv = fptoui double %0 to i32
+ ret i32 %conv
+}
+
+; Function Attrs: norecurse nounwind readonly uwtable willreturn
+define dso_local zeroext i32 @ld_cst_align32_uint32_t_double() {
+; CHECK-LABEL: ld_cst_align32_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpuxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptoui double %0 to i32
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptoui double %0 to i32
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint32_t_float(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to float
%0 = inttoptr i64 %ptr to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint32_t_float(i64 %ptr, i8 zeroext %off, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to float
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint32_t_float(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to float
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint32_t_float(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i32 %str to float
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i32 %str to float
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i32 %str to float
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint32_t_float(i32 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i32 %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint32_t_double(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to double
%0 = inttoptr i64 %ptr to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint32_t_double(i64 %ptr, i8 zeroext %off, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to double
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint32_t_double(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to double
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint32_t_double(i64 %ptr, i32 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i32 %str to double
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i32 %str to double
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i32 %str to double
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint32_t_double(i32 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i32 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i32 %str to double
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int32_t_float(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_0_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to float
%0 = inttoptr i64 %ptr to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int32_t_float(i64 %ptr, i8 zeroext %off, i32 signext %str) {
-; CHECK-P10-LABEL: st_or1_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to float
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int32_t_float(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to float
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int32_t_float(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i32 %str to float
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i32 %str to float
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int32_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i32 %str to float
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int32_t_float(i32 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int32_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int32_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int32_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int32_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i32 %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int32_t_double(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_0_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to double
%0 = inttoptr i64 %ptr to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int32_t_double(i64 %ptr, i8 zeroext %off, i32 signext %str) {
-; CHECK-P10-LABEL: st_or1_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to double
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int32_t_double(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to double
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int32_t_double(i64 %ptr, i32 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i32 %str to double
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i32 %str to double
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int32_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i32 %str to double
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int32_t_double(i32 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int32_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int32_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int32_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int32_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i32 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i32 %str to double
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_0_int64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_or_int64_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint16_int64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_disjoint_align16_int64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint32_int64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_cst_align32_int64_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptosi float %0 to i64
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptosi float %0 to i64
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_0_int64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_or_int64_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint16_int64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_disjoint_align16_int64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint32_int64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_cst_align32_int64_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptosi double %0 to i64
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptosi double %0 to i64
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_0_uint64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_or_uint64_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint16_uint64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_float:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lfsx f0, 0, r3
+; CHECK-NEXT: lfs f0, 6(r3)
; CHECK-NEXT: xscvdpuxds f0, f0
; CHECK-NEXT: mffprd r3, f0
; CHECK-NEXT: blr
%0 = inttoptr i64 %or to float*
%1 = load float, float* %0, align 4
%conv = fptoui float %1 to i64
- ret i64 %conv
-}
-
-; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local i64 @ld_disjoint_align16_uint64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
-entry:
- %and = and i64 %ptr, -4096
- %or = or i64 %and, 24
- %0 = inttoptr i64 %or to float*
- %1 = load float, float* %0, align 8
- %conv = fptoui float %1 to i64
- ret i64 %conv
-}
-
-; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local i64 @ld_not_disjoint32_uint64_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+ ret i64 %conv
+}
+
+; Function Attrs: norecurse nounwind readonly uwtable willreturn
+define dso_local i64 @ld_disjoint_align16_uint64_t_float(i64 %ptr) {
+; CHECK-LABEL: ld_disjoint_align16_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
+entry:
+ %and = and i64 %ptr, -4096
+ %or = or i64 %and, 24
+ %0 = inttoptr i64 %or to float*
+ %1 = load float, float* %0, align 8
+ %conv = fptoui float %1 to i64
+ ret i64 %conv
+}
+
+; Function Attrs: norecurse nounwind readonly uwtable willreturn
+define dso_local i64 @ld_not_disjoint32_uint64_t_float(i64 %ptr) {
+; CHECK-LABEL: ld_not_disjoint32_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
;
; CHECK-P8-LABEL: ld_cst_unalign32_uint64_t_float:
; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 1
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: lfsx f0, 0, r3
+; CHECK-P8-NEXT: lis r3, 2
+; CHECK-P8-NEXT: lfs f0, -31073(r3)
; CHECK-P8-NEXT: xscvdpuxds f0, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_cst_align32_uint64_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptoui float %0 to i64
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_unalign64_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r3, 29
-; CHECK-P9-NEXT: rldic r3, r3, 35, 24
-; CHECK-P9-NEXT: oris r3, r3, 54437
-; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_unalign64_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r3, 29
-; CHECK-P8-NEXT: rldic r3, r3, 35, 24
-; CHECK-P8-NEXT: oris r3, r3, 54437
-; CHECK-P8-NEXT: ori r3, r3, 4097
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_unalign64_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r3, 29
+; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
+; CHECK-PREP10-NEXT: oris r3, r3, 54437
+; CHECK-PREP10-NEXT: ori r3, r3, 4097
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000001 to float*), align 4
%conv = fptoui float %0 to i64
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptoui float %0 to i64
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_0_uint64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_or_uint64_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint16_uint64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_double:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lfdx f0, 0, r3
+; CHECK-NEXT: lfd f0, 6(r3)
; CHECK-NEXT: xscvdpuxds f0, f0
; CHECK-NEXT: mffprd r3, f0
; CHECK-NEXT: blr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_disjoint_align16_uint64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_not_disjoint32_uint64_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
;
; CHECK-P8-LABEL: ld_cst_unalign32_uint64_t_double:
; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 1
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: lfdx f0, 0, r3
+; CHECK-P8-NEXT: lis r3, 2
+; CHECK-P8-NEXT: lfd f0, -31073(r3)
; CHECK-P8-NEXT: xscvdpuxds f0, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_cst_align32_uint64_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpuxds f0, f0
-; CHECK-P10-NEXT: mffprd r3, f0
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpuxds f0, f0
+; CHECK-NEXT: mffprd r3, f0
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptoui double %0 to i64
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_unalign64_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r3, 29
-; CHECK-P9-NEXT: rldic r3, r3, 35, 24
-; CHECK-P9-NEXT: oris r3, r3, 54437
-; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_unalign64_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r3, 29
-; CHECK-P8-NEXT: rldic r3, r3, 35, 24
-; CHECK-P8-NEXT: oris r3, r3, 54437
-; CHECK-P8-NEXT: ori r3, r3, 4097
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_unalign64_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r3, 29
+; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
+; CHECK-PREP10-NEXT: oris r3, r3, 54437
+; CHECK-PREP10-NEXT: ori r3, r3, 4097
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000001 to double*), align 8
%conv = fptoui double %0 to i64
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpuxds f0, f0
-; CHECK-P9-NEXT: mffprd r3, f0
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpuxds f0, f0
-; CHECK-P8-NEXT: mffprd r3, f0
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptoui double %0 to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_0_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to float
%0 = inttoptr i64 %ptr to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint64_t_float(i64 %ptr, i8 zeroext %off, i64 %str) {
-; CHECK-P10-LABEL: st_or1_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to float
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to float
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i64 %str to float
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i64 %str to float
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprd f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i64 %str to float
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint64_t_float(i64 %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i64 %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_0_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to double
%0 = inttoptr i64 %ptr to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint64_t_double(i64 %ptr, i8 zeroext %off, i64 %str) {
-; CHECK-P10-LABEL: st_or1_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to double
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to double
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i64 %str to double
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i64 %str to double
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprd f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i64 %str to double
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint64_t_double(i64 %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i64 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i64 %str to double
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_0_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to float
%0 = inttoptr i64 %ptr to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int64_t_float(i64 %ptr, i8 zeroext %off, i64 %str) {
-; CHECK-P10-LABEL: st_or1_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to float
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to float
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int64_t_float(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i64 %str to float
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i64 %str to float
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprd f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i64 %str to float
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int64_t_float(i64 %str) {
-; CHECK-P10-LABEL: st_cst_align32_int64_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int64_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int64_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int64_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i64 %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_0_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to double
%0 = inttoptr i64 %ptr to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int64_t_double(i64 %ptr, i8 zeroext %off, i64 %str) {
-; CHECK-P10-LABEL: st_or1_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to double
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to double
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int64_t_double(i64 %ptr, i64 %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i64 %str to double
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i64 %str to double
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprd f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i64 %str to double
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int64_t_double(i64 %str) {
-; CHECK-P10-LABEL: st_cst_align32_int64_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprd f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int64_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprd f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int64_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprd f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int64_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprd f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i64 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i64 %str to double
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_0_int8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_or_int8_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_not_disjoint16_int8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_disjoint_align16_int8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_not_disjoint32_int8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_cst_align32_int8_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptosi float %0 to i8
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptosi float %0 to i8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_0_int8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_or_int8_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_not_disjoint16_int8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_disjoint_align16_int8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_not_disjoint32_int8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_int8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i8 @ld_cst_align32_int8_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: extsw r3, r3
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptosi double %0 to i8
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: extsw r3, r3
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: extsw r3, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_int8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: extsw r3, r3
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptosi double %0 to i8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_0_uint8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to float*
%1 = load float, float* %0, align 4
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_or_uint8_t_float(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_not_disjoint16_uint8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_disjoint_align16_uint8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfs f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfs f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfs f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_not_disjoint32_uint8_t_float(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfs f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfs f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to float*
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to float*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_cst_align32_uint8_t_float() {
-; CHECK-P10-LABEL: ld_cst_align32_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfs f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfs f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_cst_align32_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfs f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 9999900 to float*), align 4
%conv = fptoui float %0 to i8
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_unalign64_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r3, 29
-; CHECK-P9-NEXT: rldic r3, r3, 35, 24
-; CHECK-P9-NEXT: oris r3, r3, 54437
-; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_unalign64_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r3, 29
-; CHECK-P8-NEXT: rldic r3, r3, 35, 24
-; CHECK-P8-NEXT: oris r3, r3, 54437
-; CHECK-P8-NEXT: ori r3, r3, 4097
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_unalign64_uint8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r3, 29
+; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
+; CHECK-PREP10-NEXT: oris r3, r3, 54437
+; CHECK-PREP10-NEXT: ori r3, r3, 4097
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000001 to float*), align 4
%conv = fptoui float %0 to i8
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfs f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfsx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfs f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load float, float* inttoptr (i64 1000000000000 to float*), align 4096
%conv = fptoui float %0 to i8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_0_uint8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_0_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_0_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_0_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_0_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = inttoptr i64 %ptr to double*
%1 = load double, double* %0, align 8
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_or_uint8_t_double(i64 %ptr, i8 zeroext %off) {
-; CHECK-P10-LABEL: ld_or_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_or_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_or_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_or_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%conv = zext i8 %off to i64
%or = or i64 %conv, %ptr
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_not_disjoint16_uint8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint16_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint16_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint16_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint16_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 6
%0 = inttoptr i64 %or to double*
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_disjoint_align16_uint8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_disjoint_align16_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: lfd f0, 24(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_disjoint_align16_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: lfd f0, 24(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_disjoint_align16_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_disjoint_align16_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: lfd f0, 24(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local zeroext i8 @ld_not_disjoint32_uint8_t_double(i64 %ptr) {
-; CHECK-P10-LABEL: ld_not_disjoint32_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: ori r3, r3, 34463
-; CHECK-P10-NEXT: oris r3, r3, 1
-; CHECK-P10-NEXT: lfd f0, 0(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_not_disjoint32_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: oris r3, r3, 1
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint32_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: ori r3, r3, 34463
-; CHECK-P8-NEXT: oris r3, r3, 1
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: ld_not_disjoint32_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: ori r3, r3, 34463
+; CHECK-NEXT: oris r3, r3, 1
+; CHECK-NEXT: lfd f0, 0(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%or = or i64 %ptr, 99999
%0 = inttoptr i64 %or to double*
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_not_disjoint64_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_not_disjoint64_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_not_disjoint64_uint8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%or = or i64 %ptr, 1000000000001
%0 = inttoptr i64 %or to double*
}
; Function Attrs: norecurse nounwind readonly uwtable willreturn
-define dso_local zeroext i8 @ld_cst_align32_uint8_t_double() {
-; CHECK-P10-LABEL: ld_cst_align32_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: lfd f0, -27108(r3)
-; CHECK-P10-NEXT: xscvdpsxws f0, f0
-; CHECK-P10-NEXT: mffprwz r3, f0
-; CHECK-P10-NEXT: clrldi r3, r3, 32
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: ld_cst_align32_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: lfd f0, -27108(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align32_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+define dso_local zeroext i8 @ld_cst_align32_uint8_t_double() {
+; CHECK-LABEL: ld_cst_align32_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: lfd f0, -27108(r3)
+; CHECK-NEXT: xscvdpsxws f0, f0
+; CHECK-NEXT: mffprwz r3, f0
+; CHECK-NEXT: clrldi r3, r3, 32
+; CHECK-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 9999900 to double*), align 8
%conv = fptoui double %0 to i8
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_unalign64_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: li r3, 29
-; CHECK-P9-NEXT: rldic r3, r3, 35, 24
-; CHECK-P9-NEXT: oris r3, r3, 54437
-; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_unalign64_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: li r3, 29
-; CHECK-P8-NEXT: rldic r3, r3, 35, 24
-; CHECK-P8-NEXT: oris r3, r3, 54437
-; CHECK-P8-NEXT: ori r3, r3, 4097
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_unalign64_uint8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r3, 29
+; CHECK-PREP10-NEXT: rldic r3, r3, 35, 24
+; CHECK-PREP10-NEXT: oris r3, r3, 54437
+; CHECK-PREP10-NEXT: ori r3, r3, 4097
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000001 to double*), align 8
%conv = fptoui double %0 to i8
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: ld_cst_align64_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: lis r3, 3725
-; CHECK-P9-NEXT: ori r3, r3, 19025
-; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lfd f0, 0(r3)
-; CHECK-P9-NEXT: xscvdpsxws f0, f0
-; CHECK-P9-NEXT: mffprwz r3, f0
-; CHECK-P9-NEXT: clrldi r3, r3, 32
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: ld_cst_align64_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: lis r3, 3725
-; CHECK-P8-NEXT: ori r3, r3, 19025
-; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: lfdx f0, 0, r3
-; CHECK-P8-NEXT: xscvdpsxws f0, f0
-; CHECK-P8-NEXT: mffprwz r3, f0
-; CHECK-P8-NEXT: clrldi r3, r3, 32
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: ld_cst_align64_uint8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lis r3, 3725
+; CHECK-PREP10-NEXT: ori r3, r3, 19025
+; CHECK-PREP10-NEXT: rldic r3, r3, 12, 24
+; CHECK-PREP10-NEXT: lfd f0, 0(r3)
+; CHECK-PREP10-NEXT: xscvdpsxws f0, f0
+; CHECK-PREP10-NEXT: mffprwz r3, f0
+; CHECK-PREP10-NEXT: clrldi r3, r3, 32
+; CHECK-PREP10-NEXT: blr
entry:
%0 = load double, double* inttoptr (i64 1000000000000 to double*), align 4096
%conv = fptoui double %0 to i8
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint8_t_float(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to float
%0 = inttoptr i64 %ptr to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint8_t_float(i64 %ptr, i8 zeroext %off, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to float
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint8_t_float(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to float
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint8_t_float(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i8 %str to float
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i8 %str to float
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i8 %str to float
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint8_t_float(i8 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i8 %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_uint8_t_double(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_0_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to double
%0 = inttoptr i64 %ptr to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_uint8_t_double(i64 %ptr, i8 zeroext %off, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_or1_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to double
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_uint8_t_double(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to double
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_uint8_t_double(i64 %ptr, i8 zeroext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = uitofp i8 %str to double
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i8 %str to double
; CHECK-P10-NEXT: xscvuxddp f0, f0
; CHECK-P10-NEXT: or r3, r3, r5
; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint64_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: st_not_disjoint64_uint8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwz f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvuxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = uitofp i8 %str to double
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_uint8_t_double(i8 zeroext %str) {
-; CHECK-P10-LABEL: st_cst_align32_uint8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwz f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_uint8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwz f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvuxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_uint8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwz f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvuxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_uint8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwz f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvuxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = uitofp i8 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvuxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = uitofp i8 %str to double
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int8_t_float(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_0_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to float
%0 = inttoptr i64 %ptr to float*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int8_t_float(i64 %ptr, i8 zeroext %off, i8 signext %str) {
-; CHECK-P10-LABEL: st_or1_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to float
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int8_t_float(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to float
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int8_t_float(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i8 %str to float
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i8 %str to float
; CHECK-P10-NEXT: stfs f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfs f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int8_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxdsp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfs f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i8 %str to float
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int8_t_float(i8 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int8_t_float:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfs f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int8_t_float:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxdsp f0, f0
-; CHECK-P9-NEXT: stfs f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int8_t_float:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxdsp f0, f0
-; CHECK-P8-NEXT: stfsx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int8_t_float:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxdsp f0, f0
+; CHECK-NEXT: stfs f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to float
store float %conv, float* inttoptr (i64 9999900 to float*), align 4
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxdsp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfsx f0, 0, r3
+; CHECK-P8-NEXT: stfs f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i8 %str to float
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_0_int8_t_double(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_0_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_0_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_0_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_0_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to double
%0 = inttoptr i64 %ptr to double*
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_or1_int8_t_double(i64 %ptr, i8 zeroext %off, i8 signext %str) {
-; CHECK-P10-LABEL: st_or1_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r5
-; CHECK-P10-NEXT: or r3, r4, r3
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_or1_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r5
-; CHECK-P9-NEXT: or r3, r4, r3
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_or1_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r5
-; CHECK-P8-NEXT: or r3, r4, r3
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_or1_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r5
+; CHECK-NEXT: or r3, r4, r3
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to double
%conv1 = zext i8 %off to i64
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_not_disjoint16_int8_t_double(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_not_disjoint16_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: ori r3, r3, 6
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 0(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_not_disjoint16_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: ori r3, r3, 6
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint16_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: ori r3, r3, 6
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_not_disjoint16_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: ori r3, r3, 6
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 0(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to double
%or = or i64 %ptr, 6
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_int8_t_double(i64 %ptr, i8 signext %str) {
-; CHECK-P10-LABEL: st_disjoint_align16_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, 24(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_disjoint_align16_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, 24(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_disjoint_align16_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P8-NEXT: ori r3, r3, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_disjoint_align16_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r4
+; CHECK-NEXT: rldicr r3, r3, 0, 51
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, 24(r3)
+; CHECK-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%conv = sitofp i8 %str to double
; CHECK-P8-NEXT: ori r3, r3, 34463
; CHECK-P8-NEXT: oris r3, r3, 1
; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i8 %str to double
; CHECK-P10-NEXT: stfd f0, 0(r3)
; CHECK-P10-NEXT: blr
;
-; CHECK-P9-LABEL: st_not_disjoint64_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r4
-; CHECK-P9-NEXT: li r4, 29
-; CHECK-P9-NEXT: rldic r4, r4, 35, 24
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: oris r4, r4, 54437
-; CHECK-P9-NEXT: ori r4, r4, 4097
-; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stfd f0, 0(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_not_disjoint64_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r4
-; CHECK-P8-NEXT: li r4, 29
-; CHECK-P8-NEXT: rldic r4, r4, 35, 24
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: oris r4, r4, 54437
-; CHECK-P8-NEXT: ori r4, r4, 4097
-; CHECK-P8-NEXT: or r3, r3, r4
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-PREP10-LABEL: st_not_disjoint64_int8_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: mtfprwa f0, r4
+; CHECK-PREP10-NEXT: li r4, 29
+; CHECK-PREP10-NEXT: rldic r4, r4, 35, 24
+; CHECK-PREP10-NEXT: xscvsxddp f0, f0
+; CHECK-PREP10-NEXT: oris r4, r4, 54437
+; CHECK-PREP10-NEXT: ori r4, r4, 4097
+; CHECK-PREP10-NEXT: or r3, r3, r4
+; CHECK-PREP10-NEXT: stfd f0, 0(r3)
+; CHECK-PREP10-NEXT: blr
entry:
%conv = sitofp i8 %str to double
%or = or i64 %ptr, 1000000000001
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_align32_int8_t_double(i8 signext %str) {
-; CHECK-P10-LABEL: st_cst_align32_int8_t_double:
-; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: mtfprwa f0, r3
-; CHECK-P10-NEXT: lis r3, 153
-; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfd f0, -27108(r3)
-; CHECK-P10-NEXT: blr
-;
-; CHECK-P9-LABEL: st_cst_align32_int8_t_double:
-; CHECK-P9: # %bb.0: # %entry
-; CHECK-P9-NEXT: mtfprwa f0, r3
-; CHECK-P9-NEXT: lis r3, 153
-; CHECK-P9-NEXT: xscvsxddp f0, f0
-; CHECK-P9-NEXT: stfd f0, -27108(r3)
-; CHECK-P9-NEXT: blr
-;
-; CHECK-P8-LABEL: st_cst_align32_int8_t_double:
-; CHECK-P8: # %bb.0: # %entry
-; CHECK-P8-NEXT: mtfprwa f0, r3
-; CHECK-P8-NEXT: lis r3, 152
-; CHECK-P8-NEXT: ori r3, r3, 38428
-; CHECK-P8-NEXT: xscvsxddp f0, f0
-; CHECK-P8-NEXT: stfdx f0, 0, r3
-; CHECK-P8-NEXT: blr
+; CHECK-LABEL: st_cst_align32_int8_t_double:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mtfprwa f0, r3
+; CHECK-NEXT: lis r3, 153
+; CHECK-NEXT: xscvsxddp f0, f0
+; CHECK-NEXT: stfd f0, -27108(r3)
+; CHECK-NEXT: blr
entry:
%conv = sitofp i8 %str to double
store double %conv, double* inttoptr (i64 9999900 to double*), align 8
; CHECK-P8-NEXT: ori r3, r3, 19025
; CHECK-P8-NEXT: xscvsxddp f0, f0
; CHECK-P8-NEXT: rldic r3, r3, 12, 24
-; CHECK-P8-NEXT: stfdx f0, 0, r3
+; CHECK-P8-NEXT: stfd f0, 0(r3)
; CHECK-P8-NEXT: blr
entry:
%conv = sitofp i8 %str to double
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=P9LE
; RUN: llc -mcpu=pwr9 -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names \
; P9LE-NEXT: lfd f0, 0(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test1:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 0(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test1:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: lfdx f0, 0, r3
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test1:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: lfdx f0, 0, r3
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%0 = load i64, i64* %int64, align 8
%vecins = insertelement <2 x i64> %vec, i64 %0, i32 0
; P9LE-NEXT: lfd f0, 8(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test2:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 8(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test2:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: lfd f0, 8(r3)
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test2:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: lfd f0, 8(r3)
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%arrayidx = getelementptr inbounds i64, i64* %int64, i64 1
%0 = load i64, i64* %arrayidx, align 8
; P9LE-NEXT: lfdx f0, r3, r4
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
-; P9BE-LABEL: s2v_test3
+;
+; P9BE-LABEL: s2v_test3:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: sldi r4, r7, 3
; P9BE-NEXT: lfdx f0, r3, r4
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test3:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: sldi r4, r7, 3
+; P8LE-NEXT: lfdx f0, r3, r4
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test3:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: sldi r4, r7, 3
+; P8BE-NEXT: lfdx f0, r3, r4
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%idxprom = sext i32 %Idx to i64
%arrayidx = getelementptr inbounds i64, i64* %int64, i64 %idxprom
; P9LE-NEXT: lfd f0, 8(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test4:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 8(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test4:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: lfd f0, 8(r3)
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test4:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: lfd f0, 8(r3)
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%arrayidx = getelementptr inbounds i64, i64* %int64, i64 1
%0 = load i64, i64* %arrayidx, align 8
; P9LE-NEXT: lfd f0, 0(r5)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test5:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 0(r5)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
+;
+; P8LE-LABEL: s2v_test5:
+; P8LE: # %bb.0: # %entry
+; P8LE-NEXT: lfdx f0, 0, r5
+; P8LE-NEXT: xxmrghd v2, v2, vs0
+; P8LE-NEXT: blr
+;
+; P8BE-LABEL: s2v_test5:
+; P8BE: # %bb.0: # %entry
+; P8BE-NEXT: lfdx f0, 0, r5
+; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
+; P8BE-NEXT: blr
+
entry:
%0 = load i64, i64* %ptr1, align 8
%vecins = insertelement <2 x i64> %vec, i64 %0, i32 0
; P9LE-NEXT: lfd f0, 0(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f1:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 0(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f1:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfdx f0, 0, r3
+; P8LE-NEXT: lfd f0, 0(r3)
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f1:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfdx f0, 0, r3
+; P8BE-NEXT: lfd f0, 0(r3)
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%0 = load double, double* %f64, align 8
%vecins = insertelement <2 x double> %vec, double %0, i32 0
; P9LE-NEXT: lfd f0, 8(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f2:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 8(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f2:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfd f0, 8(r3)
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f2:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfd f0, 8(r3)
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%arrayidx = getelementptr inbounds double, double* %f64, i64 1
%0 = load double, double* %arrayidx, align 8
; P9LE-NEXT: lfdx f0, r3, r4
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f3:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: sldi r4, r7, 3
; P9BE-NEXT: lfdx f0, r3, r4
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f3:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: sldi r4, r7, 3
; P8LE-NEXT: lfdx f0, r3, r4
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f3:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: sldi r4, r7, 3
; P8BE-NEXT: lfdx f0, r3, r4
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%idxprom = sext i32 %Idx to i64
%arrayidx = getelementptr inbounds double, double* %f64, i64 %idxprom
; P9LE-NEXT: lfd f0, 8(r3)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f4:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 8(r3)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f4:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfd f0, 8(r3)
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f4:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfd f0, 8(r3)
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%arrayidx = getelementptr inbounds double, double* %f64, i64 1
%0 = load double, double* %arrayidx, align 8
; P9LE-NEXT: lfd f0, 0(r5)
; P9LE-NEXT: xxmrghd v2, v2, vs0
; P9LE-NEXT: blr
-
+;
; P9BE-LABEL: s2v_test_f5:
; P9BE: # %bb.0: # %entry
; P9BE-NEXT: lfd f0, 0(r5)
; P9BE-NEXT: xxpermdi v2, vs0, v2, 1
; P9BE-NEXT: blr
-
+;
; P8LE-LABEL: s2v_test_f5:
; P8LE: # %bb.0: # %entry
-; P8LE-NEXT: lfdx f0, 0, r5
+; P8LE-NEXT: lfd f0, 0(r5)
; P8LE-NEXT: xxmrghd v2, v2, vs0
; P8LE-NEXT: blr
-
+;
; P8BE-LABEL: s2v_test_f5:
; P8BE: # %bb.0: # %entry
-; P8BE-NEXT: lfdx f0, 0, r5
+; P8BE-NEXT: lfd f0, 0(r5)
; P8BE-NEXT: xxpermdi v2, vs0, v2, 1
; P8BE-NEXT: blr
+
+
+
entry:
%0 = load double, double* %ptr1, align 8
%vecins = insertelement <2 x double> %vec, double %0, i32 0
;
; P8LE-LABEL: test_liwzx1:
; P8LE: # %bb.0:
-; P8LE-NEXT: lfsx f0, 0, r3
-; P8LE-NEXT: lfsx f1, 0, r4
+; P8LE-NEXT: lfs f0, 0(r3)
+; P8LE-NEXT: lfs f1, 0(r4)
; P8LE-NEXT: xsaddsp f0, f0, f1
-; P8LE-NEXT: stfsx f0, 0, r5
+; P8LE-NEXT: stfs f0, 0(r5)
; P8LE-NEXT: blr
;
; P8BE-LABEL: test_liwzx1:
; P8BE: # %bb.0:
-; P8BE-NEXT: lfsx f0, 0, r3
-; P8BE-NEXT: lfsx f1, 0, r4
+; P8BE-NEXT: lfs f0, 0(r3)
+; P8BE-NEXT: lfs f1, 0(r4)
; P8BE-NEXT: xsaddsp f0, f0, f1
-; P8BE-NEXT: stfsx f0, 0, r5
+; P8BE-NEXT: stfs f0, 0(r5)
; P8BE-NEXT: blr
;
; P8LE-LABEL: test_liwzx2:
; P8LE: # %bb.0:
-; P8LE-NEXT: lfsx f0, 0, r3
-; P8LE-NEXT: lfsx f1, 0, r4
+; P8LE-NEXT: lfs f0, 0(r3)
+; P8LE-NEXT: lfs f1, 0(r4)
; P8LE-NEXT: mr r3, r5
; P8LE-NEXT: xssubsp f0, f0, f1
-; P8LE-NEXT: stfsx f0, 0, r5
+; P8LE-NEXT: stfs f0, 0(r5)
; P8LE-NEXT: blr
;
; P8BE-LABEL: test_liwzx2:
; P8BE: # %bb.0:
-; P8BE-NEXT: lfsx f0, 0, r3
-; P8BE-NEXT: lfsx f1, 0, r4
+; P8BE-NEXT: lfs f0, 0(r3)
+; P8BE-NEXT: lfs f1, 0(r4)
; P8BE-NEXT: mr r3, r5
; P8BE-NEXT: xssubsp f0, f0, f1
-; P8BE-NEXT: stfsx f0, 0, r5
+; P8BE-NEXT: stfs f0, 0(r5)
; P8BE-NEXT: blr
; ISEL-NEXT: addi 4, 4, .LCPI42_0@toc@l
; ISEL-NEXT: addi 3, 3, .LCPI42_1@toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: sel_constants_fadd_constant:
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB42_2
; NO_ISEL-NEXT: .LBB42_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fadd double %sel, 5.1
; ISEL-NEXT: addi 4, 4, .LCPI43_0@toc@l
; ISEL-NEXT: addi 3, 3, .LCPI43_1@toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: sel_constants_fsub_constant:
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB43_2
; NO_ISEL-NEXT: .LBB43_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fsub double %sel, 5.1
; ISEL-NEXT: addi 4, 4, .LCPI44_0@toc@l
; ISEL-NEXT: addi 3, 3, .LCPI44_1@toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: fsub_constant_sel_constants:
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB44_2
; NO_ISEL-NEXT: .LBB44_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fsub double 5.1, %sel
; ISEL-NEXT: addi 4, 4, .LCPI45_0@toc@l
; ISEL-NEXT: addi 3, 3, .LCPI45_1@toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: sel_constants_fmul_constant:
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB45_2
; NO_ISEL-NEXT: .LBB45_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fmul double %sel, 5.1
; ISEL-NEXT: addi 4, 4, .LCPI46_0@toc@l
; ISEL-NEXT: addi 3, 3, .LCPI46_1@toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: sel_constants_fdiv_constant:
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB46_2
; NO_ISEL-NEXT: .LBB46_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fdiv double %sel, 5.1
; ISEL-NEXT: addi 4, 4, .LCPI47_0@toc@l
; ISEL-NEXT: addi 3, 3, .LCPI47_1@toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: fdiv_constant_sel_constants:
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB47_2
; NO_ISEL-NEXT: .LBB47_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = fdiv double 5.1, %sel
; ISEL-NEXT: addi 4, 4, .LCPI49_0@toc@l
; ISEL-NEXT: addi 3, 3, .LCPI49_1@toc@l
; ISEL-NEXT: iselgt 3, 3, 4
-; ISEL-NEXT: lfdx 1, 0, 3
+; ISEL-NEXT: lfd 1, 0(3)
; ISEL-NEXT: blr
;
; NO_ISEL-LABEL: frem_constant_sel_constants:
; NO_ISEL-NEXT: ori 3, 4, 0
; NO_ISEL-NEXT: b .LBB49_2
; NO_ISEL-NEXT: .LBB49_2:
-; NO_ISEL-NEXT: lfdx 1, 0, 3
+; NO_ISEL-NEXT: lfd 1, 0(3)
; NO_ISEL-NEXT: blr
%sel = select i1 %cond, double -4.0, double 23.3
%bo = frem double 5.1, %sel
; P9BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; P9BE-NEXT: ori r4, r4, 63249
; P9BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 6
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r7, r3
; P9BE-NEXT: addis r3, r2, .LCPI3_0@toc@ha
; P9BE-NEXT: ori r4, r4, 37253
; P9BE-NEXT: addi r3, r3, .LCPI3_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 6
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
; P9BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; P9BE-NEXT: ori r4, r4, 30865
; P9BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: extsh r3, r3
;
; CHECK-PWR8-LABEL: dpConv2sdw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 0, 4
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR8-LABEL: dpConv2sw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 0, 4
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR8-LABEL: dpConv2shw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: sth 3, 0(4)
;
; CHECK-PWR8-LABEL: dpConv2sb:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stb 3, 0(4)
;
; CHECK-PWR8-LABEL: spConv2sdw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 0, 4
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR8-LABEL: spConv2sw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 0, 4
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR8-LABEL: spConv2shw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: sth 3, 0(4)
;
; CHECK-PWR8-LABEL: spConv2sb:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stb 3, 0(4)
;
; CHECK-PWR8-LABEL: dpConv2sdw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 3
; CHECK-PWR8-NEXT: xscvdpsxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 4, 3
;
; CHECK-PWR8-LABEL: dpConv2sw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 2
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 4, 3
;
; CHECK-PWR8-LABEL: dpConv2shw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 5, 5, 1
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
;
; CHECK-PWR8-LABEL: dpConv2sb_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stbx 3, 4, 5
;
; CHECK-PWR8-LABEL: spConv2sdw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 3
; CHECK-PWR8-NEXT: xscvdpsxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 4, 3
;
; CHECK-PWR8-LABEL: spConv2sw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 2
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 4, 3
;
; CHECK-PWR8-LABEL: spConv2shw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 5, 5, 1
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
;
; CHECK-PWR8-LABEL: spConv2sb_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stbx 3, 4, 5
;
; CHECK-PWR8-LABEL: dpConv2udw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpuxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 0, 4
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR8-LABEL: dpConv2uw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpuxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 0, 4
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR8-LABEL: dpConv2uhw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: sth 3, 0(4)
;
; CHECK-PWR8-LABEL: dpConv2ub:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stb 3, 0(4)
;
; CHECK-PWR8-LABEL: spConv2udw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpuxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 0, 4
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR8-LABEL: spConv2uw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpuxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 0, 4
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR8-LABEL: spConv2uhw:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: sth 3, 0(4)
;
; CHECK-PWR8-LABEL: spConv2ub:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stb 3, 0(4)
;
; CHECK-PWR8-LABEL: dpConv2udw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 3
; CHECK-PWR8-NEXT: xscvdpuxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 4, 3
;
; CHECK-PWR8-LABEL: dpConv2uw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 2
; CHECK-PWR8-NEXT: xscvdpuxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 4, 3
;
; CHECK-PWR8-LABEL: dpConv2uhw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: sldi 5, 5, 1
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
;
; CHECK-PWR8-LABEL: dpConv2ub_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfdx 0, 0, 3
+; CHECK-PWR8-NEXT: lfd 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stbx 3, 4, 5
;
; CHECK-PWR8-LABEL: spConv2udw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 3
; CHECK-PWR8-NEXT: xscvdpuxds 0, 0
; CHECK-PWR8-NEXT: stxsdx 0, 4, 3
;
; CHECK-PWR8-LABEL: spConv2uw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 3, 5, 2
; CHECK-PWR8-NEXT: xscvdpuxws 0, 0
; CHECK-PWR8-NEXT: stfiwx 0, 4, 3
;
; CHECK-PWR8-LABEL: spConv2uhw_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: sldi 5, 5, 1
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
;
; CHECK-PWR8-LABEL: spConv2ub_x:
; CHECK-PWR8: # %bb.0: # %entry
-; CHECK-PWR8-NEXT: lfsx 0, 0, 3
+; CHECK-PWR8-NEXT: lfs 0, 0(3)
; CHECK-PWR8-NEXT: xscvdpsxws 0, 0
; CHECK-PWR8-NEXT: mffprwz 3, 0
; CHECK-PWR8-NEXT: stbx 3, 4, 5
; CHECK-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-NEXT: addis r4, r2, .LC1@toc@ha
; CHECK-NEXT: ld r3, .LC0@toc@l(r3)
-; CHECK-NEXT: lfdx f0, 0, r3
+; CHECK-NEXT: lxvd2x vs0, 0, r3
; CHECK-NEXT: ld r3, .LC1@toc@l(r4)
-; CHECK-NEXT: lxvd2x vs1, 0, r3
; CHECK-NEXT: xxswapd vs0, vs0
+; CHECK-NEXT: lfd f1, 0(r3)
; CHECK-NEXT: addis r3, r2, .LC2@toc@ha
; CHECK-NEXT: ld r3, .LC2@toc@l(r3)
-; CHECK-NEXT: xxmrgld vs0, vs0, vs1
+; CHECK-NEXT: xxmrghd vs0, vs0, vs1
+; CHECK-NEXT: xxswapd vs0, vs0
; CHECK-NEXT: stxvd2x vs0, 0, r3
; CHECK-NEXT: blr
;
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P9-NEXT: ld r3, .LC0@toc@l(r3)
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LC1@toc@ha
; CHECK-P9-NEXT: ld r3, .LC1@toc@l(r3)
; CHECK-P9-NEXT: lfd f1, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LC2@toc@ha
; CHECK-P9-NEXT: ld r3, .LC2@toc@l(r3)
; CHECK-P9-NEXT: xxmrghd vs0, vs0, vs1
-; CHECK-P9-NEXT: stxvx vs0, 0, r3
+; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P9-NOVECTOR-LABEL: bar0:
; CHECK-P9-NOVECTOR-NEXT: lxvd2x vs0, 0, r3
; CHECK-P9-NOVECTOR-NEXT: addis r3, r2, .LC1@toc@ha
; CHECK-P9-NOVECTOR-NEXT: ld r3, .LC1@toc@l(r3)
-; CHECK-P9-NOVECTOR-NEXT: lfdx f1, 0, r3
+; CHECK-P9-NOVECTOR-NEXT: xxswapd vs0, vs0
+; CHECK-P9-NOVECTOR-NEXT: lfd f1, 0(r3)
; CHECK-P9-NOVECTOR-NEXT: addis r3, r2, .LC2@toc@ha
; CHECK-P9-NOVECTOR-NEXT: ld r3, .LC2@toc@l(r3)
-; CHECK-P9-NOVECTOR-NEXT: xxswapd vs1, vs1
-; CHECK-P9-NOVECTOR-NEXT: xxmrgld vs0, vs1, vs0
+; CHECK-P9-NOVECTOR-NEXT: xxmrghd vs0, vs0, vs1
+; CHECK-P9-NOVECTOR-NEXT: xxswapd vs0, vs0
; CHECK-P9-NOVECTOR-NEXT: stxvd2x vs0, 0, r3
; CHECK-P9-NOVECTOR-NEXT: blr
entry:
; CHECK-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-NEXT: addis r4, r2, .LC1@toc@ha
; CHECK-NEXT: ld r3, .LC0@toc@l(r3)
-; CHECK-NEXT: lfdx f0, 0, r3
+; CHECK-NEXT: lxvd2x vs0, 0, r3
; CHECK-NEXT: ld r3, .LC1@toc@l(r4)
-; CHECK-NEXT: lxvd2x vs1, 0, r3
; CHECK-NEXT: xxswapd vs0, vs0
+; CHECK-NEXT: lfd f1, 0(r3)
; CHECK-NEXT: addis r3, r2, .LC2@toc@ha
; CHECK-NEXT: ld r3, .LC2@toc@l(r3)
; CHECK-NEXT: xxpermdi vs0, vs1, vs0, 1
+; CHECK-NEXT: xxswapd vs0, vs0
; CHECK-NEXT: stxvd2x vs0, 0, r3
; CHECK-NEXT: blr
;
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P9-NEXT: ld r3, .LC0@toc@l(r3)
-; CHECK-P9-NEXT: lxvx vs0, 0, r3
+; CHECK-P9-NEXT: lxv vs0, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LC1@toc@ha
; CHECK-P9-NEXT: ld r3, .LC1@toc@l(r3)
; CHECK-P9-NEXT: lfd f1, 0(r3)
; CHECK-P9-NEXT: addis r3, r2, .LC2@toc@ha
; CHECK-P9-NEXT: ld r3, .LC2@toc@l(r3)
; CHECK-P9-NEXT: xxpermdi vs0, vs1, vs0, 1
-; CHECK-P9-NEXT: stxvx vs0, 0, r3
+; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P9-NOVECTOR-LABEL: bar1:
; CHECK-P9-NOVECTOR-NEXT: lxvd2x vs0, 0, r3
; CHECK-P9-NOVECTOR-NEXT: addis r3, r2, .LC1@toc@ha
; CHECK-P9-NOVECTOR-NEXT: ld r3, .LC1@toc@l(r3)
-; CHECK-P9-NOVECTOR-NEXT: lfdx f1, 0, r3
+; CHECK-P9-NOVECTOR-NEXT: xxswapd vs0, vs0
+; CHECK-P9-NOVECTOR-NEXT: lfd f1, 0(r3)
; CHECK-P9-NOVECTOR-NEXT: addis r3, r2, .LC2@toc@ha
; CHECK-P9-NOVECTOR-NEXT: ld r3, .LC2@toc@l(r3)
-; CHECK-P9-NOVECTOR-NEXT: xxswapd vs1, vs1
-; CHECK-P9-NOVECTOR-NEXT: xxpermdi vs0, vs0, vs1, 1
+; CHECK-P9-NOVECTOR-NEXT: xxpermdi vs0, vs1, vs0, 1
+; CHECK-P9-NOVECTOR-NEXT: xxswapd vs0, vs0
; CHECK-P9-NOVECTOR-NEXT: stxvd2x vs0, 0, r3
; CHECK-P9-NOVECTOR-NEXT: blr
entry:
; CHECK-NEXT: stdu r1, -48(r1)
; CHECK-NEXT: mr r30, r3
; CHECK-NEXT: bl callee
-; CHECK-NEXT: stfdx f1, 0, r30
+; CHECK-NEXT: stfd f1, 0(r30)
; CHECK-NEXT: addi r1, r1, 48
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-NEXT: stdu r1, -48(r1)
; CHECK-NEXT: mr r30, r3
; CHECK-NEXT: bl callee
- ; CHECK-NEXT: stfdx f1, 0, r30
+ ; CHECK-NEXT: stfd f1, 0(r30)
; CHECK-NEXT: addi r1, r1, 48
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
;
; CHECK-P8-LABEL: floatConstantArray:
; CHECK-P8: # %bb.0:
-; CHECK-P8-NEXT: addis 3, 2, FArr@toc@ha
+; CHECK-P8-NEXT: addis 3, 2, FArr@toc@ha+12
; CHECK-P8-NEXT: addis 4, 2, .LCPI2_0@toc@ha
-; CHECK-P8-NEXT: addi 3, 3, FArr@toc@l
+; CHECK-P8-NEXT: lfs 0, FArr@toc@l+12(3)
; CHECK-P8-NEXT: lfs 1, .LCPI2_0@toc@l(4)
-; CHECK-P8-NEXT: lfs 0, 12(3)
; CHECK-P8-NEXT: xsaddsp 1, 0, 1
; CHECK-P8-NEXT: blr
%1 = load float, float* getelementptr inbounds ([10 x float], [10 x float]* @FArr, i64 0, i64 3), align 4
;
; CHECK-P8-LABEL: doubleConstantArray:
; CHECK-P8: # %bb.0:
-; CHECK-P8-NEXT: addis 3, 2, d@toc@ha
+; CHECK-P8-NEXT: addis 3, 2, d@toc@ha+24
; CHECK-P8-NEXT: addis 4, 2, .LCPI4_0@toc@ha
-; CHECK-P8-NEXT: addi 3, 3, d@toc@l
+; CHECK-P8-NEXT: lfd 0, d@toc@l+24(3)
; CHECK-P8-NEXT: lfd 1, .LCPI4_0@toc@l(4)
-; CHECK-P8-NEXT: lfd 0, 24(3)
; CHECK-P8-NEXT: xsadddp 1, 0, 1
; CHECK-P8-NEXT: blr
%1 = load double, double* getelementptr inbounds ([200 x double], [200 x double]* @d, i64 0, i64 3), align 8
; CHECK-P8-NEXT: addis 5, 2, .LCPI5_0@toc@ha
; CHECK-P8-NEXT: addi 3, 3, arr@toc@l
; CHECK-P8-NEXT: ori 4, 4, 32768
-; CHECK-P8-NEXT: lfdx 0, 3, 4
; CHECK-P8-NEXT: lfd 1, .LCPI5_0@toc@l(5)
+; CHECK-P8-NEXT: lfdx 0, 3, 4
; CHECK-P8-NEXT: xsadddp 1, 0, 1
; CHECK-P8-NEXT: blr
%1 = load double, double* getelementptr inbounds ([20000 x double], [20000 x double]* @arr, i64 0, i64 4096), align 8
define void @test_xoaddr(i32* %arr, i32* %arrTo) {
; CHECK-LABEL: test_xoaddr:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: addi r4, r4, 4
-; CHECK-NEXT: lxvx vs0, 0, r3
-; CHECK-NEXT: stxvx vs0, 0, r4
+; CHECK-NEXT: li r5, 8
+; CHECK-NEXT: lxvx vs0, r3, r5
+; CHECK-NEXT: li r3, 4
+; CHECK-NEXT: stxvx vs0, r4, r3
; CHECK-NEXT: blr
entry:
%arrayidx = getelementptr inbounds i32, i32* %arrTo, i64 1
;
; CHECK-VSX-LABEL: foo5:
; CHECK-VSX: # %bb.0: # %entry
-; CHECK-VSX-NEXT: lfdx 0, 0, 3
-; CHECK-VSX-NEXT: stfdx 0, 0, 4
+; CHECK-VSX-NEXT: lfd 0, 0(3)
+; CHECK-VSX-NEXT: stfd 0, 0(4)
; CHECK-VSX-NEXT: blr
entry:
%v = load double, double* %p, align 1
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r4, r3, 16
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r3, r3, 16
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r7, r3, 16
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI3_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI3_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 6
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r3, r3, 16
; P9BE-NEXT: mtvsrwz v4, r3
; P9BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; P9BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; P9BE-NEXT: lxvx v5, 0, r3
+; P9BE-NEXT: lxv v5, 0(r3)
; P9BE-NEXT: li r3, 2
; P9BE-NEXT: vextuhlx r3, r3, v2
; P9BE-NEXT: clrlwi r4, r3, 16
; CHECK-P9-NEXT: addis 3, 2, .LCPI6_0@toc@ha
; CHECK-P9-NEXT: vadduhm 2, 2, 3
; CHECK-P9-NEXT: addi 3, 3, .LCPI6_0@toc@l
-; CHECK-P9-NEXT: lxvx 35, 0, 3
+; CHECK-P9-NEXT: lxv 35, 0(3)
; CHECK-P9-NEXT: vadduhm 2, 2, 3
; CHECK-P9-NEXT: vspltish 3, 1
; CHECK-P9-NEXT: vsrah 2, 2, 3
; CHECK-P9-NEXT: addis r4, r2, .LCPI0_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI0_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI0_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI0_1@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI0_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI0_2@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI0_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI0_3@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI0_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI0_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI0_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI0_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI0_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI0_2@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI0_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI0_3@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v2
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_1@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v2
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v2
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v2
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: lxv v2, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs2, 0(r3)
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-P9-NEXT: lxv v2, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI4_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI4_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI4_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI4_1@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI4_0@toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI4_0@toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI4_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI4_1@toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-P9-NEXT: lxv v2, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v2, v2
; CHECK-P9-NEXT: xvcvsxddp vs0, v2
; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_0@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: xvcvsxddp vs0, v2
; CHECK-BE-NEXT: xscvspdpn f1, vs0
; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
; CHECK-BE-NEXT: xscvspdpn f0, vs0
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: lxv vs1, 0(r4)
; CHECK-BE-NEXT: lxv vs0, 48(r4)
; CHECK-BE-NEXT: addi r5, r5, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
; CHECK-BE-NEXT: xxswapd vs4, vs2
; CHECK-BE-NEXT: xscvspdpn f5, vs2
; CHECK-BE-NEXT: xscvspdpn f1, vs0
; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
; CHECK-BE-NEXT: xscvspdpn f0, vs0
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: lxv vs1, 0(r4)
; CHECK-BE-NEXT: lxv vs0, 48(r4)
; CHECK-BE-NEXT: addi r5, r5, .LCPI7_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: xxsldwi vs3, vs2, vs2, 3
; CHECK-BE-NEXT: xxswapd vs4, vs2
; CHECK-BE-NEXT: xscvspdpn f5, vs2
; CHECK-BE-NEXT: xscvspdpn f1, vs0
; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
; CHECK-BE-NEXT: xscvspdpn f0, vs0
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI3_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
; CHECK-BE-NEXT: xscvspdpn f4, vs4
; CHECK-BE-NEXT: xscvdpsxws f4, f4
; CHECK-BE-NEXT: xscvspdpn f1, vs0
; CHECK-BE-NEXT: xxsldwi vs0, vs0, vs0, 1
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvspdpn f0, vs0
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
; CHECK-BE-NEXT: xscvspdpn f0, vs0
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f0, f0
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs2, vs1, vs1, 3
; CHECK-BE-NEXT: xscvspdpn f2, vs2
; CHECK-BE-NEXT: xscvdpsxws f2, f2
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI7_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI7_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xxsldwi vs4, vs3, vs3, 3
; CHECK-BE-NEXT: xscvspdpn f4, vs4
; CHECK-BE-NEXT: xscvdpsxws f4, f4
; CHECK-BE-NEXT: xscvdpsxws f0, v2
; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: mtvsrwz v4, r3
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f2, f1
; CHECK-BE-NEXT: xxswapd vs1, vs1
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xxswapd vs3, vs3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: lxv vs0, 0(r4)
; CHECK-BE-NEXT: addis r5, r2, .LCPI3_0@toc@ha
; CHECK-BE-NEXT: addi r5, r5, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xscvdpsxws f5, f2
; CHECK-BE-NEXT: xscvdpsxws f6, f1
; CHECK-BE-NEXT: xscvdpsxws f0, v2
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: mtvsrwz v4, r3
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f2, f1
; CHECK-BE-NEXT: xxswapd vs1, vs1
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xxswapd vs3, vs3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: lxv vs0, 0(r4)
; CHECK-BE-NEXT: addis r5, r2, .LCPI7_0@toc@ha
; CHECK-BE-NEXT: addi r5, r5, .LCPI7_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xscvdpsxws f5, f2
; CHECK-BE-NEXT: xscvdpsxws f6, f1
; CHECK-BE-NEXT: xscvdpsxws f0, v2
; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: mtvsrwz v4, r3
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f2, f1
; CHECK-BE-NEXT: xxswapd vs1, vs1
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xxswapd vs3, vs3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: lxv vs6, 96(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI3_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f7, f7
; CHECK-BE-NEXT: mffprwz r3, f8
; CHECK-BE-NEXT: mtvsrwz v3, r3
; CHECK-BE-NEXT: xscvdpsxws f0, v2
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: mffprwz r3, f0
; CHECK-BE-NEXT: xxswapd vs0, v2
; CHECK-BE-NEXT: mtvsrwz v4, r3
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f2, f1
; CHECK-BE-NEXT: xxswapd vs1, vs1
; CHECK-BE-NEXT: xscvdpsxws f1, f1
; CHECK-BE-NEXT: lxv vs2, 32(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI6_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI6_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f4, f3
; CHECK-BE-NEXT: xxswapd vs3, vs3
; CHECK-BE-NEXT: xscvdpsxws f3, f3
; CHECK-BE-NEXT: lxv vs6, 96(r3)
; CHECK-BE-NEXT: addis r3, r2, .LCPI7_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI7_0@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r3
+; CHECK-BE-NEXT: lxv v2, 0(r3)
; CHECK-BE-NEXT: xscvdpsxws f7, f7
; CHECK-BE-NEXT: mffprwz r3, f8
; CHECK-BE-NEXT: mtvsrwz v3, r3
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxwsp v2, v2
; CHECK-BE-NEXT: blr
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-P9-NEXT: xxlxor v5, v5, v5
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-P9-NEXT: lxvx v4, 0, r4
+; CHECK-P9-NEXT: lxv v4, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-P9-NEXT: vperm v0, v5, v3, v4
; CHECK-P9-NEXT: xvcvuxwsp vs0, v0
-; CHECK-P9-NEXT: lxvx v0, 0, r4
+; CHECK-P9-NEXT: lxv v0, 0(r4)
; CHECK-P9-NEXT: vperm v3, v5, v3, v0
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs1, v3
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-BE-NEXT: xxlxor v5, v5, v5
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: vperm v0, v5, v3, v4
; CHECK-BE-NEXT: vperm v4, v5, v2, v4
; CHECK-BE-NEXT: vmrglh v3, v5, v3
; CHECK-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp v2, v2
; CHECK-P9-NEXT: blr
; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp v2, v2
; CHECK-BE-NEXT: blr
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_1@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v2
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_1@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_2@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_3@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_2@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_3@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v2
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-P9-NEXT: xxlxor v5, v5, v5
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-P9-NEXT: lxvx v4, 0, r4
+; CHECK-P9-NEXT: lxv v4, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-P9-NEXT: vperm v0, v5, v3, v4
; CHECK-P9-NEXT: xvcvuxddp vs0, v0
-; CHECK-P9-NEXT: lxvx v0, 0, r4
+; CHECK-P9-NEXT: lxv v0, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2@toc@l
; CHECK-P9-NEXT: vperm v1, v5, v3, v0
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v1
-; CHECK-P9-NEXT: lxvx v1, 0, r4
+; CHECK-P9-NEXT: lxv v1, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-P9-NEXT: vperm v6, v5, v3, v1
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v6
-; CHECK-P9-NEXT: lxvx v6, 0, r4
+; CHECK-P9-NEXT: lxv v6, 0(r4)
; CHECK-P9-NEXT: vperm v3, v5, v3, v6
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v3
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-BE-NEXT: xxlxor v5, v5, v5
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-BE-NEXT: vperm v0, v5, v3, v4
; CHECK-BE-NEXT: xvcvuxddp vs0, v0
-; CHECK-BE-NEXT: lxvx v0, 0, r4
+; CHECK-BE-NEXT: lxv v0, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2@toc@l
; CHECK-BE-NEXT: vperm v1, v5, v3, v0
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v1
-; CHECK-BE-NEXT: lxvx v1, 0, r4
+; CHECK-BE-NEXT: lxv v1, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-BE-NEXT: vperm v6, v5, v3, v1
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v6
-; CHECK-BE-NEXT: lxvx v6, 0, r4
+; CHECK-BE-NEXT: lxv v6, 0(r4)
; CHECK-BE-NEXT: vperm v3, v5, v3, v6
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v3
; CHECK-P9-NEXT: mtvsrwz v2, r3
; CHECK-P9-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v2, v2
; CHECK-P9-NEXT: xvcvsxddp v2, v2
; CHECK-BE-NEXT: mtvsrwz v2, r3
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: xvcvsxddp v2, v2
; CHECK-P9-NEXT: mtvsrd v2, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_1@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_0@toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_0@toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_1@toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_1@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_2@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_3@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsh2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_2@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_3@toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs2, 0(r3)
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-P9-NEXT: addis r5, r2, .LCPI7_0@toc@ha
; CHECK-P9-NEXT: lxv v2, 0(r4)
; CHECK-P9-NEXT: addi r5, r5, .LCPI7_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r5
+; CHECK-P9-NEXT: lxv v3, 0(r5)
; CHECK-P9-NEXT: addis r5, r2, .LCPI7_1@toc@ha
; CHECK-P9-NEXT: addi r5, r5, .LCPI7_1@toc@l
-; CHECK-P9-NEXT: lxvx v5, 0, r5
+; CHECK-P9-NEXT: lxv v5, 0(r5)
; CHECK-P9-NEXT: addis r5, r2, .LCPI7_2@toc@ha
; CHECK-P9-NEXT: vperm v4, v2, v2, v3
; CHECK-P9-NEXT: addi r5, r5, .LCPI7_2@toc@l
; CHECK-P9-NEXT: vextsh2d v4, v4
-; CHECK-P9-NEXT: lxvx v0, 0, r5
+; CHECK-P9-NEXT: lxv v0, 0(r5)
; CHECK-P9-NEXT: addis r5, r2, .LCPI7_3@toc@ha
; CHECK-P9-NEXT: xvcvsxddp vs0, v4
; CHECK-P9-NEXT: vperm v4, v2, v2, v5
; CHECK-P9-NEXT: addi r5, r5, .LCPI7_3@toc@l
-; CHECK-P9-NEXT: lxvx v1, 0, r5
+; CHECK-P9-NEXT: lxv v1, 0(r5)
; CHECK-P9-NEXT: vextsh2d v4, v4
; CHECK-P9-NEXT: xvcvsxddp vs1, v4
; CHECK-P9-NEXT: vperm v4, v2, v2, v0
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_2@toc@ha
; CHECK-BE-NEXT: addi r5, r5, .LCPI7_0@toc@l
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_2@toc@l
-; CHECK-BE-NEXT: lxvx v2, 0, r5
+; CHECK-BE-NEXT: lxv v2, 0(r5)
; CHECK-BE-NEXT: addis r5, r2, .LCPI7_1@toc@ha
; CHECK-BE-NEXT: addi r5, r5, .LCPI7_1@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r5
+; CHECK-BE-NEXT: lxv v3, 0(r5)
; CHECK-BE-NEXT: vperm v0, v5, v4, v2
; CHECK-BE-NEXT: vperm v2, v5, v1, v2
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: vextsh2d v0, v0
; CHECK-BE-NEXT: xvcvsxddp vs3, v2
-; CHECK-BE-NEXT: lxvx v2, 0, r4
+; CHECK-BE-NEXT: lxv v2, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_3@toc@ha
; CHECK-BE-NEXT: xvcvsxddp vs1, v0
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_3@toc@l
; CHECK-BE-NEXT: vextsh2d v3, v3
; CHECK-BE-NEXT: vextsh2d v2, v2
; CHECK-BE-NEXT: xvcvsxddp vs4, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: xvcvsxddp vs6, v2
; CHECK-BE-NEXT: vperm v4, v4, v4, v3
; CHECK-BE-NEXT: vperm v2, v1, v1, v3
; CHECK-P9-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxwsp v2, v2
; CHECK-P9-NEXT: blr
; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxwsp v2, v2
; CHECK-BE-NEXT: blr
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_1@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxwsp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs1, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxwsp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxwsp vs1, v2
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxwsp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxwsp vs3, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxwsp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxwsp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxwsp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxwsp vs3, v2
; CHECK-P9-NEXT: mtvsrwz v2, r3
; CHECK-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI5_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: vextsb2w v2, v2
; CHECK-P9-NEXT: xvcvsxwsp v2, v2
; CHECK-BE-NEXT: mtvsrwz v2, r3
; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: vextsb2w v2, v2
; CHECK-BE-NEXT: xvcvsxwsp v2, v2
; CHECK-P9-NEXT: mtvsrd v2, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_1@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2w v3, v3
; CHECK-P9-NEXT: xvcvsxwsp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2w v2, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_0@toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_1@toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: vextsb2w v3, v3
; CHECK-BE-NEXT: xvcvsxwsp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2w v2, v2
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_1@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2w v3, v3
; CHECK-P9-NEXT: xvcvsxwsp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_2@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2w v3, v3
; CHECK-P9-NEXT: xvcvsxwsp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_3@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsb2w v3, v3
; CHECK-P9-NEXT: xvcvsxwsp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsb2w v2, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: vextsb2w v3, v3
; CHECK-BE-NEXT: xvcvsxwsp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_2@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2w v3, v3
; CHECK-BE-NEXT: xvcvsxwsp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_3@toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsb2w v3, v3
; CHECK-BE-NEXT: xvcvsxwsp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs2, 0(r3)
; CHECK-BE-NEXT: vextsb2w v2, v2
; CHECK-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp v2, v2
; CHECK-P9-NEXT: blr
; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp v2, v2
; CHECK-BE-NEXT: blr
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_1@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI1_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI1_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v2
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_1@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_2@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_3@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_2@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI2_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI2_3@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v2
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-P9-NEXT: xxlxor v4, v4, v4
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: xvcvuxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: xvcvuxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: xvcvuxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_4@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_4@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: xvcvuxddp vs3, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_5@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_5@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs3, 48(r3)
; CHECK-P9-NEXT: xvcvuxddp vs4, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_6@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_6@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs4, 64(r3)
; CHECK-P9-NEXT: xvcvuxddp vs5, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI3_7@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI3_7@toc@l
; CHECK-P9-NEXT: vperm v3, v4, v2, v3
; CHECK-P9-NEXT: stxv vs5, 80(r3)
; CHECK-P9-NEXT: xvcvuxddp vs6, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v4, v2, v3
; CHECK-P9-NEXT: stxv vs6, 96(r3)
; CHECK-P9-NEXT: xvcvuxddp vs7, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: xvcvuxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 0(r3)
; CHECK-BE-NEXT: xvcvuxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs1, 16(r3)
; CHECK-BE-NEXT: xvcvuxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_4@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_4@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs2, 32(r3)
; CHECK-BE-NEXT: xvcvuxddp vs3, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_5@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_5@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs3, 48(r3)
; CHECK-BE-NEXT: xvcvuxddp vs4, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_6@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_6@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs4, 64(r3)
; CHECK-BE-NEXT: xvcvuxddp vs5, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI3_7@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI3_7@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs5, 80(r3)
; CHECK-BE-NEXT: xvcvuxddp vs6, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v4, v2, v3
; CHECK-BE-NEXT: stxv vs6, 96(r3)
; CHECK-BE-NEXT: xvcvuxddp vs7, v2
; CHECK-P9-NEXT: mtvsrwz v2, r3
; CHECK-P9-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r3
+; CHECK-P9-NEXT: lxv v3, 0(r3)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: vextsb2d v2, v2
; CHECK-P9-NEXT: xvcvsxddp v2, v2
; CHECK-BE-NEXT: mtvsrwz v2, r3
; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r3
+; CHECK-BE-NEXT: lxv v3, 0(r3)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: vextsb2d v2, v2
; CHECK-BE-NEXT: xvcvsxddp v2, v2
; CHECK-P9-NEXT: mtvsrwz v2, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_1@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2d v2, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_0@toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_0@toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI5_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI5_1@toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2d v2, v2
; CHECK-P9-NEXT: mtvsrd v2, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_1@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_2@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_3@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsb2d v2, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-BE-NEXT: xxlxor v4, v4, v4
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_0@toc@l
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_1@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs0, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_2@toc@l
; CHECK-BE-NEXT: vperm v3, v4, v2, v3
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs1, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI6_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI6_3@toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs2, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs2, 0(r3)
; CHECK-BE-NEXT: vextsb2d v2, v2
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_0@toc@l
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_1@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_1@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs0, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_2@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_2@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs0, 0(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs1, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_3@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_3@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs1, 16(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs2, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_4@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_4@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs2, 32(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs3, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_5@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_5@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs3, 48(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs4, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_6@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_6@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs4, 64(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs5, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: addis r4, r2, .LCPI7_7@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI7_7@toc@l
; CHECK-P9-NEXT: vperm v3, v2, v2, v3
; CHECK-P9-NEXT: stxv vs5, 80(r3)
; CHECK-P9-NEXT: vextsb2d v3, v3
; CHECK-P9-NEXT: xvcvsxddp vs6, v3
-; CHECK-P9-NEXT: lxvx v3, 0, r4
+; CHECK-P9-NEXT: lxv v3, 0(r4)
; CHECK-P9-NEXT: vperm v2, v2, v2, v3
; CHECK-P9-NEXT: stxv vs6, 96(r3)
; CHECK-P9-NEXT: vextsb2d v2, v2
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_0@toc@ha
; CHECK-BE-NEXT: xxlxor v3, v3, v3
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_0@toc@l
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_1@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_1@toc@l
; CHECK-BE-NEXT: vperm v4, v3, v2, v4
; CHECK-BE-NEXT: vextsb2d v4, v4
; CHECK-BE-NEXT: xvcvsxddp vs0, v4
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_2@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_2@toc@l
; CHECK-BE-NEXT: vperm v4, v3, v2, v4
; CHECK-BE-NEXT: stxv vs0, 16(r3)
; CHECK-BE-NEXT: vextsb2d v4, v4
; CHECK-BE-NEXT: xvcvsxddp vs1, v4
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_3@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_3@toc@l
; CHECK-BE-NEXT: vperm v4, v3, v2, v4
; CHECK-BE-NEXT: stxv vs1, 48(r3)
; CHECK-BE-NEXT: vextsb2d v4, v4
; CHECK-BE-NEXT: xvcvsxddp vs2, v4
-; CHECK-BE-NEXT: lxvx v4, 0, r4
+; CHECK-BE-NEXT: lxv v4, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_4@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_4@toc@l
; CHECK-BE-NEXT: vperm v3, v3, v2, v4
; CHECK-BE-NEXT: stxv vs2, 80(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs3, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_5@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_5@toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs3, 112(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs4, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_6@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_6@toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs4, 0(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs5, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: addis r4, r2, .LCPI7_7@toc@ha
; CHECK-BE-NEXT: addi r4, r4, .LCPI7_7@toc@l
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxv vs5, 32(r3)
; CHECK-BE-NEXT: vextsb2d v3, v3
; CHECK-BE-NEXT: xvcvsxddp vs6, v3
-; CHECK-BE-NEXT: lxvx v3, 0, r4
+; CHECK-BE-NEXT: lxv v3, 0(r4)
; CHECK-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-BE-NEXT: stxv vs6, 64(r3)
; CHECK-BE-NEXT: vextsb2d v2, v2
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: addis 3, 2, .LCPI9_0@toc@ha
; CHECK-LE-NEXT: addi 3, 3, .LCPI9_0@toc@l
-; CHECK-LE-NEXT: lxvx 36, 0, 3
+; CHECK-LE-NEXT: lxv 36, 0(3)
; CHECK-LE-NEXT: addis 3, 2, .LCPI9_1@toc@ha
; CHECK-LE-NEXT: lfs 0, .LCPI9_1@toc@l(3)
; CHECK-LE-NEXT: vperm 2, 3, 2, 4
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI0_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: vextsb2w 2, 2
; CHECK-BE-NEXT: blr
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI1_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI1_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: vextsb2d 2, 2
; CHECK-BE-NEXT: blr
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI2_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI2_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: vextsh2w 2, 2
; CHECK-BE-NEXT: blr
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis 3, 2, .LCPI3_0@toc@ha
; CHECK-BE-NEXT: addi 3, 3, .LCPI3_0@toc@l
-; CHECK-BE-NEXT: lxvx 35, 0, 3
+; CHECK-BE-NEXT: lxv 35, 0(3)
; CHECK-BE-NEXT: vperm 2, 2, 2, 3
; CHECK-BE-NEXT: vextsh2d 2, 2
; CHECK-BE-NEXT: blr
; CHECK-BE-NEXT: extsb 6, 6
; CHECK-BE-NEXT: mtvsrwz 32, 3
; CHECK-BE-NEXT: addi 9, 9, .LCPI11_0@toc@l
-; CHECK-BE-NEXT: lxvx 36, 0, 9
+; CHECK-BE-NEXT: lxv 36, 0(9)
; CHECK-BE-NEXT: vperm 2, 3, 2, 4
; CHECK-BE-NEXT: mtvsrwz 35, 8
; CHECK-BE-NEXT: vperm 3, 5, 3, 4
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 2, 2
; PC64LE9-NEXT: xscvspdpn 3, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: xsdivsp 0, 1, 0
; PC64LE9-NEXT: xxswapd 1, 35
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI7_0@toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 2, 2
; PC64LE9-NEXT: xscvspdpn 3, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: xsmulsp 0, 1, 0
; PC64LE9-NEXT: xxswapd 1, 35
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 2, 2
; PC64LE9-NEXT: xscvspdpn 3, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: xsaddsp 0, 1, 0
; PC64LE9-NEXT: xxswapd 1, 35
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvspdpn 2, 2
; PC64LE9-NEXT: xscvspdpn 3, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: xssubsp 0, 1, 0
; PC64LE9-NEXT: xxswapd 1, 35
; PC64LE9-NEXT: xscvspdpn 1, 1
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI32_0@toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: ld 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI37_0@toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI42_0@toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: addi 3, 3, .LCPI47_0@toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: addi 3, 3, .LCPI52_0@toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: addi 3, 3, .LCPI57_0@toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: addi 3, 3, .LCPI62_0@toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: addi 3, 3, .LCPI67_0@toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: addi 3, 3, .LCPI72_0@toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
; PC64LE9-NEXT: addi 3, 3, .LCPI82_0@toc@l
; PC64LE9-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI87_0@toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lxv 62, 32(1) # 16-byte Folded Reload
; PC64LE9-NEXT: lfd 30, 64(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI92_0@toc@l
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: vmrghw 2, 3, 2
; PC64LE9-NEXT: xscvdpspn 35, 31
; PC64LE9-NEXT: lfd 31, 72(1) # 8-byte Folded Reload
; PC64LE9-NEXT: addi 3, 3, .LCPI97_0@toc@l
; PC64LE9-NEXT: vmrghw 3, 4, 3
; PC64LE9-NEXT: xscvdpsxws 0, 0
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: mffprwz 3, 0
; PC64LE9-NEXT: mtvsrwz 34, 3
; PC64LE9-NEXT: vperm 2, 2, 3, 4
; PC64LE9-NEXT: addis 3, 2, .LCPI105_0@toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI105_0@toc@l
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: mffprwz 3, 0
; PC64LE9-NEXT: mtvsrwz 36, 3
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: addi 3, 3, .LCPI113_0@toc@l
; PC64LE9-NEXT: vmrghw 3, 4, 3
; PC64LE9-NEXT: xscvdpuxws 0, 0
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: mffprwz 3, 0
; PC64LE9-NEXT: mtvsrwz 34, 3
; PC64LE9-NEXT: vperm 2, 2, 3, 4
; PC64LE9-NEXT: addis 3, 2, .LCPI121_0@toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI121_0@toc@l
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: mffprwz 3, 0
; PC64LE9-NEXT: mtvsrwz 36, 3
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: xsrsp 0, 3
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
; PC64LE9-NEXT: xscvdpspn 35, 1
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
entry:
; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI155_0@toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI155_0@toc@l
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 2, 2, 3
; PC64LE9-NEXT: vextsh2d 2, 2
; PC64LE9-NEXT: xvcvsxddp 34, 34
; PC64LE9-NEXT: addi 3, 3, .LCPI161_0@toc@l
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 3, 4, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: mfvsrwz 3, 34
; PC64LE9-NEXT: mtfprwa 0, 3
; PC64LE9-NEXT: xscvsxdsp 0, 0
; PC64LE9-NEXT: mtfprd 0, 5
; PC64LE9-NEXT: xscvsxdsp 0, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
; PC64LE9-NEXT: addis 3, 2, .LCPI173_0@toc@ha
; PC64LE9-NEXT: xxlxor 36, 36, 36
; PC64LE9-NEXT: addi 3, 3, .LCPI173_0@toc@l
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: xvcvuxddp 34, 34
; PC64LE9-NEXT: blr
; PC64LE9-NEXT: addi 3, 3, .LCPI179_0@toc@l
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vmrghw 3, 4, 3
-; PC64LE9-NEXT: lxvx 36, 0, 3
+; PC64LE9-NEXT: lxv 36, 0(3)
; PC64LE9-NEXT: mfvsrwz 3, 34
; PC64LE9-NEXT: mtfprwz 0, 3
; PC64LE9-NEXT: xscvuxdsp 0, 0
; PC64LE9-NEXT: mtfprd 0, 5
; PC64LE9-NEXT: xscvuxdsp 0, 0
; PC64LE9-NEXT: vmrghw 2, 3, 2
-; PC64LE9-NEXT: lxvx 35, 0, 3
+; PC64LE9-NEXT: lxv 35, 0(3)
; PC64LE9-NEXT: xscvdpspn 36, 0
; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: addis 3, 2, .LCPI5_0@toc@ha
; CHECK-P9-NEXT: addi 3, 3, .LCPI5_0@toc@l
-; CHECK-P9-NEXT: lxvx 35, 0, 3
+; CHECK-P9-NEXT: lxv 35, 0(3)
; CHECK-P9-NEXT: vsld 2, 2, 3
; CHECK-P9-NEXT: vsrad 2, 2, 3
; CHECK-P9-NEXT: blr
define dso_local <16 x i8> @ld_unalign16_vector(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_unalign16_vector:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 1
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 1
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_unalign16_vector:
define dso_local <16 x i8> @ld_align16_vector(i8* nocapture readonly %ptr) {
; CHECK-LABEL: ld_align16_vector:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 8
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_align16_vector:
; CHECK-LABEL: ld_or_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_or_vector:
; CHECK-LABEL: ld_not_disjoint16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_not_disjoint16_vector:
; CHECK-LABEL: ld_disjoint_unalign16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 6
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_disjoint_unalign16_vector:
; CHECK-LABEL: ld_disjoint_align16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 24
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: li r4, 24
+; CHECK-NEXT: lxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_disjoint_align16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_not_disjoint32_vector:
; CHECK-P10-NEXT: pli r5, 3567587329
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_not_disjoint64_vector:
; CHECK-P9-NEXT: oris r4, r4, 54437
; CHECK-P9-NEXT: ori r4, r4, 4097
; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_not_disjoint64_vector:
; CHECK-LABEL: ld_cst_unalign16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 255
-; CHECK-NEXT: lxvx v2, 0, r3
+; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_unalign16_vector:
; CHECK-P10-LABEL: ld_cst_unalign32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 99999
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_unalign32_vector:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r3, 1
; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_unalign32_vector:
; CHECK-P10-LABEL: ld_cst_align32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 9999900
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_align32_vector:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r3, 152
; CHECK-P9-NEXT: ori r3, r3, 38428
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_align32_vector:
; CHECK-P10-NEXT: pli r3, 232
; CHECK-P10-NEXT: pli r4, 3567587329
; CHECK-P10-NEXT: rldimi r4, r3, 32, 0
-; CHECK-P10-NEXT: lxvx v2, 0, r4
+; CHECK-P10-NEXT: lxv v2, 0(r4)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_unalign64_vector:
; CHECK-P9-NEXT: rldic r3, r3, 35, 24
; CHECK-P9-NEXT: oris r3, r3, 54437
; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_unalign64_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
-; CHECK-P10-NEXT: lxvx v2, 0, r3
+; CHECK-P10-NEXT: lxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_align64_vector:
; CHECK-P9-NEXT: lis r3, 3725
; CHECK-P9-NEXT: ori r3, r3, 19025
; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: lxvx v2, 0, r3
+; CHECK-P9-NEXT: lxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_cst_align64_vector:
define dso_local void @st_unalign16_vector(i8* nocapture %ptr, <16 x i8> %str) {
; CHECK-LABEL: st_unalign16_vector:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 1
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 1
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_unalign16_vector:
define dso_local void @st_align16_vector(i8* nocapture %ptr, <16 x i8> %str) {
; CHECK-LABEL: st_align16_vector:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addi r3, r3, 8
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 8
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_align16_vector:
; CHECK-LABEL: st_or1_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: or r3, r4, r3
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_or1_vector:
; CHECK-LABEL: st_not_disjoint16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_not_disjoint16_vector:
; CHECK-LABEL: st_disjoint_unalign16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 6
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 6
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_disjoint_unalign16_vector:
; CHECK-LABEL: st_disjoint_align16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: ori r3, r3, 24
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: li r4, 24
+; CHECK-NEXT: stxvx v2, r3, r4
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_disjoint_align16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori r3, r3, 34463
; CHECK-NEXT: oris r3, r3, 1
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_not_disjoint32_vector:
; CHECK-P10-NEXT: pli r5, 3567587329
; CHECK-P10-NEXT: rldimi r5, r4, 32, 0
; CHECK-P10-NEXT: or r3, r3, r5
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_not_disjoint64_vector:
; CHECK-P9-NEXT: oris r4, r4, 54437
; CHECK-P9-NEXT: ori r4, r4, 4097
; CHECK-P9-NEXT: or r3, r3, r4
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_not_disjoint64_vector:
; CHECK-LABEL: st_cst_unalign16_vector:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 255
-; CHECK-NEXT: stxvx v2, 0, r3
+; CHECK-NEXT: stxv v2, 0(r3)
; CHECK-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_unalign16_vector:
; CHECK-P10-LABEL: st_cst_unalign32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 99999
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_unalign32_vector:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r3, 1
; CHECK-P9-NEXT: ori r3, r3, 34463
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_unalign32_vector:
; CHECK-P10-LABEL: st_cst_align32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 9999900
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_align32_vector:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r3, 152
; CHECK-P9-NEXT: ori r3, r3, 38428
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_align32_vector:
; CHECK-P10-NEXT: pli r3, 232
; CHECK-P10-NEXT: pli r4, 3567587329
; CHECK-P10-NEXT: rldimi r4, r3, 32, 0
-; CHECK-P10-NEXT: stxvx v2, 0, r4
+; CHECK-P10-NEXT: stxv v2, 0(r4)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_unalign64_vector:
; CHECK-P9-NEXT: rldic r3, r3, 35, 24
; CHECK-P9-NEXT: oris r3, r3, 54437
; CHECK-P9-NEXT: ori r3, r3, 4097
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_unalign64_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: pli r3, 244140625
; CHECK-P10-NEXT: rldic r3, r3, 12, 24
-; CHECK-P10-NEXT: stxvx v2, 0, r3
+; CHECK-P10-NEXT: stxv v2, 0(r3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_align64_vector:
; CHECK-P9-NEXT: lis r3, 3725
; CHECK-P9-NEXT: ori r3, r3, 19025
; CHECK-P9-NEXT: rldic r3, r3, 12, 24
-; CHECK-P9-NEXT: stxvx v2, 0, r3
+; CHECK-P9-NEXT: stxv v2, 0(r3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_cst_align64_vector:
; PWR9-NEXT: addis 3, 2, .LCPI100_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI100_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI101_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI101_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI102_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI102_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI103_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI103_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI104_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI104_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI105_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI105_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI106_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI106_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI107_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI107_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI108_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI108_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI109_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI109_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI110_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI110_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI111_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI111_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI112_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI112_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI113_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI113_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI114_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI114_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI115_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI115_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI116_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI116_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI117_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI117_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI118_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI118_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI119_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI119_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI120_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI120_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI121_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI121_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI122_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI122_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI123_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI123_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI124_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI124_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI125_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI125_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI126_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI126_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI127_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI127_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI128_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI128_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI129_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI129_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI130_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI130_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI131_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI131_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI132_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI132_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI133_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI133_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI134_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI134_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI135_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI135_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI136_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI136_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI137_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI137_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI138_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI138_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI139_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI139_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI140_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI140_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI141_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI141_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI142_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI142_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI143_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI143_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI144_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI144_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI145_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI145_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI146_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI146_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI147_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI147_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI148_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI148_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI149_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI149_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI150_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI150_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI151_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI151_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI152_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI152_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI153_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI153_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI154_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI154_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI155_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI155_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI156_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI156_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI157_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI157_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI158_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI158_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI159_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI159_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI160_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI160_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI161_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI161_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI162_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI162_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI163_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI163_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI164_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI164_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI165_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI165_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI166_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI166_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI167_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI167_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI168_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI168_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI169_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI169_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI170_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI170_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI171_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI171_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI172_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI172_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI173_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI173_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI174_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI174_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI175_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI175_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI176_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI176_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI177_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI177_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI178_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI178_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI179_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI179_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI180_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI180_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI181_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI181_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI182_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI182_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI183_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI183_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI184_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI184_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI185_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI185_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI186_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI186_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI187_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI187_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI188_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI188_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI189_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI189_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI190_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI190_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI191_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI191_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI192_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI192_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI193_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI193_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI194_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI194_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI195_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI195_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI196_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI196_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI197_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI197_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI198_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI198_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI199_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI199_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI200_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI200_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI201_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI201_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI202_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI202_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI203_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI203_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI204_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI204_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI205_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI205_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI206_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI206_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI207_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI207_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI208_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI208_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI209_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI209_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI210_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI210_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI211_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI211_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI212_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI212_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI213_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI213_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI214_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI214_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI215_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI215_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI216_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI216_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI217_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI217_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI218_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI218_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI219_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI219_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI220_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI220_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI221_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI221_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI222_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI222_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 2, 3
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
; PWR9-NEXT: addis 3, 2, .LCPI223_0@toc@ha
; PWR9-NEXT: vpopcntd 2, 2
; PWR9-NEXT: addi 3, 3, .LCPI223_0@toc@l
-; PWR9-NEXT: lxvx 35, 0, 3
+; PWR9-NEXT: lxv 35, 0(3)
; PWR9-NEXT: vcmpgtud 2, 3, 2
; PWR9-NEXT: blr
%2 = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %0)
%1 = load <16 x i8>, <16 x i8>* @ucb, align 16
%add.i = add <16 x i8> %1, %0
tail call void (...) @sink(<16 x i8> %add.i)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vaddubm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%3 = load <16 x i8>, <16 x i8>* @scb, align 16
%add.i22 = add <16 x i8> %3, %2
tail call void (...) @sink(<16 x i8> %add.i22)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vaddubm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%5 = load <8 x i16>, <8 x i16>* @usb, align 16
%add.i21 = add <8 x i16> %5, %4
tail call void (...) @sink(<8 x i16> %add.i21)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduhm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%7 = load <8 x i16>, <8 x i16>* @ssb, align 16
%add.i20 = add <8 x i16> %7, %6
tail call void (...) @sink(<8 x i16> %add.i20)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduhm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%9 = load <4 x i32>, <4 x i32>* @uib, align 16
%add.i19 = add <4 x i32> %9, %8
tail call void (...) @sink(<4 x i32> %add.i19)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduwm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%11 = load <4 x i32>, <4 x i32>* @sib, align 16
%add.i18 = add <4 x i32> %11, %10
tail call void (...) @sink(<4 x i32> %add.i18)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduwm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%13 = load <2 x i64>, <2 x i64>* @ullb, align 16
%add.i17 = add <2 x i64> %13, %12
tail call void (...) @sink(<2 x i64> %add.i17)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vaddudm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%15 = load <2 x i64>, <2 x i64>* @sllb, align 16
%add.i16 = add <2 x i64> %15, %14
tail call void (...) @sink(<2 x i64> %add.i16)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vaddudm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%17 = load <1 x i128>, <1 x i128>* @uxb, align 16
%add.i15 = add <1 x i128> %17, %16
tail call void (...) @sink(<1 x i128> %add.i15)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduqm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%19 = load <1 x i128>, <1 x i128>* @sxb, align 16
%add.i14 = add <1 x i128> %19, %18
tail call void (...) @sink(<1 x i128> %add.i14)
-; CHECK: lxvx 34, 0, 3
-; CHECK: lxvx 35, 0, 3
+; CHECK: lxv 34, 0(3)
+; CHECK: lxv 35, 0(3)
; CHECK: vadduqm 2, 3, 2
; CHECK: stxv 34,
; CHECK: bl sink
%21 = load <4 x float>, <4 x float>* @vfb, align 16
%add.i13 = fadd <4 x float> %20, %21
tail call void (...) @sink(<4 x float> %add.i13)
-; CHECK: lxvx 0, 0, 3
-; CHECK: lxvx 1, 0, 3
+; CHECK: lxv 0, 0(3)
+; CHECK: lxv 1, 0(3)
; CHECK: xvaddsp 34, 0, 1
; CHECK: stxv 34,
; CHECK: bl sink
%23 = load <2 x double>, <2 x double>* @vdb, align 16
%add.i12 = fadd <2 x double> %22, %23
tail call void (...) @sink(<2 x double> %add.i12)
-; CHECK: lxvx 0, 0, 3
-; CHECK: lxvx 1, 0, 3
+; CHECK: lxv 0, 0(3)
+; CHECK: lxv 1, 0(3)
; CHECK: xvadddp 0, 0, 1
; CHECK: stxv 0,
; CHECK: bl sink
; CHECK-NEXT: ld r3, -8(r1)
; CHECK-NEXT: std r3, -24(r1)
; CHECK-NEXT: ld r3, -16(r1)
-; CHECK-NEXT: std r3, -32(r1)
; CHECK-NEXT: lfd f0, -24(r1)
+; CHECK-NEXT: std r3, -32(r1)
+; CHECK-NEXT: addi r3, r1, -48
; CHECK-NEXT: fcfidus f0, f0
; CHECK-NEXT: stfs f0, -48(r1)
; CHECK-NEXT: lfd f0, -32(r1)
-; CHECK-NEXT: addi r3, r1, -48
; CHECK-NEXT: fcfidus f0, f0
; CHECK-NEXT: stfs f0, -64(r1)
; CHECK-NEXT: lxvw4x v2, 0, r3
; CHECK-REG-NEXT: ld r3, -8(r1)
; CHECK-REG-NEXT: std r3, -24(r1)
; CHECK-REG-NEXT: ld r3, -16(r1)
-; CHECK-REG-NEXT: std r3, -32(r1)
; CHECK-REG-NEXT: lfd f0, -24(r1)
+; CHECK-REG-NEXT: std r3, -32(r1)
+; CHECK-REG-NEXT: addi r3, r1, -48
; CHECK-REG-NEXT: fcfidus f0, f0
; CHECK-REG-NEXT: stfs f0, -48(r1)
; CHECK-REG-NEXT: lfd f0, -32(r1)
-; CHECK-REG-NEXT: addi r3, r1, -48
; CHECK-REG-NEXT: fcfidus f0, f0
; CHECK-REG-NEXT: stfs f0, -64(r1)
; CHECK-REG-NEXT: lxvw4x v2, 0, r3
; CHECK-NEXT: ld r3, -8(r1)
; CHECK-NEXT: std r3, -24(r1)
; CHECK-NEXT: ld r3, -16(r1)
-; CHECK-NEXT: std r3, -32(r1)
; CHECK-NEXT: lfd f0, -24(r1)
+; CHECK-NEXT: std r3, -32(r1)
+; CHECK-NEXT: addi r3, r1, -48
; CHECK-NEXT: fcfids f0, f0
; CHECK-NEXT: stfs f0, -48(r1)
; CHECK-NEXT: lfd f0, -32(r1)
-; CHECK-NEXT: addi r3, r1, -48
; CHECK-NEXT: fcfids f0, f0
; CHECK-NEXT: stfs f0, -64(r1)
; CHECK-NEXT: lxvw4x v2, 0, r3
; CHECK-REG-NEXT: ld r3, -8(r1)
; CHECK-REG-NEXT: std r3, -24(r1)
; CHECK-REG-NEXT: ld r3, -16(r1)
-; CHECK-REG-NEXT: std r3, -32(r1)
; CHECK-REG-NEXT: lfd f0, -24(r1)
+; CHECK-REG-NEXT: std r3, -32(r1)
+; CHECK-REG-NEXT: addi r3, r1, -48
; CHECK-REG-NEXT: fcfids f0, f0
; CHECK-REG-NEXT: stfs f0, -48(r1)
; CHECK-REG-NEXT: lfd f0, -32(r1)
-; CHECK-REG-NEXT: addi r3, r1, -48
; CHECK-REG-NEXT: fcfids f0, f0
; CHECK-REG-NEXT: stfs f0, -64(r1)
; CHECK-REG-NEXT: lxvw4x v2, 0, r3
; CHECK-NEXT: xscvdpuxds f0, f0
; CHECK-NEXT: stfd f0, -32(r1)
; CHECK-NEXT: lfs f0, -48(r1)
-; CHECK-NEXT: xscvdpuxds f0, f0
-; CHECK-NEXT: stfd f0, -24(r1)
; CHECK-NEXT: ld r3, -32(r1)
+; CHECK-NEXT: xscvdpuxds f0, f0
; CHECK-NEXT: std r3, -8(r1)
+; CHECK-NEXT: stfd f0, -24(r1)
; CHECK-NEXT: ld r3, -24(r1)
; CHECK-NEXT: std r3, -16(r1)
; CHECK-NEXT: addi r3, r1, -16
; CHECK-REG-NEXT: xscvdpuxds f0, f0
; CHECK-REG-NEXT: stfd f0, -32(r1)
; CHECK-REG-NEXT: lfs f0, -48(r1)
-; CHECK-REG-NEXT: xscvdpuxds f0, f0
-; CHECK-REG-NEXT: stfd f0, -24(r1)
; CHECK-REG-NEXT: ld r3, -32(r1)
+; CHECK-REG-NEXT: xscvdpuxds f0, f0
; CHECK-REG-NEXT: std r3, -8(r1)
+; CHECK-REG-NEXT: stfd f0, -24(r1)
; CHECK-REG-NEXT: ld r3, -24(r1)
; CHECK-REG-NEXT: std r3, -16(r1)
; CHECK-REG-NEXT: addi r3, r1, -16
; CHECK-NEXT: xscvdpsxds f0, f0
; CHECK-NEXT: stfd f0, -32(r1)
; CHECK-NEXT: lfs f0, -48(r1)
-; CHECK-NEXT: xscvdpsxds f0, f0
-; CHECK-NEXT: stfd f0, -24(r1)
; CHECK-NEXT: ld r3, -32(r1)
+; CHECK-NEXT: xscvdpsxds f0, f0
; CHECK-NEXT: std r3, -8(r1)
+; CHECK-NEXT: stfd f0, -24(r1)
; CHECK-NEXT: ld r3, -24(r1)
; CHECK-NEXT: std r3, -16(r1)
; CHECK-NEXT: addi r3, r1, -16
; CHECK-REG-NEXT: xscvdpsxds f0, f0
; CHECK-REG-NEXT: stfd f0, -32(r1)
; CHECK-REG-NEXT: lfs f0, -48(r1)
-; CHECK-REG-NEXT: xscvdpsxds f0, f0
-; CHECK-REG-NEXT: stfd f0, -24(r1)
; CHECK-REG-NEXT: ld r3, -32(r1)
+; CHECK-REG-NEXT: xscvdpsxds f0, f0
; CHECK-REG-NEXT: std r3, -8(r1)
+; CHECK-REG-NEXT: stfd f0, -24(r1)
; CHECK-REG-NEXT: ld r3, -24(r1)
; CHECK-REG-NEXT: std r3, -16(r1)
; CHECK-REG-NEXT: addi r3, r1, -16
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -relocation-model=static -verify-machineinstrs -mcpu=pwr9 \
; RUN: -mtriple=powerpc64le-unknown-linux-gnu \
-; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-P9
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-power9-vector \
+; RUN: -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-NOINTRIN
+; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mattr=+vsx \
+; RUN: -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-NOINTRIN
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 \
+; RUN: -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-P9
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mattr=-power9-vector \
+; RUN: -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-INTRIN
+; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mattr=+vsx \
+; RUN: -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \
+; RUN: --check-prefixes=CHECK,CHECK-INTRIN
; Function Attrs: nounwind readnone
define <4 x i32> @test1(i8* %a) {
%.lobit = and i32 %1, 1
ret i32 %.lobit
}
+
+; Function Attrs: nounwind readnone
+define <2 x double> @test_lxvd2x(i8* %a) {
+; CHECK-P9-LABEL: test_lxvd2x:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: lxv v2, 0(r3)
+; CHECK-P9-NEXT: blr
+;
+; CHECK-NOINTRIN-LABEL: test_lxvd2x:
+; CHECK-NOINTRIN: # %bb.0: # %entry
+; CHECK-NOINTRIN-NEXT: lxvd2x vs0, 0, r3
+; CHECK-NOINTRIN-NEXT: xxswapd v2, vs0
+; CHECK-NOINTRIN-NEXT: blr
+;
+; CHECK-INTRIN-LABEL: test_lxvd2x:
+; CHECK-INTRIN: # %bb.0: # %entry
+; CHECK-INTRIN-NEXT: lxvd2x v2, 0, r3
+; CHECK-INTRIN-NEXT: blr
+entry:
+ %0 = tail call <2 x double> @llvm.ppc.vsx.lxvd2x(i8* %a)
+ ret <2 x double> %0
+}
+; Function Attrs: nounwind readnone
+declare <2 x double> @llvm.ppc.vsx.lxvd2x(i8*)
+
+; Function Attrs: nounwind readnone
+define void @test_stxvd2x(<2 x double> %a, i8* %b) {
+; CHECK-P9-LABEL: test_stxvd2x:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: stxv v2, 0(r5)
+; CHECK-P9-NEXT: blr
+;
+; CHECK-NOINTRIN-LABEL: test_stxvd2x:
+; CHECK-NOINTRIN: # %bb.0: # %entry
+; CHECK-NOINTRIN-NEXT: xxswapd vs0, v2
+; CHECK-NOINTRIN-NEXT: stxvd2x vs0, 0, r5
+; CHECK-NOINTRIN-NEXT: blr
+;
+; CHECK-INTRIN-LABEL: test_stxvd2x:
+; CHECK-INTRIN: # %bb.0: # %entry
+; CHECK-INTRIN-NEXT: stxvd2x v2, 0, r5
+; CHECK-INTRIN-NEXT: blr
+entry:
+ tail call void @llvm.ppc.vsx.stxvd2x(<2 x double> %a, i8* %b)
+ ret void
+}
+; Function Attrs: nounwind readnone
+declare void @llvm.ppc.vsx.stxvd2x(<2 x double>, i8*)
; CHECK-LABEL: testi0:
; CHECK: # %bb.0:
; CHECK-NEXT: lxvd2x vs0, 0, r3
-; CHECK-NEXT: lfdx f1, 0, r4
+; CHECK-NEXT: lfd f1, 0(r4)
; CHECK-NEXT: xxswapd vs0, vs0
; CHECK-NEXT: xxmrghd v2, vs0, vs1
; CHECK-NEXT: blr
; CHECK-P8-BE-LABEL: testi0:
; CHECK-P8-BE: # %bb.0:
; CHECK-P8-BE-NEXT: lxvd2x vs0, 0, r3
-; CHECK-P8-BE-NEXT: lfdx f1, 0, r4
+; CHECK-P8-BE-NEXT: lfd f1, 0(r4)
; CHECK-P8-BE-NEXT: xxpermdi v2, vs1, vs0, 1
; CHECK-P8-BE-NEXT: blr
;
; CHECK-P9-VECTOR-LABEL: testi0:
; CHECK-P9-VECTOR: # %bb.0:
; CHECK-P9-VECTOR-NEXT: lxvd2x vs0, 0, r3
-; CHECK-P9-VECTOR-NEXT: lfdx f1, 0, r4
+; CHECK-P9-VECTOR-NEXT: lfd f1, 0(r4)
; CHECK-P9-VECTOR-NEXT: xxswapd vs0, vs0
; CHECK-P9-VECTOR-NEXT: xxmrghd v2, vs0, vs1
; CHECK-P9-VECTOR-NEXT: blr
; CHECK-LABEL: testi1:
; CHECK: # %bb.0:
; CHECK-NEXT: lxvd2x vs0, 0, r3
-; CHECK-NEXT: lfdx f1, 0, r4
+; CHECK-NEXT: lfd f1, 0(r4)
; CHECK-NEXT: xxswapd vs0, vs0
; CHECK-NEXT: xxpermdi v2, vs1, vs0, 1
; CHECK-NEXT: blr
; CHECK-P8-BE-LABEL: testi1:
; CHECK-P8-BE: # %bb.0:
; CHECK-P8-BE-NEXT: lxvd2x vs0, 0, r3
-; CHECK-P8-BE-NEXT: lfdx f1, 0, r4
+; CHECK-P8-BE-NEXT: lfd f1, 0(r4)
; CHECK-P8-BE-NEXT: xxmrghd v2, vs0, vs1
; CHECK-P8-BE-NEXT: blr
;
; CHECK-P9-VECTOR-LABEL: testi1:
; CHECK-P9-VECTOR: # %bb.0:
; CHECK-P9-VECTOR-NEXT: lxvd2x vs0, 0, r3
-; CHECK-P9-VECTOR-NEXT: lfdx f1, 0, r4
+; CHECK-P9-VECTOR-NEXT: lfd f1, 0(r4)
; CHECK-P9-VECTOR-NEXT: xxswapd vs0, vs0
; CHECK-P9-VECTOR-NEXT: xxpermdi v2, vs1, vs0, 1
; CHECK-P9-VECTOR-NEXT: blr
;
; CHECK-P8-BE-LABEL: teste0:
; CHECK-P8-BE: # %bb.0:
-; CHECK-P8-BE-NEXT: lfdx f1, 0, r3
+; CHECK-P8-BE-NEXT: lfd f1, 0(r3)
; CHECK-P8-BE-NEXT: blr
;
; CHECK-P9-VECTOR-LABEL: teste0:
store volatile float %conv, float* %ff, align 4
ret void
; CHECK-LABEL: @dblToFloat
-; CHECK: lfdx [[REGLD5:[0-9]+]],
+; CHECK: lfd [[REGLD5:[0-9]+]],
; CHECK: stfs [[REGLD5]],
; CHECK-P9-LABEL: @dblToFloat
; CHECK-P9: lfd [[REGLD5:[0-9]+]],
store volatile double %conv, double* %dd, align 8
ret void
; CHECK-LABEL: @floatToDbl
-; CHECK: lfsx [[REGLD5:[0-9]+]],
+; CHECK: lfs [[REGLD5:[0-9]+]],
; CHECK: stfd [[REGLD5]],
; CHECK-P9-LABEL: @floatToDbl
; CHECK-P9: lfs [[REGLD5:[0-9]+]],
projects / platform / upstream / llvm.git / commitdiff