pan/mdg: Assume SSA

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24432>

diff --git a/src/panfrost/midgard/midgard_address.c b/src/panfrost/midgard/midgard_address.c
index 63aec91..6a24d57 100644 (file)
--- a/src/panfrost/midgard/midgard_address.c
+++ b/src/panfrost/midgard/midgard_address.c
@@ -54,11 +54,6 @@ mir_args_ssa(nir_ssa_scalar s, unsigned count)
    if (count > nir_op_infos[alu->op].num_inputs)
       return false;
 
-   for (unsigned i = 0; i < count; ++i) {
-      if (!alu->src[i].src.is_ssa)
-         return false;
-   }
-
    return true;
 }
 
@@ -242,22 +237,6 @@ mir_set_offset(compiler_context *ctx, midgard_instruction *ins, nir_src *offset,
    /* Sign extend instead of zero extend in case the address is something
     * like `base + offset + 20`, where offset could be negative. */
    bool force_sext = (nir_src_bit_size(*offset) < 64);
-
-   if (!offset->is_ssa) {
-      ins->load_store.bitsize_toggle = true;
-      ins->load_store.arg_comp = seg & 0x3;
-      ins->load_store.arg_reg = (seg >> 2) & 0x7;
-      ins->src[2] = nir_src_index(ctx, offset);
-      ins->src_types[2] = nir_type_uint | nir_src_bit_size(*offset);
-
-      if (force_sext)
-         ins->load_store.index_format = midgard_index_address_s32;
-      else
-         ins->load_store.index_format = midgard_index_address_u64;
-
-      return;
-   }
-
    bool first_free = (seg == LDST_GLOBAL);
 
    struct mir_address match = mir_match_offset(offset->ssa, first_free, true);

diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c
index eb8a442..1208c9d 100644 (file)
--- a/src/panfrost/midgard/midgard_compile.c
+++ b/src/panfrost/midgard/midgard_compile.c
@@ -1055,7 +1055,7 @@ emit_ubo_read(compiler_context *ctx, nir_instr *instr, unsigned dest,
       ins.load_store.index_reg = REGISTER_LDST_ZERO;
    }
 
-   if (indirect_offset && indirect_offset->is_ssa && !indirect_shift)
+   if (indirect_offset && !indirect_shift)
       mir_set_ubo_offset(&ins, indirect_offset, offset);
 
    midgard_pack_ubo_index_imm(&ins.load_store, index);
@@ -1774,18 +1774,14 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr)
          /* Dual-source blend writeout is done by leaving the
           * value in r2 for the blend shader to use. */
          if (~reg_2) {
-            if (instr->src[4].is_ssa) {
-               emit_explicit_constant(ctx, reg_2);
+            emit_explicit_constant(ctx, reg_2);
 
-               unsigned out = make_compiler_temp(ctx);
+            unsigned out = make_compiler_temp(ctx);
 
-               midgard_instruction ins = v_mov(reg_2, out);
-               emit_mir_instruction(ctx, ins);
+            midgard_instruction ins = v_mov(reg_2, out);
+            emit_mir_instruction(ctx, ins);
 
-               ctx->blend_src1 = out;
-            } else {
-               ctx->blend_src1 = reg_2;
-            }
+            ctx->blend_src1 = out;
          }
 
          emit_fragment_store(ctx, reg, reg_z, reg_s, rt, 0);

diff --git a/src/panfrost/midgard/nir_fuse_io_16.c b/src/panfrost/midgard/nir_fuse_io_16.c
index 3519aef..883c6b5 100644 (file)
--- a/src/panfrost/midgard/nir_fuse_io_16.c
+++ b/src/panfrost/midgard/nir_fuse_io_16.c
@@ -68,9 +68,6 @@ nir_fuse_io_16(nir_shader *shader)
             if (nir_intrinsic_component(intr))
                continue;
 
-            if (!intr->dest.is_ssa)
-               continue;
-
             bool valid = true;
 
             nir_foreach_use_including_if(src, &intr->dest.ssa)