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[AArch64] Add test case to show missed opportunity to remove a shift before tbnz...
author
Craig Topper
<craig.topper@intel.com>
Tue, 9 Apr 2019 19:23:37 +0000
(19:23 +0000)
committer
Craig Topper
<craig.topper@intel.com>
Tue, 9 Apr 2019 19:23:37 +0000
(19:23 +0000)
This pattern showed up in D60358 and it was suggested I had a test and fix that separately.
llvm-svn: 358030
llvm/test/CodeGen/AArch64/tbz-tbnz.ll
patch
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diff --git
a/llvm/test/CodeGen/AArch64/tbz-tbnz.ll
b/llvm/test/CodeGen/AArch64/tbz-tbnz.ll
index
8dc943b
..
fa79250
100644
(file)
--- a/
llvm/test/CodeGen/AArch64/tbz-tbnz.ll
+++ b/
llvm/test/CodeGen/AArch64/tbz-tbnz.ll
@@
-359,3
+359,24
@@
then:
end:
ret void
}
+
+define void @test20(i32 %in) {
+; CHECK-LABEL: @test20
+ %shl = shl i32 %in, 3
+ %zext = zext i32 %shl to i64
+ %and = and i64 %zext, 32
+ %cond = icmp eq i64 %and, 0
+ br i1 %cond, label %then, label %end
+
+; FIXME: Should be no lsl
+; CHECK: lsl w8, w0, #3
+; CHECK: tbnz w8, #5
+
+then:
+ call void @t()
+ br label %end
+
+end:
+ ret void
+}
+