intel/blorp: Don't assert aux slices match main slices

This isn't accurate enough for HiZ which can have a discontiguous range
of supported aux slices. This also won't work with the plan to represent
Gen12 CCS as a single slice surface.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index 935a0f5..086bfb1 100644 (file)
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -83,9 +83,6 @@ brw_blorp_surface_info_init(struct blorp_context *blorp,
    if (info->aux_usage != ISL_AUX_USAGE_NONE) {
       info->aux_surf = *surf->aux_surf;
       info->aux_addr = surf->aux_addr;
-      assert(level < info->aux_surf.levels);
-      assert(layer < MAX2(info->aux_surf.logical_level0_px.depth >> level,
-                          info->aux_surf.logical_level0_px.array_len));
    }
 
    info->clear_color = surf->clear_color;

diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index c5ae13a..7f5ae8a 100644 (file)
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -333,11 +333,6 @@ blorp_fast_clear(struct blorp_batch *batch,
                  uint32_t level, uint32_t start_layer, uint32_t num_layers,
                  uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1)
 {
-   /* Ensure that all layers undergoing the clear have an auxiliary buffer. */
-   assert(start_layer + num_layers <=
-          MAX2(surf->aux_surf->logical_level0_px.depth >> level,
-               surf->aux_surf->logical_level0_px.array_len));
-
    struct blorp_params params;
    blorp_params_init(&params);
    params.num_layers = num_layers;