nmi[0] = qdev_get_gpio_in(dev, 30);
nmi[1] = qdev_get_gpio_in(dev, 31);
- etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);
+ etraxfs_dmac = etraxfs_dmac_init(0x30000000, 10);
for (i = 0; i < 10; i++) {
/* On ETRAX, odd numbered channels are inputs. */
etraxfs_dmac_connect(etraxfs_dmac, i, irq + 7 + i, i & 1);
}
/* Add the two ethernet blocks. */
- eth[0] = etraxfs_eth_init(&nd_table[0], env, 0x30034000, 1);
+ eth[0] = etraxfs_eth_init(&nd_table[0], 0x30034000, 1);
if (nb_nics > 1)
- eth[1] = etraxfs_eth_init(&nd_table[1], env, 0x30036000, 2);
+ eth[1] = etraxfs_eth_init(&nd_table[1], 0x30036000, 2);
/* The DMA Connector block is missing, hardwire things for now. */
etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);
nmi[0] = qdev_get_gpio_in(dev, 30);
nmi[1] = qdev_get_gpio_in(dev, 31);
- etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);
+ etraxfs_dmac = etraxfs_dmac_init(0x30000000, 10);
for (i = 0; i < 10; i++) {
/* On ETRAX, odd numbered channels are inputs. */
etraxfs_dmac_connect(etraxfs_dmac, i, irq + 7 + i, i & 1);
}
/* Add the two ethernet blocks. */
- eth[0] = etraxfs_eth_init(&nd_table[0], env, 0x30034000, 1);
+ eth[0] = etraxfs_eth_init(&nd_table[0], 0x30034000, 1);
if (nb_nics > 1)
- eth[1] = etraxfs_eth_init(&nd_table[1], env, 0x30036000, 2);
+ eth[1] = etraxfs_eth_init(&nd_table[1], 0x30036000, 2);
/* The DMA Connector block is missing, hardwire things for now. */
etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);
#include "etraxfs_dma.h"
qemu_irq *cris_pic_init_cpu(CPUState *env);
-void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
- target_phys_addr_t base, int phyaddr);
+void *etraxfs_eth_init(NICInfo *nd, target_phys_addr_t base, int phyaddr);
struct fs_dma_ctrl
{
int map;
- CPUState *env;
-
int nr_channels;
struct fs_dma_channel *channels;
qemu_bh_schedule_idle(etraxfs_dmac->bh);
}
-void *etraxfs_dmac_init(CPUState *env,
- target_phys_addr_t base, int nr_channels)
+void *etraxfs_dmac_init(target_phys_addr_t base, int nr_channels)
{
struct fs_dma_ctrl *ctrl = NULL;
ctrl->bh = qemu_bh_new(DMA_run, ctrl);
- ctrl->env = env;
ctrl->nr_channels = nr_channels;
ctrl->channels = qemu_mallocz(sizeof ctrl->channels[0] * nr_channels);
} client;
};
-void *etraxfs_dmac_init(CPUState *env, target_phys_addr_t base,
- int nr_channels);
+void *etraxfs_dmac_init(target_phys_addr_t base, int nr_channels);
void etraxfs_dmac_connect(void *opaque, int channel, qemu_irq *line,
int input);
void etraxfs_dmac_connect_client(void *opaque, int c,
struct fs_eth
{
- CPUState *env;
VLANClientState *vc;
int ethregs;
qemu_free(eth);
}
-void *etraxfs_eth_init(NICInfo *nd, CPUState *env,
- target_phys_addr_t base, int phyaddr)
+void *etraxfs_eth_init(NICInfo *nd, target_phys_addr_t base, int phyaddr)
{
struct etraxfs_dma_client *dma = NULL;
struct fs_eth *eth = NULL;
qemu_check_nic_model(nd, "fseth");
dma = qemu_mallocz(sizeof *dma * 2);
-
eth = qemu_mallocz(sizeof *eth);
dma[0].client.push = eth_tx_push;
dma[1].client.opaque = eth;
dma[1].client.pull = NULL;
- eth->env = env;
eth->dma_out = dma;
eth->dma_in = dma + 1;