r600g: set VGT_ENHANCE=4 on R7xx

This is a golden setting on RV740, but there is a hw bug which recommends
setting it on all R7xx chipsets.

Acked-by: Michel Dänzer <michel.daenzer@amd.com>

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 3d1700f..36f7750 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -2272,6 +2272,7 @@ void r600_init_atom_start_cs(struct r600_context *rctx)
        r600_store_config_reg(cb, R_009714_VC_ENHANCE, 0);
 
        if (rctx->b.chip_class >= R700) {
+               r600_store_context_reg(cb, R_028A50_VGT_ENHANCE, 4);
                r600_store_config_reg(cb, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x00004000);
                r600_store_config_reg(cb, R_009830_DB_DEBUG, 0);
                r600_store_config_reg(cb, R_009838_DB_WATERMARKS, 0x00420204);

diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h
index 17568ab..3cf7b88 100644 (file)
--- a/src/gallium/drivers/r600/r600d.h
+++ b/src/gallium/drivers/r600/r600d.h
@@ -889,6 +889,7 @@
 #define   S_028A40_CUT_MODE(x)                         (((x) & 0x3) << 3)
 #define   G_028A40_CUT_MODE(x)                         (((x) >> 3) & 0x3)
 #define   C_028A40_CUT_MODE                            0xFFFFFFE7
+#define R_028A50_VGT_ENHANCE                         0x028A50
 #define R_028A6C_VGT_GS_OUT_PRIM_TYPE                0x028A6C
 #define   S_028A6C_OUTPRIM_TYPE(x)                     (((x) & 0x3F) << 0)
 #define     V_028A6C_OUTPRIM_TYPE_POINTLIST            0