case X86::VCMPPSZrmi: NewOpc = X86::VCMPPSZrmi_alt; break;
case X86::VCMPPSZrri: NewOpc = X86::VCMPPSZrri_alt; break;
case X86::VCMPPSZrrib: NewOpc = X86::VCMPPSZrrib_alt; break;
- case X86::VCMPSDZrm: NewOpc = X86::VCMPSDZrmi_alt; break;
- case X86::VCMPSDZrr: NewOpc = X86::VCMPSDZrri_alt; break;
- case X86::VCMPSSZrm: NewOpc = X86::VCMPSSZrmi_alt; break;
- case X86::VCMPSSZrr: NewOpc = X86::VCMPSSZrri_alt; break;
+ case X86::VCMPPDZ128rmi: NewOpc = X86::VCMPPDZ128rmi_alt; break;
+ case X86::VCMPPDZ128rri: NewOpc = X86::VCMPPDZ128rri_alt; break;
+ case X86::VCMPPSZ128rmi: NewOpc = X86::VCMPPSZ128rmi_alt; break;
+ case X86::VCMPPSZ128rri: NewOpc = X86::VCMPPSZ128rri_alt; break;
+ case X86::VCMPPDZ256rmi: NewOpc = X86::VCMPPDZ256rmi_alt; break;
+ case X86::VCMPPDZ256rri: NewOpc = X86::VCMPPDZ256rri_alt; break;
+ case X86::VCMPPSZ256rmi: NewOpc = X86::VCMPPSZ256rmi_alt; break;
+ case X86::VCMPPSZ256rri: NewOpc = X86::VCMPPSZ256rri_alt; break;
+ case X86::VCMPSDZrm_Int: NewOpc = X86::VCMPSDZrmi_alt; break;
+ case X86::VCMPSDZrr_Int: NewOpc = X86::VCMPSDZrri_alt; break;
+ case X86::VCMPSDZrrb_Int: NewOpc = X86::VCMPSDZrrb_alt; break;
+ case X86::VCMPSSZrm_Int: NewOpc = X86::VCMPSSZrmi_alt; break;
+ case X86::VCMPSSZrr_Int: NewOpc = X86::VCMPSSZrri_alt; break;
+ case X86::VCMPSSZrrb_Int: NewOpc = X86::VCMPSSZrrb_alt; break;
}
// Switch opcode to the one that doesn't get special printing.
mcInst.setOpcode(NewOpc);
# CHECK: vcmppd $127, {sae}, %zmm27, %zmm11, %k4
0x62 0x91 0xa5 0x58 0xc2 0xe3 0x7f
+
+# CHECK: vcmpsd $204, (%rax), %xmm4, %k5
+0x62 0xf1 0xdf 0x8 0xc2 0x28 0xcc
+
+# CHECK: vcmpss $204, (%rax), %xmm4, %k5
+0x62 0xf1 0x5e 0x08 0xc2 0x28 0xcc
+
+# CHECK: vcmpsd $204, %xmm3, %xmm4, %k5
+0x62 0xf1 0xdf 0x08 0xc2 0xeb 0xcc
+
+# CHECK: vcmpss $204, %xmm3, %xmm4, %k5
+0x62 0xf1 0x5e 0x08 0xc2 0xeb 0xcc
+
+# CHECK: vcmpsd $204, {sae}, %xmm3, %xmm4, %k5
+0x62 0xf1 0xdf 0x18 0xc2 0xeb 0xcc
+
+# CHECK: vcmpss $204, {sae}, %xmm3, %xmm4, %k5
+0x62 0xf1 0x5e 0x18 0xc2 0xeb 0xcc
+
+# CHECK: vcmppd $127, %ymm27, %ymm11, %k4
+0x62 0x91 0xa5 0x28 0xc2 0xe3 0x7f
+
+# CHECK: vcmpps $127, %ymm27, %ymm11, %k4
+0x62 0x91 0x24 0x28 0xc2 0xe3 0x7f
+
+# CHECK: vcmppd $127, %xmm27, %xmm11, %k4
+0x62 0x91 0xa5 0x08 0xc2 0xe3 0x7f
+
+# CHECK: vcmpps $127, %xmm27, %xmm11, %k4
+0x62 0x91 0x24 0x08 0xc2 0xe3 0x7f
+