ARM: dts: Exynos4x12: add CPU OPP and regulator supply property

For Exynos4x12 platforms, add CPU operating points and CPU
regulator supply properties for migrating from Exynos specific
cpufreq driver to using generic cpufreq driver.

Based on the earlier work by Thomas Abraham.

Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Andreas Farber <afaerber@suse.de>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>

diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index 5be0328..f97e4b5 100644 (file)
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -30,6 +30,28 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0xA00>;
+                       clocks = <&clock CLK_ARM_CLK>;
+                       clock-names = "cpu";
+
+                       operating-points = <
+                               1400000 1287500
+                               1300000 1250000
+                               1200000 1187500
+                               1100000 1137500
+                               1000000 1087500
+                                900000 1037500
+                                800000 1000000
+                                700000  987500
+                                600000  975000
+                                500000  950000
+                                400000  925000
+                                300000  900000
+                                200000  900000
+                       >;
+                       boost-opps = <
+                               1500000 1350000
+                       >;
+                       clock-latency = <200000>;
                        cooling-min-level = <13>;
                        cooling-max-level = <7>;
                        #cooling-cells = <2>; /* min followed by max */

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index abc4aa7..fc1b41d 100644 (file)
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -516,3 +516,7 @@
                samsung,pin-pud = <1>;
        };
 };
+
+&cpu0 {
+       cpu0-supply = <&buck2_reg>;
+};

diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts
index bd8b730..a9c957c 100644 (file)
--- a/arch/arm/boot/dts/exynos4412-origen.dts
+++ b/arch/arm/boot/dts/exynos4412-origen.dts
@@ -532,3 +532,8 @@
                };
        };
 };
+
+
+&cpu0 {
+       cpu0-supply = <&buck2_reg>;
+};

diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 56d1c9f..c392b26 100644 (file)
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -1322,3 +1322,8 @@
                PIN_SLP(gpv4-0, INPUT, DOWN);
        };
 };
+
+
+&cpu0 {
+       cpu0-supply = <&buck2_reg>;
+};

diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 68ad43b..903981e 100644 (file)
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -30,6 +30,28 @@
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0xA00>;
+                       clocks = <&clock CLK_ARM_CLK>;
+                       clock-names = "cpu";
+
+                       operating-points = <
+                               1400000 1287500
+                               1300000 1250000
+                               1200000 1187500
+                               1100000 1137500
+                               1000000 1087500
+                                900000 1037500
+                                800000 1000000
+                                700000  987500
+                                600000  975000
+                                500000  950000
+                                400000  925000
+                                300000  900000
+                                200000  900000
+                       >;
+                       boost-opps = <
+                               1500000 1350000
+                       >;
+                       clock-latency = <200000>;
                        cooling-min-level = <13>;
                        cooling-max-level = <7>;
                        #cooling-cells = <2>; /* min followed by max */