drm/amdgpu/gfx9: fix resume of KIQ and KCQs (v2)

No need to reset the wptr and clear the rings.  The UNMAP_QUEUES
packet writes the current MQD state back the MQD on suspend,
so there is no need to reset it as well.

v2: fix from gfx8 (Rex)

Acked-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: monk liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 455d875..6c6644a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2809,18 +2809,7 @@ static int gfx_v9_0_kiq_init_queue(struct amdgpu_ring *ring)
 
        gfx_v9_0_kiq_setting(ring);
 
-       if (!adev->gfx.in_reset) {
-               memset((void *)mqd, 0, sizeof(*mqd));
-               mutex_lock(&adev->srbm_mutex);
-               soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
-               gfx_v9_0_mqd_init(ring);
-               gfx_v9_0_kiq_init_register(ring);
-               soc15_grbm_select(adev, 0, 0, 0, 0);
-               mutex_unlock(&adev->srbm_mutex);
-
-               if (adev->gfx.mec.mqd_backup[mqd_idx])
-                       memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
-       } else { /* for GPU_RESET case */
+       if (adev->gfx.in_reset) { /* for GPU_RESET case */
                /* reset MQD to a clean status */
                if (adev->gfx.mec.mqd_backup[mqd_idx])
                        memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));
@@ -2834,6 +2823,17 @@ static int gfx_v9_0_kiq_init_queue(struct amdgpu_ring *ring)
                gfx_v9_0_kiq_init_register(ring);
                soc15_grbm_select(adev, 0, 0, 0, 0);
                mutex_unlock(&adev->srbm_mutex);
+       } else {
+               memset((void *)mqd, 0, sizeof(*mqd));
+               mutex_lock(&adev->srbm_mutex);
+               soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
+               gfx_v9_0_mqd_init(ring);
+               gfx_v9_0_kiq_init_register(ring);
+               soc15_grbm_select(adev, 0, 0, 0, 0);
+               mutex_unlock(&adev->srbm_mutex);
+
+               if (adev->gfx.mec.mqd_backup[mqd_idx])
+                       memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
        }
 
        return 0;
@@ -2855,7 +2855,7 @@ static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring)
 
                if (adev->gfx.mec.mqd_backup[mqd_idx])
                        memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
-       } else { /* for GPU_RESET case */
+       } else if (adev->gfx.in_reset) { /* for GPU_RESET case */
                /* reset MQD to a clean status */
                if (adev->gfx.mec.mqd_backup[mqd_idx])
                        memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));
@@ -2863,6 +2863,8 @@ static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring)
                /* reset ring buffer */
                ring->wptr = 0;
                amdgpu_ring_clear_ring(ring);
+       } else {
+               amdgpu_ring_clear_ring(ring);
        }
 
        return 0;