serial: 8250_bcm2835aux: Add missing clk_disable_unprepare()
authorGuo Mengqi <guomengqi3@huawei.com>
Fri, 15 Jul 2022 02:33:12 +0000 (10:33 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 28 Jul 2022 08:33:44 +0000 (10:33 +0200)
The error path when get clock frequency fails in bcm2835aux_serial
driver does not correctly disable the clock.

This flaw was found using a static analysis tool "Hulk Robot", which
reported the following warning when analyzing linux-next/master:

    drivers/tty/serial/8250/8250_bcm2835aux.c:
    warning: clk_disable_unprepare_missing.cocci

The cocci script checks for the existence of clk_disable_unprepare()
paired with clk_prepare_enable().

Add the missing clk_disable_unprepare() to the error path.

Fixes: fcc446c8aa63 ("serial: 8250_bcm2835aux: Add ACPI support")
Reported-by: Hulk Robot <hulkci@huawei.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Guo Mengqi <guomengqi3@huawei.com>
Link: https://lore.kernel.org/r/20220715023312.37808-1-guomengqi3@huawei.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/8250/8250_bcm2835aux.c

index 047e14c..15a2387 100644 (file)
@@ -167,8 +167,10 @@ static int bcm2835aux_serial_probe(struct platform_device *pdev)
        uartclk = clk_get_rate(data->clk);
        if (!uartclk) {
                ret = device_property_read_u32(&pdev->dev, "clock-frequency", &uartclk);
-               if (ret)
-                       return dev_err_probe(&pdev->dev, ret, "could not get clk rate\n");
+               if (ret) {
+                       dev_err_probe(&pdev->dev, ret, "could not get clk rate\n");
+                       goto dis_clk;
+               }
        }
 
        /* the HW-clock divider for bcm2835aux is 8,