novena: Fix ethernet PHY reset sequence
authorNikolay Dimitrov <picmaster@mail.bg>
Sun, 12 Oct 2014 10:47:51 +0000 (13:47 +0300)
committerStefano Babic <sbabic@denx.de>
Thu, 30 Oct 2014 09:48:43 +0000 (10:48 +0100)
This patch fixes conflict between PHY pins becoming outputs after reset and
imx6 still driving the pins. It also fixes the reset timing as recommended by
the PHY datasheet.

Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>

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