drm/amdgpu: fix bad DMA from INTERRUPT_CNTL2

The INTERRUPT_CNTL2 register expects a valid DMA address, but is
currently set with a GPU MC address.  This can cause problems on
systems that detect the resulting DMA read from an invalid address
(found on a Power8 guest).

Instead, use the DMA address of the dummy page because it will always
be safe.

Fixes: 27ae10641e9c ("drm/amdgpu: add interupt handler implementation for si v3")
Signed-off-by: Sam Bobroff <sbobroff@linux.ibm.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/si_ih.c b/drivers/gpu/drm/amd/amdgpu/si_ih.c
index 57bb5f9..88ae27a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_ih.c
@@ -64,7 +64,8 @@ static int si_ih_irq_init(struct amdgpu_device *adev)
        u32 interrupt_cntl, ih_cntl, ih_rb_cntl;
 
        si_ih_disable_interrupts(adev);
-       WREG32(INTERRUPT_CNTL2, adev->irq.ih.gpu_addr >> 8);
+       /* set dummy read address to dummy page address */
+       WREG32(INTERRUPT_CNTL2, adev->dummy_page_addr >> 8);
        interrupt_cntl = RREG32(INTERRUPT_CNTL);
        interrupt_cntl &= ~IH_DUMMY_RD_OVERRIDE;
        interrupt_cntl &= ~IH_REQ_NONSNOOP_EN;