drm/amdgpu/pm/smu7: drop message about VI performance levels
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 21 Jan 2022 14:23:47 +0000 (09:23 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Jan 2022 23:00:36 +0000 (18:00 -0500)
Earlier chips only had two performance levels, but newer
ones potentially had more.  The message is harmless.  Drop the
message to avoid spamming the log.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1874
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c

index cd99db0..a1e1103 100644 (file)
@@ -3295,10 +3295,6 @@ static int smu7_apply_state_adjust_rules(struct pp_hwmgr *hwmgr,
                        request_ps->classification.ui_label);
        data->mclk_ignore_signal = false;
 
-       PP_ASSERT_WITH_CODE(smu7_ps->performance_level_count == 2,
-                                "VI should always have 2 performance levels",
-                               );
-
        max_limits = adev->pm.ac_power ?
                        &(hwmgr->dyn_state.max_clock_voltage_on_ac) :
                        &(hwmgr->dyn_state.max_clock_voltage_on_dc);