static int
blt_pitch(struct intel_mipmap_tree *mt)
{
- int pitch = mt->pitch;
+ int pitch = mt->surf.row_pitch;
if (mt->surf.tiling != ISL_TILING_LINEAR)
pitch /= 4;
return pitch;
uint32_t *y_offset_el)
{
enum isl_tiling tiling = intel_miptree_get_isl_tiling(mt);
- isl_tiling_get_intratile_offset_el(tiling, mt->cpp * 8, mt->pitch,
+ isl_tiling_get_intratile_offset_el(tiling, mt->cpp * 8, mt->surf.row_pitch,
total_x_offset_el, total_y_offset_el,
base_address_offset,
x_offset_el, y_offset_el);
* The offsets we get from ISL in the tiled case are already aligned.
* In the linear case, we need to do some of our own aligning.
*/
- assert(mt->pitch % 64 == 0);
+ assert(mt->surf.row_pitch % 64 == 0);
uint32_t delta = *base_address_offset & 63;
assert(delta % mt->cpp == 0);
*base_address_offset -= delta;
if (!intelEmitCopyBlit(brw,
src_mt->cpp,
- reverse ? -src_mt->pitch : src_mt->pitch,
+ reverse ? -src_mt->surf.row_pitch :
+ src_mt->surf.row_pitch,
src_mt->bo, src_mt->offset + src_offset,
src_mt->surf.tiling,
- dst_mt->pitch,
+ dst_mt->surf.row_pitch,
dst_mt->bo, dst_mt->offset + dst_offset,
dst_mt->surf.tiling,
src_tile_x, src_tile_y,
uint32_t BR13, CMD;
int pitch, cpp;
- pitch = mt->pitch;
+ pitch = mt->surf.row_pitch;
cpp = mt->cpp;
DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
mt->cpp,
isl_tiling_to_i915_tiling(
mt->surf.tiling),
- &mt->pitch,
+ &mt->surf.row_pitch,
alloc_flags);
/* The stencil buffer has quirky pitch requirements. From the
* While the Ivybridge PRM lacks this comment, the BSpec contains the
* same text, and experiments indicate that this is necessary.
*/
- mt->pitch *= 2;
+ mt->surf.row_pitch *= 2;
} else {
mt->bo = brw_bo_alloc_tiled_2d(brw->bufmgr, "miptree",
mt->total_width, mt->total_height,
mt->cpp,
isl_tiling_to_i915_tiling(
mt->surf.tiling),
- &mt->pitch,
+ &mt->surf.row_pitch,
alloc_flags);
}
mt->total_width, mt->total_height, mt->cpp,
isl_tiling_to_i915_tiling(
mt->surf.tiling),
- &mt->pitch, alloc_flags);
+ &mt->surf.row_pitch, alloc_flags);
}
mt->offset = 0;
brw_bo_reference(bo);
mt->bo = bo;
- mt->pitch = pitch;
+ mt->surf.row_pitch = pitch;
mt->offset = offset;
mt->surf.tiling = isl_tiling_from_i915_tiling(tiling);
uint32_t x, uint32_t y)
{
int cpp = mt->cpp;
- uint32_t pitch = mt->pitch;
+ uint32_t pitch = mt->surf.row_pitch;
switch (mt->surf.tiling) {
default:
DBG("validate blit mt %s %p %d,%d/%d -> mt %s %p %d,%d/%d (%dx%d)\n",
_mesa_get_format_name(src_mt->format),
- src_mt, src_x, src_y, src_mt->pitch,
+ src_mt, src_x, src_y, src_mt->surf.row_pitch,
_mesa_get_format_name(dst_mt->format),
- dst_mt, dst_x, dst_y, dst_mt->pitch,
+ dst_mt, dst_x, dst_y, dst_mt->surf.row_pitch,
width, height);
if (!intel_miptree_blit(brw,
x += image_x;
y += image_y;
- map->stride = mt->pitch;
+ map->stride = mt->surf.row_pitch;
map->ptr = base + y * map->stride + x * mt->cpp;
}
fprintf(stderr, "Failed to allocate blit temporary\n");
goto fail;
}
- map->stride = map->linear_mt->pitch;
+ map->stride = map->linear_mt->surf.row_pitch;
/* One of either READ_BIT or WRITE_BIT or both is set. READ_BIT implies no
* INVALIDATE_RANGE_BIT. WRITE_BIT needs the original values read in unless
src += mt->offset;
- src += image_y * mt->pitch;
+ src += image_y * mt->surf.row_pitch;
src += image_x * mt->cpp;
/* Due to the pixel offsets for the particular image being mapped, our
* divisible by 16, then the amount by which it's misaligned will remain
* consistent from row to row.
*/
- assert((mt->pitch % 16) == 0);
+ assert((mt->surf.row_pitch % 16) == 0);
const int misalignment = ((uintptr_t) src) & 15;
/* Create an untiled temporary buffer for the mapping. */
for (uint32_t y = 0; y < map->h; y++) {
void *dst_ptr = map->ptr + y * map->stride;
- void *src_ptr = src + y * mt->pitch;
+ void *src_ptr = src + y * mt->surf.row_pitch;
_mesa_streaming_load_memcpy(dst_ptr, src_ptr, width_bytes);
}
* temporary buffer back out.
*/
if (!(map->mode & GL_MAP_INVALIDATE_RANGE_BIT)) {
- const unsigned pitch = mt->surf.size > 0 ?
- mt->surf.row_pitch : mt->pitch;
uint8_t *untiled_s8_map = map->ptr;
uint8_t *tiled_s8_map = intel_miptree_map_raw(brw, mt, GL_MAP_READ_BIT);
unsigned int image_x, image_y;
for (uint32_t y = 0; y < map->h; y++) {
for (uint32_t x = 0; x < map->w; x++) {
- ptrdiff_t offset = intel_offset_S8(pitch,
+ ptrdiff_t offset = intel_offset_S8(mt->surf.row_pitch,
x + image_x + map->x,
y + image_y + map->y,
brw->has_swizzling);
unsigned int slice)
{
if (map->mode & GL_MAP_WRITE_BIT) {
- const unsigned pitch = mt->surf.size > 0 ?
- mt->surf.row_pitch : mt->pitch;
unsigned int image_x, image_y;
uint8_t *untiled_s8_map = map->ptr;
uint8_t *tiled_s8_map = intel_miptree_map_raw(brw, mt, GL_MAP_WRITE_BIT);
for (uint32_t y = 0; y < map->h; y++) {
for (uint32_t x = 0; x < map->w; x++) {
- ptrdiff_t offset = intel_offset_S8(pitch,
+ ptrdiff_t offset = intel_offset_S8(mt->surf.row_pitch,
image_x + x + map->x,
image_y + y + map->y,
brw->has_swizzling);
image_y += map->y;
uint8_t *dst = intel_miptree_map_raw(brw, mt, GL_MAP_WRITE_BIT)
- + image_y * mt->pitch
+ + image_y * mt->surf.row_pitch
+ image_x * mt->cpp;
if (mt->etc_format == MESA_FORMAT_ETC1_RGB8)
- _mesa_etc1_unpack_rgba8888(dst, mt->pitch,
+ _mesa_etc1_unpack_rgba8888(dst, mt->surf.row_pitch,
map->ptr, map->stride,
map->w, map->h);
else
- _mesa_unpack_etc2_format(dst, mt->pitch,
+ _mesa_unpack_etc2_format(dst, mt->surf.row_pitch,
map->ptr, map->stride,
map->w, map->h, mt->etc_format);
* temporary buffer back out.
*/
if (!(map->mode & GL_MAP_INVALIDATE_RANGE_BIT)) {
- const unsigned s_pitch = s_mt->surf.size > 0 ?
- s_mt->surf.row_pitch : s_mt->pitch;
uint32_t *packed_map = map->ptr;
uint8_t *s_map = intel_miptree_map_raw(brw, s_mt, GL_MAP_READ_BIT);
uint32_t *z_map = intel_miptree_map_raw(brw, z_mt, GL_MAP_READ_BIT);
for (uint32_t y = 0; y < map->h; y++) {
for (uint32_t x = 0; x < map->w; x++) {
int map_x = map->x + x, map_y = map->y + y;
- ptrdiff_t s_offset = intel_offset_S8(s_pitch,
+ ptrdiff_t s_offset = intel_offset_S8(s_mt->surf.row_pitch,
map_x + s_image_x,
map_y + s_image_y,
brw->has_swizzling);
ptrdiff_t z_offset = ((map_y + z_image_y) *
- (z_mt->pitch / 4) +
+ (z_mt->surf.row_pitch / 4) +
(map_x + z_image_x));
uint8_t s = s_map[s_offset];
uint32_t z = z_map[z_offset];
bool map_z32f_x24s8 = mt->format == MESA_FORMAT_Z_FLOAT32;
if (map->mode & GL_MAP_WRITE_BIT) {
- const unsigned s_pitch = s_mt->surf.size > 0 ?
- s_mt->surf.row_pitch : s_mt->pitch;
uint32_t *packed_map = map->ptr;
uint8_t *s_map = intel_miptree_map_raw(brw, s_mt, GL_MAP_WRITE_BIT);
uint32_t *z_map = intel_miptree_map_raw(brw, z_mt, GL_MAP_WRITE_BIT);
for (uint32_t y = 0; y < map->h; y++) {
for (uint32_t x = 0; x < map->w; x++) {
- ptrdiff_t s_offset = intel_offset_S8(s_pitch,
+ ptrdiff_t s_offset = intel_offset_S8(s_mt->surf.row_pitch,
x + s_image_x + map->x,
y + s_image_y + map->y,
brw->has_swizzling);
ptrdiff_t z_offset = ((y + z_image_y + map->y) *
- (z_mt->pitch / 4) +
+ (z_mt->surf.row_pitch / 4) +
(x + z_image_x + map->x));
if (map_z32f_x24s8) {
unsigned int level, unsigned int slice)
{
/* See intel_miptree_blit() for details on the 32k pitch limit. */
- if (mt->pitch >= 32768)
+ if (mt->surf.row_pitch >= 32768)
return false;
return true;
#if defined(USE_SSE41)
} else if (!(mode & GL_MAP_WRITE_BIT) &&
!mt->compressed && cpu_has_sse4_1 &&
- (mt->pitch % 16 == 0)) {
+ (mt->surf.row_pitch % 16 == 0)) {
intel_miptree_map_movntdqa(brw, mt, map, level, slice);
#endif
} else {
mt->array_layout);
surf->msaa_layout = mt->surf.msaa_layout;
surf->tiling = intel_miptree_get_isl_tiling(mt);
- surf->row_pitch = mt->pitch;
+ surf->row_pitch = mt->surf.row_pitch;
surf->format = translate_tex_format(brw, mt->format, false);
if (brw->gen >= 9) {
projects / platform / upstream / mesa.git / commitdiff