re PR testsuite/21292 (gen-vect-11b.c and gen-vect-11c.c fail)
authorPaolo Bonzini <bonzini@gnu.org>
Fri, 3 Jun 2005 08:09:47 +0000 (08:09 +0000)
committerPaolo Bonzini <bonzini@gcc.gnu.org>
Fri, 3 Jun 2005 08:09:47 +0000 (08:09 +0000)
2005-06-03  Paolo Bonzini  <bonzini@gnu.org>

PR tree-optimization/21292

* lib/target-supports.exp (check_effective_target_vect_cmdline_needed):
New.
* gcc.dg/tree-ssa/gen-vect-11.c, gcc.dg/tree-ssa/gen-vect-11a.c,
gcc.dg/tree-ssa/gen-vect-11b.c, gcc.dg/tree-ssa/gen-vect-11c.c,
gcc.dg/tree-ssa/gen-vect-2.c, gcc.dg/tree-ssa/gen-vect-25.c,
gcc.dg/tree-ssa/gen-vect-26.c, gcc.dg/tree-ssa/gen-vect-28.c,
gcc.dg/tree-ssa/gen-vect-32.c: Require it.

From-SVN: r100535

gcc/testsuite/ChangeLog
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11.c
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11a.c
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11b.c
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-11c.c
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-2.c
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-25.c
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-26.c
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-28.c
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-32.c
gcc/testsuite/lib/target-supports.exp

index 4748fd5..705985f 100644 (file)
@@ -1,3 +1,15 @@
+2005-06-03  Paolo Bonzini  <bonzini@gnu.org>
+
+       PR tree-optimization/21292
+
+       * lib/target-supports.exp (check_effective_target_vect_cmdline_needed):
+       New.
+       * gcc.dg/tree-ssa/gen-vect-11.c, gcc.dg/tree-ssa/gen-vect-11a.c,
+       gcc.dg/tree-ssa/gen-vect-11b.c, gcc.dg/tree-ssa/gen-vect-11c.c,
+       gcc.dg/tree-ssa/gen-vect-2.c, gcc.dg/tree-ssa/gen-vect-25.c,
+       gcc.dg/tree-ssa/gen-vect-26.c, gcc.dg/tree-ssa/gen-vect-28.c,
+       gcc.dg/tree-ssa/gen-vect-32.c: Require it.
+
 2005-06-02  Richard Henderson  <rth@redhat.com>
 
        * gcc.dg/sync-2.c: Use -march=i486 for i386.
index bc6c286..faba545 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
index 75ec7ce..7fbbc0c 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
index 2083353..c1c33c3 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
index 8632ae4..e57554b 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
index be89c26..8bee152 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
index 5cfec85..e6127d8 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
index b90413a..bd6a513 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
index 0d01752..4f3bcf8 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
index 681c707..1a46a30 100644 (file)
@@ -1,4 +1,4 @@
-/* { dg-do run } */
+/* { dg-do run { target vect_cmdline_needed } } */
 /* { dg-options "-O2 -ftree-vectorize -ftree-vectorizer-verbose=3 -fdump-tree-vect-stats" } */
 
 #include <stdlib.h>
index b2bec15..3b98c6b 100644 (file)
@@ -725,6 +725,28 @@ proc check_effective_target_lp64 { } {
     return $et_lp64_saved
 }
 
+# Return 1 if the target needs a command line argument to enable a SIMD
+# instruction set.
+#
+# This won't change for different subtargets so cache the result.
+
+proc check_effective_target_vect_cmdline_needed { } {
+    global et_vect_cmdline_needed_saved
+
+    if [info exists et_vect_cmdline_needed_saved] {
+       verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
+    } else {
+       set et_vect_cmdline_needed_saved 1
+       if { [istarget ia64-*-*]
+             || [istarget x86_64-*-*] } {
+          set et_vect_cmdline_needed_saved 0
+       }
+    }
+
+    verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
+    return $et_vect_cmdline_needed_saved
+}
+
 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
 #
 # This won't change for different subtargets so cache the result.