[SimplifyCFG] Teach SimplifyCondBranchToTwoReturns() to preserve DomTree, part 1
authorRoman Lebedev <lebedev.ri@gmail.com>
Sat, 19 Dec 2020 16:12:30 +0000 (19:12 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Sat, 19 Dec 2020 21:18:35 +0000 (00:18 +0300)
... for the general case of returning a value.

llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/LoopDeletion/simplify-then-delete.ll
llvm/test/Transforms/SimplifyCFG/2008-09-08-MultiplePred.ll
llvm/test/Transforms/SimplifyCFG/merge-duplicate-conditional-ret-val.ll [new file with mode: 0644]

index fb28205..8ee7e57 100644 (file)
@@ -2688,6 +2688,11 @@ bool SimplifyCFGOpt::SimplifyCondBranchToTwoReturns(BranchInst *BI,
 
   EraseTerminatorAndDCECond(BI);
 
+  if (DTU) {
+    DTU->applyUpdatesPermissive({{DominatorTree::Delete, BB, TrueSucc},
+                                 {DominatorTree::Delete, BB, FalseSucc}});
+  }
+
   return true;
 }
 
index 4278ef1..294f610 100644 (file)
@@ -1,4 +1,4 @@
-; RUN: opt < %s -S -indvars -loop-deletion -simplifycfg | FileCheck %s
+; RUN: opt < %s -S -indvars -loop-deletion -simplifycfg -simplifycfg-require-and-preserve-domtree=1 | FileCheck %s
 ; PR5794
 
 ; Indvars and loop deletion should be able to eliminate all looping
index 6b216f5..a2477f2 100644 (file)
@@ -1,4 +1,4 @@
-; RUN: opt < %s -simplifycfg -disable-output
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -disable-output
 ; PR 2777
 @g_103 = common global i32 0           ; <i32*> [#uses=1]
 
diff --git a/llvm/test/Transforms/SimplifyCFG/merge-duplicate-conditional-ret-val.ll b/llvm/test/Transforms/SimplifyCFG/merge-duplicate-conditional-ret-val.ll
new file mode 100644 (file)
index 0000000..55e02e9
--- /dev/null
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -simplifycfg-dup-ret -S | FileCheck %s
+
+declare void @bar()
+declare void @baz()
+
+define i8 @foo(i1 %c, i8 %v0, i8 %v1) {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[SPEC_SELECT:%.*]] = select i1 [[C:%.*]], i8 [[V0:%.*]], i8 [[V1:%.*]]
+; CHECK-NEXT:    ret i8 [[SPEC_SELECT]]
+;
+entry:
+  br i1 %c, label %true, label %false
+
+true:
+  ret i8 %v0
+
+false:
+  ret i8 %v1
+}