[llvm-mca][x86] Add CMPXCHG instruction resource tests

I've put CMPXCHG8B/CMPXCHG16B in the same file, even though technically they are under separate CPUID bits all targets seem to support both (or neither).

llvm-svn: 338595

diff --git a/llvm/test/tools/llvm-mca/X86/Atom/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/Atom/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..cc6e5fb
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/Atom/resources-cmpxchg.s
@@ -0,0 +1,30 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=atom -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      18    9.00    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  1      22    11.00   *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - AtomPort0
+# CHECK-NEXT: [1]   - AtomPort1
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]
+# CHECK-NEXT: 20.00  20.00
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    Instructions:
+# CHECK-NEXT: 9.00   9.00   cmpxchg8b  (%rax)
+# CHECK-NEXT: 11.00  11.00  cmpxchg16b (%rax)

diff --git a/llvm/test/tools/llvm-mca/X86/Broadwell/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..4813c6c
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/Broadwell/resources-cmpxchg.s
@@ -0,0 +1,38 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  14     16    2.75    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  19     21    4.00    *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - BWDivider
+# CHECK-NEXT: [1]   - BWFPDivider
+# CHECK-NEXT: [2]   - BWPort0
+# CHECK-NEXT: [3]   - BWPort1
+# CHECK-NEXT: [4]   - BWPort2
+# CHECK-NEXT: [5]   - BWPort3
+# CHECK-NEXT: [6]   - BWPort4
+# CHECK-NEXT: [7]   - BWPort5
+# CHECK-NEXT: [8]   - BWPort6
+# CHECK-NEXT: [9]   - BWPort7
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]
+# CHECK-NEXT:  -      -     8.75   3.75   1.67   1.67   2.00   7.75   6.75   0.67
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    Instructions:
+# CHECK-NEXT:  -      -     3.25   2.25   0.83   0.83   1.00   2.25   3.25   0.33   cmpxchg8b  (%rax)
+# CHECK-NEXT:  -      -     5.50   1.50   0.83   0.83   1.00   5.50   3.50   0.33   cmpxchg16b (%rax)

diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..23ee46c
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/BtVer2/resources-cmpxchg.s
@@ -0,0 +1,42 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  2      4     1.00    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  2      4     1.00    *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - JALU0
+# CHECK-NEXT: [1]   - JALU1
+# CHECK-NEXT: [2]   - JDiv
+# CHECK-NEXT: [3]   - JFPA
+# CHECK-NEXT: [4]   - JFPM
+# CHECK-NEXT: [5]   - JFPU0
+# CHECK-NEXT: [6]   - JFPU1
+# CHECK-NEXT: [7]   - JLAGU
+# CHECK-NEXT: [8]   - JMul
+# CHECK-NEXT: [9]   - JSAGU
+# CHECK-NEXT: [10]  - JSTC
+# CHECK-NEXT: [11]  - JVALU0
+# CHECK-NEXT: [12]  - JVALU1
+# CHECK-NEXT: [13]  - JVIMUL
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# CHECK-NEXT: 1.00   1.00    -      -      -      -      -     2.00    -     2.00    -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# CHECK-NEXT: 0.50   0.50    -      -      -      -      -     1.00    -     1.00    -      -      -      -     cmpxchg8b      (%rax)
+# CHECK-NEXT: 0.50   0.50    -      -      -      -      -     1.00    -     1.00    -      -      -      -     cmpxchg16b     (%rax)

diff --git a/llvm/test/tools/llvm-mca/X86/Generic/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/Generic/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..19a2207
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/Generic/resources-cmpxchg.s
@@ -0,0 +1,36 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  3      6     1.00    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  3      6     1.00    *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - SBDivider
+# CHECK-NEXT: [1]   - SBFPDivider
+# CHECK-NEXT: [2]   - SBPort0
+# CHECK-NEXT: [3]   - SBPort1
+# CHECK-NEXT: [4]   - SBPort4
+# CHECK-NEXT: [5]   - SBPort5
+# CHECK-NEXT: [6.0] - SBPort23
+# CHECK-NEXT: [6.1] - SBPort23
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]
+# CHECK-NEXT:  -      -     0.67   0.67   2.00   0.67   2.00   2.00
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+# CHECK-NEXT:  -      -     0.33   0.33   1.00   0.33   1.00   1.00   cmpxchg8b        (%rax)
+# CHECK-NEXT:  -      -     0.33   0.33   1.00   0.33   1.00   1.00   cmpxchg16b       (%rax)

diff --git a/llvm/test/tools/llvm-mca/X86/Haswell/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/Haswell/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..9db2d3f
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/Haswell/resources-cmpxchg.s
@@ -0,0 +1,38 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  14     17    2.75    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  19     22    4.00    *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - HWDivider
+# CHECK-NEXT: [1]   - HWFPDivider
+# CHECK-NEXT: [2]   - HWPort0
+# CHECK-NEXT: [3]   - HWPort1
+# CHECK-NEXT: [4]   - HWPort2
+# CHECK-NEXT: [5]   - HWPort3
+# CHECK-NEXT: [6]   - HWPort4
+# CHECK-NEXT: [7]   - HWPort5
+# CHECK-NEXT: [8]   - HWPort6
+# CHECK-NEXT: [9]   - HWPort7
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]
+# CHECK-NEXT:  -      -     8.75   3.75   1.67   1.67   2.00   7.75   6.75   0.67
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    Instructions:
+# CHECK-NEXT:  -      -     3.25   2.25   0.83   0.83   1.00   2.25   3.25   0.33   cmpxchg8b  (%rax)
+# CHECK-NEXT:  -      -     5.50   1.50   0.83   0.83   1.00   5.50   3.50   0.33   cmpxchg16b (%rax)

diff --git a/llvm/test/tools/llvm-mca/X86/SLM/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/SLM/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..eb56516
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/SLM/resources-cmpxchg.s
@@ -0,0 +1,36 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=slm -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  2      4     2.00    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  2      4     2.00    *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - SLMDivider
+# CHECK-NEXT: [1]   - SLMFPDivider
+# CHECK-NEXT: [2]   - SLMFPMultiplier
+# CHECK-NEXT: [3]   - SLM_FPC_RSV0
+# CHECK-NEXT: [4]   - SLM_FPC_RSV1
+# CHECK-NEXT: [5]   - SLM_IEC_RSV0
+# CHECK-NEXT: [6]   - SLM_IEC_RSV1
+# CHECK-NEXT: [7]   - SLM_MEC_RSV
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]
+# CHECK-NEXT:  -      -      -      -      -     1.00   1.00   4.00
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    Instructions:
+# CHECK-NEXT:  -      -      -      -      -     0.50   0.50   2.00   cmpxchg8b        (%rax)
+# CHECK-NEXT:  -      -      -      -      -     0.50   0.50   2.00   cmpxchg16b       (%rax)

diff --git a/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..a23d63e
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/SandyBridge/resources-cmpxchg.s
@@ -0,0 +1,36 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  3      6     1.00    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  3      6     1.00    *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - SBDivider
+# CHECK-NEXT: [1]   - SBFPDivider
+# CHECK-NEXT: [2]   - SBPort0
+# CHECK-NEXT: [3]   - SBPort1
+# CHECK-NEXT: [4]   - SBPort4
+# CHECK-NEXT: [5]   - SBPort5
+# CHECK-NEXT: [6.0] - SBPort23
+# CHECK-NEXT: [6.1] - SBPort23
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]
+# CHECK-NEXT:  -      -     0.67   0.67   2.00   0.67   2.00   2.00
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6.0]  [6.1]  Instructions:
+# CHECK-NEXT:  -      -     0.33   0.33   1.00   0.33   1.00   1.00   cmpxchg8b        (%rax)
+# CHECK-NEXT:  -      -     0.33   0.33   1.00   0.33   1.00   1.00   cmpxchg16b       (%rax)

diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..900b9c0
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/SkylakeClient/resources-cmpxchg.s
@@ -0,0 +1,38 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  14     16    2.75    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  19     23    4.00    *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - SKLDivider
+# CHECK-NEXT: [1]   - SKLFPDivider
+# CHECK-NEXT: [2]   - SKLPort0
+# CHECK-NEXT: [3]   - SKLPort1
+# CHECK-NEXT: [4]   - SKLPort2
+# CHECK-NEXT: [5]   - SKLPort3
+# CHECK-NEXT: [6]   - SKLPort4
+# CHECK-NEXT: [7]   - SKLPort5
+# CHECK-NEXT: [8]   - SKLPort6
+# CHECK-NEXT: [9]   - SKLPort7
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]
+# CHECK-NEXT:  -      -     8.75   3.75   1.67   1.67   2.00   7.75   6.75   0.67
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    Instructions:
+# CHECK-NEXT:  -      -     3.25   2.25   0.83   0.83   1.00   2.25   3.25   0.33   cmpxchg8b  (%rax)
+# CHECK-NEXT:  -      -     5.50   1.50   0.83   0.83   1.00   5.50   3.50   0.33   cmpxchg16b (%rax)

diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..8dc9a4b
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/SkylakeServer/resources-cmpxchg.s
@@ -0,0 +1,38 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  14     16    2.75    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  19     23    4.00    *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - SKXDivider
+# CHECK-NEXT: [1]   - SKXFPDivider
+# CHECK-NEXT: [2]   - SKXPort0
+# CHECK-NEXT: [3]   - SKXPort1
+# CHECK-NEXT: [4]   - SKXPort2
+# CHECK-NEXT: [5]   - SKXPort3
+# CHECK-NEXT: [6]   - SKXPort4
+# CHECK-NEXT: [7]   - SKXPort5
+# CHECK-NEXT: [8]   - SKXPort6
+# CHECK-NEXT: [9]   - SKXPort7
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]
+# CHECK-NEXT:  -      -     8.75   3.75   1.67   1.67   2.00   7.75   6.75   0.67
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    Instructions:
+# CHECK-NEXT:  -      -     3.25   2.25   0.83   0.83   1.00   2.25   3.25   0.33   cmpxchg8b  (%rax)
+# CHECK-NEXT:  -      -     5.50   1.50   0.83   0.83   1.00   5.50   3.50   0.33   cmpxchg16b (%rax)

diff --git a/llvm/test/tools/llvm-mca/X86/Znver1/resources-cmpxchg.s b/llvm/test/tools/llvm-mca/X86/Znver1/resources-cmpxchg.s
new file mode 100644 (file)
index 0000000..9a60b7c
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/Znver1/resources-cmpxchg.s
@@ -0,0 +1,40 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -instruction-tables < %s | FileCheck %s
+
+cmpxchg8b  (%rax)
+cmpxchg16b (%rax)
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  18     1     0.50    *      *            cmpxchg8b      (%rax)
+# CHECK-NEXT:  1      100   0.25    *      *            cmpxchg16b     (%rax)
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - ZnAGU0
+# CHECK-NEXT: [1]   - ZnAGU1
+# CHECK-NEXT: [2]   - ZnALU0
+# CHECK-NEXT: [3]   - ZnALU1
+# CHECK-NEXT: [4]   - ZnALU2
+# CHECK-NEXT: [5]   - ZnALU3
+# CHECK-NEXT: [6]   - ZnDivider
+# CHECK-NEXT: [7]   - ZnFPU0
+# CHECK-NEXT: [8]   - ZnFPU1
+# CHECK-NEXT: [9]   - ZnFPU2
+# CHECK-NEXT: [10]  - ZnFPU3
+# CHECK-NEXT: [11]  - ZnMultiplier
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]
+# CHECK-NEXT: 0.50   0.50   0.25   0.25   0.25   0.25    -      -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   Instructions:
+# CHECK-NEXT: 0.50   0.50   0.25   0.25   0.25   0.25    -      -      -      -      -      -     cmpxchg8b    (%rax)
+# CHECK-NEXT:  -      -      -      -      -      -      -      -      -      -      -      -     cmpxchg16b   (%rax)