rs6000: Don't use rs6000_isa_flags_explicit for soft float tests (PR88145)

...specifically, those for builtins.  Soft float can be enabled
implicitly, too (for certain CPUs for example).  We should use
rs6000_isa_flags instead, to decide whether to expand a builtin or
to bail out with an error instead.

	PR target/88145
	* config/rs6000/rs6000.c (rs6000_expand_zeroop_builtin): Use
	rs6000_isa_flags instead of rs6000_isa_flags_explicit to decide
	whether soft float is enabled.
	(rs6000_expand_mtfsb_builtin): Ditto.
	(rs6000_expand_set_fpscr_rn_builtin): Ditto.
	(rs6000_expand_set_fpscr_drn_builtin): Ditto.

From-SVN: r266973

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index eddcdc3..47e81c5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2018-12-11  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR target/88145
+       * config/rs6000/rs6000.c (rs6000_expand_zeroop_builtin): Use
+       rs6000_isa_flags instead of rs6000_isa_flags_explicit to decide
+       whether soft float is enabled.
+       (rs6000_expand_mtfsb_builtin): Ditto.
+       (rs6000_expand_set_fpscr_rn_builtin): Ditto.
+       (rs6000_expand_set_fpscr_drn_builtin): Ditto.
+
 2018-12-10  Jeff Law  <law@redhat.com>
 
        PR tree-optimization/80520

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index cd3fdd0..448d4a3 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -13351,7 +13351,7 @@ rs6000_expand_zeroop_builtin (enum insn_code icode, rtx target)
     return 0;
 
   if (icode == CODE_FOR_rs6000_mffsl
-      && rs6000_isa_flags_explicit & OPTION_MASK_SOFT_FLOAT)
+      && rs6000_isa_flags & OPTION_MASK_SOFT_FLOAT)
     {
       error ("__builtin_mffsl() not supported with -msoft-float");
       return const0_rtx;
@@ -13423,7 +13423,7 @@ rs6000_expand_mtfsb_builtin (enum insn_code icode, tree exp)
     /* Builtin not supported on this processor.  */
     return 0;
 
-  if (rs6000_isa_flags_explicit & OPTION_MASK_SOFT_FLOAT)
+  if (rs6000_isa_flags & OPTION_MASK_SOFT_FLOAT)
     {
       error ("__builtin_mtfsb0 and __builtin_mtfsb1 not supported with -msoft-float");
       return const0_rtx;
@@ -13460,7 +13460,7 @@ rs6000_expand_set_fpscr_rn_builtin (enum insn_code icode, tree exp)
     /* Builtin not supported on this processor.  */
     return 0;
 
-  if (rs6000_isa_flags_explicit & OPTION_MASK_SOFT_FLOAT)
+  if (rs6000_isa_flags & OPTION_MASK_SOFT_FLOAT)
     {
       error ("__builtin_set_fpscr_rn not supported with -msoft-float");
       return const0_rtx;
@@ -13504,7 +13504,7 @@ rs6000_expand_set_fpscr_drn_builtin (enum insn_code icode, tree exp)
     fatal_error (input_location,
                 "__builtin_set_fpscr_drn is not supported in 32-bit mode.");
 
-  if (rs6000_isa_flags_explicit & OPTION_MASK_SOFT_FLOAT)
+  if (rs6000_isa_flags & OPTION_MASK_SOFT_FLOAT)
     {
       error ("__builtin_set_fpscr_drn not supported with -msoft-float");
       return const0_rtx;