dmaengine: ti: k3-psil-j721s2: Add PSI-L thread map for main CPSW2G
authorKishon Vijay Abraham I <kishon@ti.com>
Thu, 11 May 2023 03:47:04 +0000 (09:17 +0530)
committerVinod Koul <vkoul@kernel.org>
Tue, 16 May 2023 17:51:29 +0000 (23:21 +0530)
Add PSI-L thread map for main CPSW2G.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Acked-by: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Link: https://lore.kernel.org/r/20230511034704.656155-1-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/dma/ti/k3-psil-j721s2.c

index a488c22..1d5430f 100644 (file)
@@ -99,6 +99,8 @@ static struct psil_ep j721s2_src_ep_map[] = {
        PSIL_PDMA_XY_PKT(0x461d),
        PSIL_PDMA_XY_PKT(0x461e),
        PSIL_PDMA_XY_PKT(0x461f),
+       /* MAIN_CPSW2G */
+       PSIL_ETHERNET(0x4640),
        /* PDMA_USART_G0 - UART0-1 */
        PSIL_PDMA_XY_PKT(0x4700),
        PSIL_PDMA_XY_PKT(0x4701),
@@ -161,6 +163,15 @@ static struct psil_ep j721s2_dst_ep_map[] = {
        PSIL_ETHERNET(0xf005),
        PSIL_ETHERNET(0xf006),
        PSIL_ETHERNET(0xf007),
+       /* MAIN_CPSW2G */
+       PSIL_ETHERNET(0xc640),
+       PSIL_ETHERNET(0xc641),
+       PSIL_ETHERNET(0xc642),
+       PSIL_ETHERNET(0xc643),
+       PSIL_ETHERNET(0xc644),
+       PSIL_ETHERNET(0xc645),
+       PSIL_ETHERNET(0xc646),
+       PSIL_ETHERNET(0xc647),
        /* SA2UL */
        PSIL_SA2UL(0xf500, 1),
        PSIL_SA2UL(0xf501, 1),