net/mlx5: Add priorities for counters in RDMA namespaces
authorAharon Landau <aharonl@nvidia.com>
Fri, 8 Oct 2021 12:24:28 +0000 (15:24 +0300)
committerLeon Romanovsky <leonro@nvidia.com>
Sat, 9 Oct 2021 09:03:42 +0000 (12:03 +0300)
Add additional flow steering priorities in the RDMA namespace.
This allows adding flow counters to count filtered RDMA traffic and then
continue processing in the regular RDMA steering flow.

Signed-off-by: Aharon Landau <aharonl@nvidia.com>
Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Mark Zhang <markzhang@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
include/linux/mlx5/device.h
include/linux/mlx5/fs.h

index fe501ba..71a08f8 100644 (file)
@@ -99,6 +99,9 @@
 #define LEFTOVERS_NUM_LEVELS 1
 #define LEFTOVERS_NUM_PRIOS 1
 
+#define RDMA_RX_COUNTERS_PRIO_NUM_LEVELS 1
+#define RDMA_TX_COUNTERS_PRIO_NUM_LEVELS 1
+
 #define BY_PASS_PRIO_NUM_LEVELS 1
 #define BY_PASS_MIN_LEVEL (ETHTOOL_MIN_LEVEL + MLX5_BY_PASS_NUM_PRIOS +\
                           LEFTOVERS_NUM_PRIOS)
@@ -206,34 +209,63 @@ static struct init_tree_node egress_root_fs = {
        }
 };
 
-#define RDMA_RX_BYPASS_PRIO 0
-#define RDMA_RX_KERNEL_PRIO 1
+enum {
+       RDMA_RX_COUNTERS_PRIO,
+       RDMA_RX_BYPASS_PRIO,
+       RDMA_RX_KERNEL_PRIO,
+};
+
+#define RDMA_RX_BYPASS_MIN_LEVEL MLX5_BY_PASS_NUM_REGULAR_PRIOS
+#define RDMA_RX_KERNEL_MIN_LEVEL (RDMA_RX_BYPASS_MIN_LEVEL + 1)
+#define RDMA_RX_COUNTERS_MIN_LEVEL (RDMA_RX_KERNEL_MIN_LEVEL + 2)
+
 static struct init_tree_node rdma_rx_root_fs = {
        .type = FS_TYPE_NAMESPACE,
-       .ar_size = 2,
+       .ar_size = 3,
        .children = (struct init_tree_node[]) {
+               [RDMA_RX_COUNTERS_PRIO] =
+               ADD_PRIO(0, RDMA_RX_COUNTERS_MIN_LEVEL, 0,
+                        FS_CHAINING_CAPS,
+                        ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
+                               ADD_MULTIPLE_PRIO(MLX5_RDMA_RX_NUM_COUNTERS_PRIOS,
+                                                 RDMA_RX_COUNTERS_PRIO_NUM_LEVELS))),
                [RDMA_RX_BYPASS_PRIO] =
-               ADD_PRIO(0, MLX5_BY_PASS_NUM_REGULAR_PRIOS, 0,
+               ADD_PRIO(0, RDMA_RX_BYPASS_MIN_LEVEL, 0,
                         FS_CHAINING_CAPS,
                         ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
                                ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_REGULAR_PRIOS,
                                                  BY_PASS_PRIO_NUM_LEVELS))),
                [RDMA_RX_KERNEL_PRIO] =
-               ADD_PRIO(0, MLX5_BY_PASS_NUM_REGULAR_PRIOS + 1, 0,
+               ADD_PRIO(0, RDMA_RX_KERNEL_MIN_LEVEL, 0,
                         FS_CHAINING_CAPS,
                         ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_SWITCH_DOMAIN,
                                ADD_MULTIPLE_PRIO(1, 1))),
        }
 };
 
+enum {
+       RDMA_TX_COUNTERS_PRIO,
+       RDMA_TX_BYPASS_PRIO,
+};
+
+#define RDMA_TX_BYPASS_MIN_LEVEL MLX5_BY_PASS_NUM_PRIOS
+#define RDMA_TX_COUNTERS_MIN_LEVEL (RDMA_TX_BYPASS_MIN_LEVEL + 1)
+
 static struct init_tree_node rdma_tx_root_fs = {
        .type = FS_TYPE_NAMESPACE,
-       .ar_size = 1,
+       .ar_size = 2,
        .children = (struct init_tree_node[]) {
-               ADD_PRIO(0, MLX5_BY_PASS_NUM_PRIOS, 0,
+               [RDMA_TX_COUNTERS_PRIO] =
+               ADD_PRIO(0, RDMA_TX_COUNTERS_MIN_LEVEL, 0,
+                        FS_CHAINING_CAPS,
+                        ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
+                               ADD_MULTIPLE_PRIO(MLX5_RDMA_TX_NUM_COUNTERS_PRIOS,
+                                                 RDMA_TX_COUNTERS_PRIO_NUM_LEVELS))),
+               [RDMA_TX_BYPASS_PRIO] =
+               ADD_PRIO(0, RDMA_TX_BYPASS_MIN_LEVEL, 0,
                         FS_CHAINING_CAPS_RDMA_TX,
                         ADD_NS(MLX5_FLOW_TABLE_MISS_ACTION_DEF,
-                               ADD_MULTIPLE_PRIO(MLX5_BY_PASS_NUM_PRIOS,
+                               ADD_MULTIPLE_PRIO(RDMA_TX_BYPASS_MIN_LEVEL,
                                                  BY_PASS_PRIO_NUM_LEVELS))),
        }
 };
@@ -2215,6 +2247,12 @@ struct mlx5_flow_namespace *mlx5_get_flow_namespace(struct mlx5_core_dev *dev,
                prio = RDMA_RX_KERNEL_PRIO;
        } else if (type == MLX5_FLOW_NAMESPACE_RDMA_TX) {
                root_ns = steering->rdma_tx_root_ns;
+       } else if (type == MLX5_FLOW_NAMESPACE_RDMA_RX_COUNTERS) {
+               root_ns = steering->rdma_rx_root_ns;
+               prio = RDMA_RX_COUNTERS_PRIO;
+       } else if (type == MLX5_FLOW_NAMESPACE_RDMA_TX_COUNTERS) {
+               root_ns = steering->rdma_tx_root_ns;
+               prio = RDMA_TX_COUNTERS_PRIO;
        } else { /* Must be NIC RX */
                root_ns = steering->root_ns;
                prio = type;
index 66eaf0a..ed0230f 100644 (file)
@@ -1456,6 +1456,8 @@ static inline u16 mlx5_to_sw_pkey_sz(int pkey_sz)
        return MLX5_MIN_PKEY_TABLE_SIZE << pkey_sz;
 }
 
+#define MLX5_RDMA_RX_NUM_COUNTERS_PRIOS 2
+#define MLX5_RDMA_TX_NUM_COUNTERS_PRIOS 1
 #define MLX5_BY_PASS_NUM_REGULAR_PRIOS 16
 #define MLX5_BY_PASS_NUM_DONT_TRAP_PRIOS 16
 #define MLX5_BY_PASS_NUM_MULTICAST_PRIOS 1
index 0106c67..f2c3da2 100644 (file)
@@ -83,6 +83,8 @@ enum mlx5_flow_namespace_type {
        MLX5_FLOW_NAMESPACE_RDMA_RX,
        MLX5_FLOW_NAMESPACE_RDMA_RX_KERNEL,
        MLX5_FLOW_NAMESPACE_RDMA_TX,
+       MLX5_FLOW_NAMESPACE_RDMA_RX_COUNTERS,
+       MLX5_FLOW_NAMESPACE_RDMA_TX_COUNTERS,
 };
 
 enum {