radeonsi: fix compute-only contexts

We can't skip redundant register updates on compute queues, at least
not all of them.

Fixes: 315231b5a519bdc14 - radeonsi: eliminate redundant compute SH register changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25390>

diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index d4d71a246b5fd31639b3688d541caeb1bdcb8290..642acb79cc9edb97769905fb2a49b53096495b2a 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -1000,8 +1000,8 @@ static void si_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info
    if (sctx->bo_list_add_all_compute_resources)
       si_compute_resources_add_all_to_bo_list(sctx);
 
-   /* Don't optimize any registers on certain CDNA chips, otherwise it would break. */
-   if (sctx->family >= CHIP_GFX940 && !sctx->screen->info.has_graphics)
+   /* Skipping setting redundant registers on compute queues breaks compute. */
+   if (!sctx->has_graphics)
       sctx->tracked_regs.other_reg_saved_mask = 0;
 
    /* First emit registers. */