arm64: dts: qcom: sm8550-qrd: add PCIe0

Add PCIe0 nodes used with WCN7851 device.  The PCIe1 is not connected,
thus skip pcie_1_phy_aux_clk input clock to GCC.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230516133011.108093-1-krzysztof.kozlowski@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
index d5a645e..88f27a6 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-qrd.dts
@@ -359,6 +359,38 @@
        };
 };
 
+&gcc {
+       clocks = <&bi_tcxo_div2>, <&sleep_clk>,
+                <&pcie0_phy>,
+                <&pcie1_phy>,
+                <0>,
+                <&ufs_mem_phy 0>,
+                <&ufs_mem_phy 1>,
+                <&ufs_mem_phy 2>,
+                <&usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK>;
+};
+
+&pcie_1_phy_aux_clk {
+       status = "disabled";
+};
+
+&pcie0 {
+       wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
+       perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
+
+       pinctrl-0 = <&pcie0_default_state>;
+       pinctrl-names = "default";
+
+       status = "okay";
+};
+
+&pcie0_phy {
+       vdda-phy-supply = <&vreg_l1e_0p88>;
+       vdda-pll-supply = <&vreg_l3e_1p2>;
+
+       status = "okay";
+};
+
 &qupv3_id_0 {
        status = "okay";
 };