*/
#include <common.h>
+#include <dm.h>
+#include <ns16550.h>
#include <asm/io.h>
#include <asm/omap_musb.h>
#include <asm/arch/am35x_def.h>
#define AM3517_IP_SW_RESET 0x48002598
#define CPGMACSS_SW_RST (1 << 1)
+#define PHY_GPIO 30
+
+/* This is only needed until SPL gets OF support */
+#ifdef CONFIG_SPL_BUILD
+static const struct ns16550_platdata am3517_serial = {
+ .base = OMAP34XX_UART3,
+ .reg_shift = 2,
+ .clock = V_NS16550_CLK,
+ .fcr = UART_FCR_DEFVAL,
+};
+
+U_BOOT_DEVICE(am3517_uart) = {
+ "ns16550_serial",
+ &am3517_serial
+};
+#endif
/*
* Routine: board_init
am3517_evm_musb_init();
- /* activate PHY reset */
- gpio_direction_output(30, 0);
- gpio_set_value(30, 0);
-
- ctr = 0;
- do {
- udelay(1000);
- ctr++;
- } while (ctr < 300);
-
- /* deactivate PHY reset */
- gpio_set_value(30, 1);
-
- /* allow the PHY to stabilize and settle down */
- ctr = 0;
- do {
- udelay(1000);
- ctr++;
- } while (ctr < 300);
-
- /* ensure that the module is out of reset */
- reset = readl(AM3517_IP_SW_RESET);
- reset &= (~CPGMACSS_SW_RST);
- writel(reset,AM3517_IP_SW_RESET);
+ if (gpio_request(PHY_GPIO, "gpio_30") == 0) {
+ /* activate PHY reset */
+ gpio_direction_output(PHY_GPIO, 0);
+ gpio_set_value(PHY_GPIO, 0);
+
+ ctr = 0;
+ do {
+ udelay(1000);
+ ctr++;
+ } while (ctr < 300);
+
+ /* deactivate PHY reset */
+ gpio_set_value(PHY_GPIO, 1);
+
+ /* allow the PHY to stabilize and settle down */
+ ctr = 0;
+ do {
+ udelay(1000);
+ ctr++;
+ } while (ctr < 300);
+
+ /* ensure that the module is out of reset */
+ reset = readl(AM3517_IP_SW_RESET);
+ reset &= (~CPGMACSS_SW_RST);
+ writel(reset, AM3517_IP_SW_RESET);
+
+ /* Free requested GPIO */
+ gpio_free(PHY_GPIO);
+ }
return 0;
}
CONFIG_SYS_TEXT_BASE=0x80100000
CONFIG_TI_COMMON_CMD_OPTIONS=y
# CONFIG_SPL_GPIO_SUPPORT is not set
+CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_TARGET_AM3517_EVM=y
CONFIG_EMIF4=y
+CONFIG_DEFAULT_DEVICE_TREE="am3517-evm"
CONFIG_BOOTDELAY=10
CONFIG_VERSION_VARIABLE=y
CONFIG_SPL=y
+CONFIG_SPL_SYS_MALLOC_SIMPLE=y
# CONFIG_SPL_EXT_SUPPORT is not set
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_HUSH_PARSER=y
# CONFIG_CMD_TIME is not set
CONFIG_CMD_UBI=y
CONFIG_SPL_PARTITION_UUIDS=y
+CONFIG_OF_CONTROL=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_MMC_OMAP_HS=y
CONFIG_NAND=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_MUSB_HOST=y
-CONFIG_USB_STORAGE=y
# CONFIG_FAT_WRITE is not set
CONFIG_BCH=y
-CONFIG_OF_LIBFDT=y
* header. That is 0x800FFFC0--0x80100000 should not be used for any
* other needs.
*/
+
#define CONFIG_SYS_TEXT_BASE 0x80100000
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
/* Hardware drivers */
-/* NS16550 Configuration */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-
-/* select serial console configuration */
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
-#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
-
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#endif /* CONFIG_USB_MUSB_AM35X */
/* I2C */
-#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SPL_FRAMEWORK
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE 0x40200000
-#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
- CONFIG_SPL_TEXT_BASE)
#undef CONFIG_SPL_BSS_START_ADDR
#define CONFIG_SPL_BSS_START_ADDR 0x80000000