i386: Allow only registers with VALID_INT_MODE_P modes in movstrict<mode> [PR93997]
authorUros Bizjak <ubizjak@gmail.com>
Mon, 2 Mar 2020 20:13:36 +0000 (21:13 +0100)
committerUros Bizjak <ubizjak@gmail.com>
Mon, 2 Mar 2020 20:13:36 +0000 (21:13 +0100)
*movstrict<mode>_1 insn pattern allows only general registers,
so we have to reject modes not suitable for general regs in
corresponding movstrict<mode> expander.

PR target/93997
* config/i386/i386.md (movstrict<mode>): Allow only
registers with VALID_INT_MODE_P modes.

testsuite/ChangeLog:

PR target/93997
* gcc.target/i386/pr93997.c: New test.

gcc/ChangeLog
gcc/config/i386/i386.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/i386/pr93997.c [new file with mode: 0644]

index 0d65434..d27b74a 100644 (file)
@@ -1,3 +1,9 @@
+2020-03-02  Uroš Bizjak  <ubizjak@gmail.com>
+
+       PR target/93997
+       * config/i386/i386.md (movstrict<mode>): Allow only
+       registers with VALID_INT_MODE_P modes.
+
 2020-03-02  Andrew Stubbs  <ams@codesourcery.com>
 
        * config/gcn/gcn-valu.md (dpp_move<mode>): New.
index 6c57500..8e29dff 100644 (file)
 {
   gcc_assert (SUBREG_P (operands[0]));
   if ((TARGET_PARTIAL_REG_STALL && optimize_function_for_speed_p (cfun))
-      || GET_MODE_CLASS (GET_MODE (SUBREG_REG (operands[0]))) != MODE_INT)
+      || !VALID_INT_MODE_P (GET_MODE (SUBREG_REG (operands[0]))))
     FAIL;
 })
 
index e18c6a9..e43c554 100644 (file)
@@ -1,3 +1,8 @@
+2020-03-02  Uroš Bizjak  <ubizjak@gmail.com>
+
+       PR target/93997
+       * gcc.target/i386/pr93997.c: New test.
+
 2020-03-02  Martin Sebor  <msebor@redhat.com>
 
        PR tree-optimization/92982
diff --git a/gcc/testsuite/gcc.target/i386/pr93997.c b/gcc/testsuite/gcc.target/i386/pr93997.c
new file mode 100644 (file)
index 0000000..350d1ea
--- /dev/null
@@ -0,0 +1,4 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-options "-march=athlon-4" } */
+
+#include "../../c-c++-common/vector-scalar.c"