engicam: Move uart mux init to SPL
authorJagan Teki <jagan@amarulasolutions.com>
Sat, 6 May 2017 21:13:06 +0000 (02:43 +0530)
committerStefano Babic <sbabic@denx.de>
Thu, 18 May 2017 09:23:31 +0000 (11:23 +0200)
Since, u-boot handle fdt through uart so move the UART code
to SPL instead make it to global area.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
board/engicam/geam6ul/geam6ul.c
board/engicam/icorem6/icorem6.c
board/engicam/icorem6_rqs/icorem6_rqs.c
board/engicam/isiotmx6ul/isiotmx6ul.c

index eb0e533..c3d92ac 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
-       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
-       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-static iomux_v3_cfg_t const uart1_pads[] = {
-       MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-       MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-int board_early_init_f(void)
-{
-       imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-
-       return 0;
-}
-
 #ifdef CONFIG_NAND_MXS
 
 #define GPMI_PAD_CTRL0         (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
@@ -173,6 +157,15 @@ int dram_init(void)
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-ddr.h>
 
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
+       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
+       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const uart1_pads[] = {
+       MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+       MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
 /* MMC board initialization is needed till adding DM support in SPL */
 #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
 #include <mmc.h>
@@ -341,7 +334,7 @@ void board_init_f(ulong dummy)
        ccgr_init();
 
        /* iomux and setup of i2c */
-       board_early_init_f();
+       imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
 
        /* setup GP timer */
        timer_init();
index c8aaad1..8c62f0e 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
-       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
-       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-static iomux_v3_cfg_t const uart4_pads[] = {
-       IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-       IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-};
-
 #ifdef CONFIG_NAND_MXS
 
 #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
@@ -199,13 +190,6 @@ static void setup_display(void)
 }
 #endif /* CONFIG_VIDEO_IPUV3 */
 
-int board_early_init_f(void)
-{
-       SETUP_IOMUX_PADS(uart4_pads);
-
-       return 0;
-}
-
 #ifdef CONFIG_ENV_IS_IN_MMC
 static void mmc_late_init(void)
 {
@@ -281,6 +265,15 @@ int dram_init(void)
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-ddr.h>
 
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
+       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
+       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const uart4_pads[] = {
+       IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+       IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
 /* MMC board initialization is needed till adding DM support in SPL */
 #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
 #include <mmc.h>
@@ -617,7 +610,7 @@ void board_init_f(ulong dummy)
        gpr_init();
 
        /* iomux */
-       board_early_init_f();
+       SETUP_IOMUX_PADS(uart4_pads);
 
        /* setup GP timer */
        timer_init();
index 2027b28..d6ca62d 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
-       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
-       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-static iomux_v3_cfg_t const uart4_pads[] = {
-       IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-       IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
-};
-
-int board_early_init_f(void)
-{
-       SETUP_IOMUX_PADS(uart4_pads);
-
-       return 0;
-}
-
 int board_init(void)
 {
        /* Address of boot parameters */
@@ -110,6 +94,15 @@ int dram_init(void)
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-ddr.h>
 
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |            \
+       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED |               \
+       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const uart4_pads[] = {
+       IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+       IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)),
+};
+
 /* MMC board initialization is needed till adding DM support in SPL */
 #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
 #include <mmc.h>
@@ -488,7 +481,7 @@ void board_init_f(ulong dummy)
        gpr_init();
 
        /* iomux */
-       board_early_init_f();
+       SETUP_IOMUX_PADS(uart4_pads);
 
        /* setup GP timer */
        timer_init();
index 5d1c693..008a7ae 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE | \
-                       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
-                       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
-
-static iomux_v3_cfg_t const uart1_pads[] = {
-       MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
-       MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
-};
-
-int board_early_init_f(void)
-{
-       imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
-
-       return 0;
-}
-
 #ifdef CONFIG_NAND_MXS
 
 #define GPMI_PAD_CTRL0         (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
@@ -185,6 +169,15 @@ int dram_init(void)
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-ddr.h>
 
+#define UART_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE | \
+                       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
+                       PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
+
+static iomux_v3_cfg_t const uart1_pads[] = {
+       MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+       MX6_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
 /* MMC board initialization is needed till adding DM support in SPL */
 #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
 #include <mmc.h>
@@ -402,7 +395,7 @@ void board_init_f(ulong dummy)
        ccgr_init();
 
        /* iomux and setup of i2c */
-       board_early_init_f();
+       imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
 
        /* setup GP timer */
        timer_init();