drm/amd/display: Move call to disable DPG
authorWesley Chalmers <wchalmer@amd.com>
Wed, 20 May 2020 19:32:31 +0000 (15:32 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Jul 2020 05:59:20 +0000 (01:59 -0400)
[WHY]
Disabling DPG should happen after setting watermarks and clocks

Signed-off-by: Wesley Chalmers <wchalmer@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc.c

index 5b7466a..49dd310 100644 (file)
@@ -1248,7 +1248,6 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c
        int i, k, l;
        struct dc_stream_state *dc_streams[MAX_STREAMS] = {0};
 
-       disable_dangling_plane(dc, context);
 
        for (i = 0; i < context->stream_count; i++)
                dc_streams[i] =  context->streams[i];
@@ -1264,6 +1263,7 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c
        if (dc->optimize_seamless_boot_streams == 0)
                dc->hwss.prepare_bandwidth(dc, context);
 
+       disable_dangling_plane(dc, context);
        /* re-program planes for existing stream, in case we need to
         * free up plane resource for later use
         */