}
static void
-intel_glFlush(struct gl_context *ctx)
+intel_glFlush(struct gl_context *ctx, unsigned gallium_flush_flags)
{
struct intel_context *intel = intel_context(ctx);
}
static void
-brw_glFlush(struct gl_context *ctx)
+brw_glFlush(struct gl_context *ctx, unsigned gallium_flush_flags)
{
struct brw_context *brw = brw_context(ctx);
{
struct brw_context *brw = brw_context(ctx);
- brw_glFlush(ctx);
+ brw_glFlush(ctx, 0);
if (brw->batch.last_bo)
brw_bo_wait_rendering(brw->batch.last_bo);
}
static void
-nouveau_flush(struct gl_context *ctx)
+nouveau_flush(struct gl_context *ctx, unsigned gallium_flush_flags)
{
struct nouveau_context *nctx = to_nouveau_context(ctx);
struct nouveau_pushbuf *push = context_push(ctx);
struct nouveau_pushbuf_refn refn =
{ nctx->fence, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR };
- nouveau_flush(ctx);
+ nouveau_flush(ctx, 0);
if (!nouveau_pushbuf_space(push, 16, 0, 0) &&
!nouveau_pushbuf_refn(push, &refn, 1)) {
}
/* Flush is needed to make sure that source buffer has correct data */
- radeonFlush(&r200->radeon.glCtx);
+ radeonFlush(&r200->radeon.glCtx, 0);
rcommonEnsureCmdBufSpace(&r200->radeon, 102, __func__);
reg_width, reg_height,
flip_y);
- radeonFlush(ctx);
+ radeonFlush(ctx, 0);
/* We submitted those packets outside our state atom mechanism. Thus
* make sure the atoms are resubmitted the next time. */
BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL |
BUFFER_BIT_COLOR0;
- radeonFlush( ctx );
+ radeonFlush( ctx, 0 );
hwmask = mask & hwbits;
swmask = mask & ~hwbits;
}
/* Flush is needed to make sure that source buffer has correct data */
- radeonFlush(ctx);
+ radeonFlush(ctx, 0);
rcommonEnsureCmdBufSpace(&r100->radeon, 59, __func__);
reg_width, reg_height,
flip_y);
- radeonFlush(ctx);
+ radeonFlush(ctx, 0);
/* We submitted those packets outside our state atom mechanism. Thus
* make sure they are all resubmitted the next time. */
(access & (GL_MAP_READ_BIT | GL_MAP_WRITE_BIT)) == GL_MAP_WRITE_BIT;
if (write_only) {
- ctx->Driver.Flush(ctx);
+ ctx->Driver.Flush(ctx, 0);
}
if (radeon_obj->bo == NULL) {
static inline void radeon_firevertices(radeonContextPtr radeon)
{
if (radeon->cmdbuf.cs->cdw || radeon->dma.flush )
- radeon->glCtx.Driver.Flush(&radeon->glCtx); /* +r6/r7 */
+ radeon->glCtx.Driver.Flush(&radeon->glCtx, 0); /* +r6/r7 */
}
#endif
if (_mesa_is_winsys_fbo(ctx->DrawBuffer)) {
if (_mesa_is_front_buffer_drawing(ctx->DrawBuffer)) {
- ctx->Driver.Flush(ctx);
+ ctx->Driver.Flush(ctx, 0);
}
radeon_update_renderbuffers(driContext, driContext->driDrawablePriv, GL_FALSE);
if (driContext->driDrawablePriv != driContext->driReadablePriv)
}
-void radeonFlush(struct gl_context *ctx)
+void radeonFlush(struct gl_context *ctx, unsigned gallium_flush_flags)
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
if (RADEON_DEBUG & RADEON_IOCTL)
int i;
if (ctx->Driver.Flush)
- ctx->Driver.Flush(ctx); /* +r6/r7 */
+ ctx->Driver.Flush(ctx, 0); /* +r6/r7 */
for (i = 0; i < fb->_NumColorDrawBuffers; i++) {
struct radeon_renderbuffer *rrb;
extern uint32_t radeonGetAge(radeonContextPtr radeon);
-void radeonFlush(struct gl_context *ctx);
+void radeonFlush(struct gl_context *ctx, unsigned gallium_flush_flags);
void radeonFinish(struct gl_context * ctx);
void radeonEmitState(radeonContextPtr radeon);
GLuint radeonCountStateEmitSize(radeonContextPtr radeon);
rb->_BaseFormat = _mesa_base_fbo_format(ctx, internalFormat);
if (ctx->Driver.Flush)
- ctx->Driver.Flush(ctx); /* +r6/r7 */
+ ctx->Driver.Flush(ctx, 0); /* +r6/r7 */
if (rrb->bo)
radeon_bo_unref(rrb->bo);
rrb = radeon_renderbuffer(rb);
if (ctx->Driver.Flush)
- ctx->Driver.Flush(ctx); /* +r6/r7 */
+ ctx->Driver.Flush(ctx, 0); /* +r6/r7 */
if (rrb->bo)
radeon_bo_unref(rrb->bo);
{
if (ctx->Driver.Flush)
- ctx->Driver.Flush(ctx); /* +r6/r7 */
+ ctx->Driver.Flush(ctx, 0); /* +r6/r7 */
radeon_print(RADEON_TEXTURE, RADEON_TRACE,
"%s(%p, fb %p, rb %p) \n",
radeon_image->used_as_render_target = GL_FALSE;
if (ctx->Driver.Flush)
- ctx->Driver.Flush(ctx); /* +r6/r7 */
+ ctx->Driver.Flush(ctx, 0); /* +r6/r7 */
}
static void
radeon_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
extern void radeonFlushCmdBuf( r100ContextPtr rmesa, const char * );
-extern void radeonFlush( struct gl_context *ctx );
+extern void radeonFlush( struct gl_context *ctx, unsigned gallium_flush_flags );
extern void radeonFinish( struct gl_context *ctx );
extern void radeonInitIoctlFuncs( struct gl_context *ctx );
extern void radeonGetAllParams( r100ContextPtr rmesa );
/* If the cmdbuf with packets for this query hasn't been flushed yet, do it now */
if (radeon_bo_is_referenced_by_cs(query->bo, radeon->cmdbuf.cs))
- ctx->Driver.Flush(ctx);
+ ctx->Driver.Flush(ctx, 0);
radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s: query id %d, bo %p, offset %d\n", __func__, q->Id, query->bo, query->curr_offset);
/* Need to perform a flush, as per ARB_occlusion_query spec */
if (radeon_bo_is_referenced_by_cs(query->bo, radeon->cmdbuf.cs)) {
- ctx->Driver.Flush(ctx);
+ ctx->Driver.Flush(ctx, 0);
}
if (radeon_bo_is_busy(query->bo, &domain) == 0) {
radeonContextPtr rmesa;
rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate;
- radeonFlush(&rmesa->glCtx);
+ radeonFlush(&rmesa->glCtx, 0);
}
static const struct __DRI2flushExtensionRec radeonFlushExtension = {
static void
-finish_or_flush( struct gl_context *ctx )
+finish(struct gl_context *ctx)
{
const XMesaContext xmesa = XMESA_CONTEXT(ctx);
if (xmesa) {
}
+static void
+flush(struct gl_context *ctx, unsigned gallium_flush_flags)
+{
+ finish(ctx);
+}
+
+
/* Implements glColorMask() */
static void
color_mask(struct gl_context *ctx,
{
driver->GetString = get_string;
driver->UpdateState = xmesa_update_state;
- driver->Flush = finish_or_flush;
- driver->Finish = finish_or_flush;
+ driver->Flush = flush;
+ driver->Finish = finish;
driver->ColorMask = color_mask;
driver->Enable = enable;
driver->Viewport = xmesa_viewport;
_mesa_debug(ctx, "SwapBuffers\n");
FLUSH_VERTICES(ctx, 0, 0);
if (ctx->Driver.Flush) {
- ctx->Driver.Flush(ctx);
+ ctx->Driver.Flush(ctx, 0);
}
}
curCtx != newCtx &&
curCtx->Const.ContextReleaseBehavior ==
GL_CONTEXT_RELEASE_BEHAVIOR_FLUSH) {
- _mesa_flush(curCtx);
+ FLUSH_VERTICES(curCtx, 0, 0);
+ if (curCtx->Driver.Flush)
+ curCtx->Driver.Flush(curCtx, 0);
}
/* Call this periodically to detect when the user has begun using
{
FLUSH_VERTICES(ctx, 0, 0);
if (ctx->Driver.Flush) {
- ctx->Driver.Flush(ctx);
+ ctx->Driver.Flush(ctx, 0);
}
}
/**
* This is called whenever glFlush() is called.
*/
- void (*Flush)( struct gl_context *ctx );
+ void (*Flush)(struct gl_context *ctx, unsigned gallium_flush_flags);
/**
* Clear the color/depth/stencil/accum buffer(s).
if (!obj->Ready) {
if (flags == GL_PERFQUERY_FLUSH_INTEL) {
- ctx->Driver.Flush(ctx);
+ ctx->Driver.Flush(ctx, 0);
} else if (flags == GL_PERFQUERY_WAIT_INTEL) {
ctx->Driver.WaitPerfQuery(ctx, obj);
obj->Ready = true;
* Called via ctx->Driver.Flush()
*/
static void
-st_glFlush(struct gl_context *ctx)
+st_glFlush(struct gl_context *ctx, unsigned gallium_flush_flags)
{
struct st_context *st = st_context(ctx);
* synchronization issues. Calling finish() here will just hide
* problems that need to be fixed elsewhere.
*/
- st_flush(st, NULL, 0);
+ st_flush(st, NULL, gallium_flush_flags);
st_manager_flush_frontbuffer(st);
}