pq: add yuv full to rgb full feature [2/2]
authorYong Qin <yong.qin@amlogic.com>
Thu, 17 Oct 2019 02:29:51 +0000 (10:29 +0800)
committerTao Zeng <tao.zeng@amlogic.com>
Wed, 30 Oct 2019 07:10:25 +0000 (00:10 -0700)
PD#SWPL-15366

Problem:
according source type, add YUV full to RGB Full

Solution:
according source type, add YUV full to RGB Full

Verify:
TL1

Change-Id: I1afb7bc56161dee87d055a7686d99377db954be4
Signed-off-by: Yong Qin <yong.qin@amlogic.com>
drivers/amlogic/media/enhancement/amvecm/amcsc.c
drivers/amlogic/media/enhancement/amvecm/amvecm.c
drivers/amlogic/media/enhancement/amvecm/set_hdr2_v0.c

index 1de0797..b148d0e 100644 (file)
@@ -3770,6 +3770,7 @@ int signal_type_changed(struct vframe_s *vf,
        struct vframe_master_display_colour_s *p_new = NULL;
        struct vframe_master_display_colour_s cus;
        int ret;
+       u32 limit_full = 0;
 
        if (!vf)
                return 0;
@@ -3782,6 +3783,7 @@ int signal_type_changed(struct vframe_s *vf,
                }
        } else
                cur_mvc_type[vd_path] = 0;
+       limit_full = (vf->signal_type >> 25) & 0x01;
        if ((vf->source_type == VFRAME_SOURCE_TYPE_TUNER) ||
                (vf->source_type == VFRAME_SOURCE_TYPE_CVBS) ||
                (vf->source_type == VFRAME_SOURCE_TYPE_COMP) ||
@@ -3801,7 +3803,7 @@ int signal_type_changed(struct vframe_s *vf,
                                /* default 709 limit */
                                  (1 << 29)     /* video available */
                                | (5 << 26)     /* unspecified */
-                               | (0 << 25)     /* limit */
+                               | (limit_full << 25)    /* limit */
                                | (1 << 24)     /* color available */
                                | (1 << 16)     /* bt709 */
                                | (1 << 8)      /* bt709 */
@@ -7015,7 +7017,7 @@ static void video_process(
                        mtx_setting(POST2_MTX, MATRIX_NULL, MTX_OFF);
                else
                        mtx_setting(POST2_MTX,
-                               MATRIX_YUV709_RGB, MTX_ON);
+                               csc_type/*MATRIX_YUV709_RGB*/, MTX_ON);
        }
 
        if (cur_hdr_process_mode[vd_path] !=
index 7c43948..c288c7d 100644 (file)
@@ -6003,6 +6003,12 @@ static ssize_t amvecm_debug_store(struct class *cla,
                                goto free_buf;
                }
                gmv_th = val;
+       } else if (!strcmp(parm[0], "post2mtx")) {
+               if (parm[1]) {
+                       if (kstrtoul(parm[1], 16, &val) < 0)
+                               goto free_buf;
+                       mtx_setting(POST2_MTX, val, 1);
+               }
        } else
                pr_info("unsupport cmd\n");
 
index be6c639..9981c97 100644 (file)
@@ -2750,7 +2750,20 @@ void mtx_setting(enum vpp_matrix_e mtx_sel,
                WRITE_VPP_REG(matrix_pre_offset0_1, 0x7c00600);
                WRITE_VPP_REG(matrix_pre_offset2, 0x00000600);
                break;
+       case MATRIX_YUV709F_RGB:/*full to full*/
+               WRITE_VPP_REG(matrix_coef00_01, 0x04000000);
+               WRITE_VPP_REG(matrix_coef02_10, 0x064D0400);
+               WRITE_VPP_REG(matrix_coef11_12, 0x1F411E21);
+               WRITE_VPP_REG(matrix_coef20_21, 0x0400076D);
+               WRITE_VPP_REG(matrix_coef22, 0x0);
+               WRITE_VPP_REG(matrix_offset0_1, 0x0);
+               WRITE_VPP_REG(matrix_offset2, 0x0);
+               WRITE_VPP_REG(matrix_pre_offset0_1, 0x0000600);
+               WRITE_VPP_REG(matrix_pre_offset2, 0x00000600);
+               break;
        default:
                break;
        }
+
+       /*pr_info("mtx_sel:%d, mtx_csc:0x%x\n", mtx_sel, mtx_csc);*/
 }