mips: bmips: dts: add BCM63268 reset controller support

BCM63268 SoCs have a reset controller for certain components.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
index 5acb49b6186782eae8b412a6587d645de4702405..e0021ff9f144d61eb3bdf908c6b69eaef52db953 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm63268.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -70,6 +70,12 @@
                        mask = <0x1>;
                };
 
+               periph_rst: reset-controller@10000010 {
+                       compatible = "brcm,bcm6345-reset";
+                       reg = <0x10000010 0x4>;
+                       #reset-cells = <1>;
+               };
+
                periph_intc: interrupt-controller@10000020 {
                        compatible = "brcm,bcm6345-l1-intc";
                        reg = <0x10000020 0x20>,

diff --git a/include/dt-bindings/reset/bcm63268-reset.h b/include/dt-bindings/reset/bcm63268-reset.h
new file mode 100644 (file)
index 0000000..6a6403a
--- /dev/null
+++ b/include/dt-bindings/reset/bcm63268-reset.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __DT_BINDINGS_RESET_BCM63268_H
+#define __DT_BINDINGS_RESET_BCM63268_H
+
+#define BCM63268_RST_SPI       0
+#define BCM63268_RST_IPSEC     1
+#define BCM63268_RST_EPHY      2
+#define BCM63268_RST_SAR       3
+#define BCM63268_RST_ENETSW    4
+#define BCM63268_RST_USBS      5
+#define BCM63268_RST_USBH      6
+#define BCM63268_RST_PCM       7
+#define BCM63268_RST_PCIE_CORE 8
+#define BCM63268_RST_PCIE      9
+#define BCM63268_RST_PCIE_EXT  10
+#define BCM63268_RST_WLAN_SHIM 11
+#define BCM63268_RST_DDR_PHY   12
+#define BCM63268_RST_FAP0      13
+#define BCM63268_RST_WLAN_UBUS 14
+#define BCM63268_RST_DECT      15
+#define BCM63268_RST_FAP1      16
+#define BCM63268_RST_PCIE_HARD 17
+#define BCM63268_RST_GPHY      18
+
+#endif /* __DT_BINDINGS_RESET_BCM63268_H */