[AArch64 costs 8/18] Cost memory accesses using address costs

git cherry-pick af27409

gcc/

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
	costs when costing loads and stores to memory.

Change-Id: Ic64179e010a9cd643f5adc30fb6fc378cbc6a144
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@210500 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7d2755b..d648b71 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,10 @@
 2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
+           Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
+
+       * config/aarch64/aarch64.c (aarch64_rtx_costs): Use address
+       costs when costing loads and stores to memory.
+
+2014-05-16  James Greenhalgh  <james.greenhalgh@arm.com>
            Philip Tomsich  <philipp.tomsich@theobroma-systems.com>
 
        * config/aarch64/aarch64.c (aarch64_rtx_costs): Improve costing

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index f854209..03810fc 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -142,6 +142,7 @@ static bool aarch64_const_vec_all_same_int_p (rtx,
 
 static bool aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode,
                                                 const unsigned char *sel);
+static int aarch64_address_cost (rtx, enum machine_mode, addr_space_t, bool);
 
 /* The processor for which instructions should be scheduled.  */
 enum aarch64_processor aarch64_tune = cortexa53;
@@ -4820,7 +4821,19 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
        {
        case MEM:
          if (speed)
-           *cost += extra_cost->ldst.store;
+           {
+             rtx address = XEXP (op0, 0);
+             if (GET_MODE_CLASS (mode) == MODE_INT)
+               *cost += extra_cost->ldst.store;
+             else if (mode == SFmode)
+               *cost += extra_cost->ldst.storef;
+             else if (mode == DFmode)
+               *cost += extra_cost->ldst.stored;
+
+             *cost +=
+               COSTS_N_INSNS (aarch64_address_cost (address, mode,
+                                                    0, speed));
+           }
 
          *cost += rtx_cost (op1, SET, 1, speed);
          return true;
@@ -4933,7 +4946,22 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED,
 
     case MEM:
       if (speed)
-       *cost += extra_cost->ldst.load;
+       {
+         /* For loads we want the base cost of a load, plus an
+            approximation for the additional cost of the addressing
+            mode.  */
+         rtx address = XEXP (x, 0);
+         if (GET_MODE_CLASS (mode) == MODE_INT)
+           *cost += extra_cost->ldst.load;
+         else if (mode == SFmode)
+           *cost += extra_cost->ldst.loadf;
+         else if (mode == DFmode)
+           *cost += extra_cost->ldst.loadd;
+
+         *cost +=
+               COSTS_N_INSNS (aarch64_address_cost (address, mode,
+                                                    0, speed));
+       }
 
       return true;