T104xD4RDB: Add qe node to t104xd4rdb
authorZhao Qiang <qiang.zhao@nxp.com>
Tue, 17 May 2016 02:39:01 +0000 (10:39 +0800)
committerScott Wood <oss@buserror.net>
Sat, 9 Jul 2016 06:12:04 +0000 (01:12 -0500)
add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
arch/powerpc/boot/dts/fsl/t104xd4rdb.dtsi

index d3fbe72..44e399b 100644 (file)
                };
        };
 };
+
+&qe {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       device_type = "qe";
+       compatible = "fsl,qe";
+       fsl,qe-num-riscs = <1>;
+       fsl,qe-num-snums = <28>;
+
+       qeic: interrupt-controller@80 {
+               interrupt-controller;
+               compatible = "fsl,qe-ic";
+               #address-cells = <0>;
+               #interrupt-cells = <1>;
+               reg = <0x80 0x80>;
+               interrupts = <95 2 0 0  94 2 0 0>; //high:79 low:78
+       };
+
+       ucc@2000 {
+               cell-index = <1>;
+               reg = <0x2000 0x200>;
+               interrupts = <32>;
+               interrupt-parent = <&qeic>;
+       };
+
+       ucc@2200 {
+               cell-index = <3>;
+               reg = <0x2200 0x200>;
+               interrupts = <34>;
+               interrupt-parent = <&qeic>;
+       };
+
+       muram@10000 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "fsl,qe-muram", "fsl,cpm-muram";
+               ranges = <0x0 0x10000 0x6000>;
+
+               data-only@0 {
+                       compatible = "fsl,qe-muram-data",
+                       "fsl,cpm-muram-data";
+                       reg = <0x0 0x6000>;
+               };
+       };
+};
index 8c7ea6c..863f943 100644 (file)
                                  0 0x00010000>;
                };
        };
+
+       qe: qe@ffe140000 {
+               ranges = <0x0 0xf 0xfe140000 0x40000>;
+               reg = <0xf 0xfe140000 0 0x480>;
+               brg-frequency = <0>;
+               bus-frequency = <0>;
+
+               si1: si@700 {
+                       compatible = "fsl,t1040-qe-si";
+                       reg = <0x700 0x80>;
+               };
+
+               siram1: siram@1000 {
+                       compatible = "fsl,t1040-qe-siram";
+                       reg = <0x1000 0x800>;
+               };
+
+               ucc_hdlc: ucc@2000 {
+                       compatible = "fsl,ucc-hdlc";
+                       rx-clock-name = "clk8";
+                       tx-clock-name = "clk9";
+                       fsl,rx-sync-clock = "rsync_pin";
+                       fsl,tx-sync-clock = "tsync_pin";
+                       fsl,tx-timeslot-mask = <0xfffffffe>;
+                       fsl,rx-timeslot-mask = <0xfffffffe>;
+                       fsl,tdm-framer-type = "e1";
+                       fsl,tdm-id = <0>;
+                       fsl,siram-entry-id = <0>;
+                       fsl,tdm-interface;
+               };
+
+               ucc_serial: ucc@2200 {
+                       compatible = "fsl,t1040-ucc-uart";
+                       port-number = <0>;
+                       rx-clock-name = "brg2";
+                       tx-clock-name = "brg2";
+               };
+       };
 };