SH4: kill a few warnings
authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Sun, 7 Dec 2008 22:46:42 +0000 (22:46 +0000)
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Sun, 7 Dec 2008 22:46:42 +0000 (22:46 +0000)
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5938 c046a42c-6fe2-441c-8c8c-71466251a162

hw/ide.c
hw/pci.h
hw/r2d.c
hw/sh_intc.c
hw/sm501.c
target-sh4/translate.c

index 4a1213d30fc010be56a0bd19ca94c12772b2f4cd..32cfe20dbb05ac13c2fa7033695ca9d99bd47c6f 100644 (file)
--- a/hw/ide.c
+++ b/hw/ide.c
@@ -31,6 +31,7 @@
 #include "qemu-timer.h"
 #include "sysemu.h"
 #include "ppc_mac.h"
+#include "sh.h"
 
 /* debug IDE devices */
 //#define DEBUG_IDE
index e870987fe9aa1c2d3a2b12e429f3c9fcb8d92f18..ae5f8d31466e06c3ad157db613d95bdb7eb9b06f 100644 (file)
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -139,4 +139,8 @@ PCIBus *pci_prep_init(qemu_irq *pic);
 PCIBus *pci_apb_init(target_phys_addr_t special_base, target_phys_addr_t mem_base,
                      qemu_irq *pic);
 
+/* sh_pci.c */
+PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
+                            qemu_irq *pic, int devfn_min, int nirq);
+
 #endif
index 78fc1979402fbde746f5bf55bea32fb89e771620..5d5eb1e498b6631f78d1638163ce71353b21e85d 100644 (file)
--- a/hw/r2d.c
+++ b/hw/r2d.c
@@ -240,8 +240,8 @@ static void r2d_init(ram_addr_t ram_size, int vga_ram_size,
       /* initialization which should be done by firmware */
       uint32_t bcr1 = 1 << 3; /* cs3 SDRAM */
       uint16_t bcr2 = 3 << (3 * 2); /* cs3 32-bit */
-      cpu_physical_memory_write(SH7750_BCR1_A7, &bcr1, 4);
-      cpu_physical_memory_write(SH7750_BCR2_A7, &bcr2, 2);
+      cpu_physical_memory_write(SH7750_BCR1_A7, (uint8_t *)&bcr1, 4);
+      cpu_physical_memory_write(SH7750_BCR2_A7, (uint8_t *)&bcr2, 2);
 
       kernel_size = load_image(kernel_filename, phys_ram_base);
 
index 7d738d16ca294c93167ca6cba893abbcbefbd803..136e7dd216dd943e2516680858a6302d293adc0a 100644 (file)
@@ -73,7 +73,7 @@ void sh_intc_toggle_source(struct intc_source *source,
   }
 }
 
-void sh_intc_set_irq (void *opaque, int n, int level)
+static void sh_intc_set_irq (void *opaque, int n, int level)
 {
   struct intc_desc *desc = opaque;
   struct intc_source *source = &(desc->sources[n]);
index 1704ddef51c92ec128ccdf02a1079141959fb150..54d176b83fa7b9c39b85b7be447956436acfa717 100644 (file)
@@ -27,6 +27,7 @@
 #include "hw.h"
 #include "pc.h"
 #include "console.h"
+#include "devices.h"
 
 /*
  * Status: 2008/11/02
index 50b82e080c387ed889cefd61a1a626de3c8660a4..d6cfb7c8126dd10f325c15346e5bbf5f0c4cf0e8 100644 (file)
@@ -71,7 +71,7 @@ static TCGv_ptr cpu_env;
 static TCGv cpu_gregs[24];
 static TCGv cpu_pc, cpu_sr, cpu_ssr, cpu_spc, cpu_gbr;
 static TCGv cpu_vbr, cpu_sgr, cpu_dbr, cpu_mach, cpu_macl;
-static TCGv cpu_pr, cpu_fpscr, cpu_fpul, cpu_flags;
+static TCGv cpu_pr, cpu_fpscr, cpu_fpul;
 static TCGv cpu_fregs[32];
 
 /* internal register indexes */
@@ -181,7 +181,7 @@ void cpu_dump_state(CPUState * env, FILE * f,
     }
 }
 
-void cpu_sh4_reset(CPUSH4State * env)
+static void cpu_sh4_reset(CPUSH4State * env)
 {
 #if defined(CONFIG_USER_ONLY)
     env->sr = SR_FD;            /* FD - kernel does lazy fpu context switch */