RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config()

[ Upstream commit e482d9e33d5b0f222cbef7341dcd52cead6b9edc ]

The reg_val check in kvm_riscv_vcpu_set_reg_config() should only
be done for isa config register.

Fixes: 9bfd900beeec ("RISC-V: KVM: Improve ISA extension by using a bitmap")
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 71ebbc4821f0e34fbb0f5bcdfb1b4f9a654cd236..5174ef54ad1d9e05f111ec2f48dcacecb51ca6eb 100644 (file)
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -296,12 +296,15 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
        if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))
                return -EFAULT;
 
-       /* This ONE REG interface is only defined for single letter extensions */
-       if (fls(reg_val) >= RISCV_ISA_EXT_BASE)
-               return -EINVAL;
-
        switch (reg_num) {
        case KVM_REG_RISCV_CONFIG_REG(isa):
+               /*
+                * This ONE REG interface is only defined for
+                * single letter extensions.
+                */
+               if (fls(reg_val) >= RISCV_ISA_EXT_BASE)
+                       return -EINVAL;
+
                if (!vcpu->arch.ran_atleast_once) {
                        /* Ignore the enable/disable request for certain extensions */
                        for (i = 0; i < RISCV_ISA_EXT_BASE; i++) {