lib: Add MI_LOAD_REGISTER_IMM

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>

diff --git a/lib/intel_reg.h b/lib/intel_reg.h
index 56459ea..f0fc5fd 100644 (file)
--- a/lib/intel_reg.h
+++ b/lib/intel_reg.h
@@ -2545,6 +2545,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW     (1<<1)
 
 #define MI_LOAD_SCAN_LINES_INCL                (0x12<<23)
+#define MI_LOAD_REGISTER_IMM           ((0x22 << 23) | 1)
 
 /* Flush */
 #define MI_FLUSH                       (0x04<<23)

diff --git a/tests/gem_exec_parse.c b/tests/gem_exec_parse.c
index 5bab4db..05f271c 100644 (file)
--- a/tests/gem_exec_parse.c
+++ b/tests/gem_exec_parse.c
@@ -187,7 +187,6 @@ int fd;
 
 #define MI_ARB_ON_OFF (0x8 << 23)
 #define MI_DISPLAY_FLIP ((0x14 << 23) | 1)
-#define MI_LOAD_REGISTER_IMM ((0x22 << 23) | 1)
 
 #define GFX_OP_PIPE_CONTROL    ((0x3<<29)|(0x3<<27)|(0x2<<24)|2)
 #define   PIPE_CONTROL_QW_WRITE        (1<<14)

diff --git a/tests/gem_non_secure_batch.c b/tests/gem_non_secure_batch.c
index d8969da..a1e875d 100644 (file)
--- a/tests/gem_non_secure_batch.c
+++ b/tests/gem_non_secure_batch.c
@@ -52,8 +52,6 @@ struct intel_batchbuffer *batch;
  * should fail if the non-secure handling works correctly.
  */
 
-#define MI_LOAD_REGISTER_IMM                 (0x22<<23)
-
 static int num_rings = 1;
 
 static void
@@ -67,7 +65,7 @@ mi_lri_loop(void)
                int ring = random() % num_rings + 1;
 
                BEGIN_BATCH(4, 0);
-               OUT_BATCH(MI_LOAD_REGISTER_IMM | 1);
+               OUT_BATCH(MI_LOAD_REGISTER_IMM);
                OUT_BATCH(0x203c); /* RENDER RING CTL */
                OUT_BATCH(0); /* try to stop the ring */
                OUT_BATCH(MI_NOOP);

diff --git a/tests/gen7_forcewake_mt.c b/tests/gen7_forcewake_mt.c
index 0ea7d09..e974807 100644 (file)
--- a/tests/gen7_forcewake_mt.c
+++ b/tests/gen7_forcewake_mt.c
@@ -120,7 +120,6 @@ static void *thread(void *arg)
        return NULL;
 }
 
-#define MI_LOAD_REGISTER_IMM                    (0x22<<23)
 #define MI_STORE_REGISTER_MEM                   (0x24<<23)
 
 igt_simple_main
@@ -145,13 +144,13 @@ igt_simple_main
                struct drm_i915_gem_exec_object2 exec[2];
                struct drm_i915_gem_relocation_entry reloc[2];
                uint32_t b[] = {
-                       MI_LOAD_REGISTER_IMM | 1,
+                       MI_LOAD_REGISTER_IMM,
                        FORCEWAKE_MT,
                        2 << 16 | 2,
                        MI_STORE_REGISTER_MEM | 1,
                        FORCEWAKE_MT,
                        0, // to be patched
-                       MI_LOAD_REGISTER_IMM | 1,
+                       MI_LOAD_REGISTER_IMM,
                        FORCEWAKE_MT,
                        2 << 16,
                        MI_STORE_REGISTER_MEM | 1,